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-rw-r--r--librhash/byte_order.h156
1 files changed, 96 insertions, 60 deletions
diff --git a/librhash/byte_order.h b/librhash/byte_order.h
index 77b8bb9..bbd285a 100644
--- a/librhash/byte_order.h
+++ b/librhash/byte_order.h
@@ -4,13 +4,15 @@
#include "ustd.h"
#include <stdlib.h>
-#ifdef IN_RHASH
-#include "config.h"
-#endif
-
-#ifdef __GLIBC__
+#if defined(__GLIBC__)
# include <endian.h>
#endif
+#if defined(__FreeBSD__) || defined(__DragonFly__) || defined(__APPLE__)
+# include <sys/types.h>
+#elif defined (__NetBSD__) || defined(__OpenBSD__)
+# include <sys/param.h>
+#endif
+
#ifdef __cplusplus
extern "C" {
@@ -34,29 +36,49 @@ extern "C" {
# endif
#endif
+#define RHASH_BYTE_ORDER_LE 1234
+#define RHASH_BYTE_ORDER_BE 4321
+
+#if (defined(__BYTE_ORDER) && defined(__LITTLE_ENDIAN) && __BYTE_ORDER == __LITTLE_ENDIAN) || \
+ (defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE
+#elif (defined(__BYTE_ORDER) && defined(__BIG_ENDIAN) && __BYTE_ORDER == __BIG_ENDIAN) || \
+ (defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE
+#elif defined(_BYTE_ORDER)
+# if defined(_LITTLE_ENDIAN) && (_BYTE_ORDER == _LITTLE_ENDIAN)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE
+# elif defined(_BIG_ENDIAN) && (_BYTE_ORDER == _BIG_ENDIAN)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE
+# endif
+#elif defined(__sun) && defined(_LITTLE_ENDIAN)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE
+#elif defined(__sun) && defined(_BIG_ENDIAN)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE
+#endif
-/* detect CPU endianness */
-#if (defined(__BYTE_ORDER) && defined(__LITTLE_ENDIAN) && \
- __BYTE_ORDER == __LITTLE_ENDIAN) || \
- defined(CPU_IA32) || defined(CPU_X64) || \
- defined(__ia64) || defined(__ia64__) || defined(__alpha__) || defined(_M_ALPHA) || \
- defined(vax) || defined(MIPSEL) || defined(_ARM_) || defined(__arm__)
-# define CPU_LITTLE_ENDIAN
-# define IS_BIG_ENDIAN 0
-# define IS_LITTLE_ENDIAN 1
-#elif (defined(__BYTE_ORDER) && defined(__BIG_ENDIAN) && \
- __BYTE_ORDER == __BIG_ENDIAN) || \
- defined(__sparc) || defined(__sparc__) || defined(sparc) || \
- defined(_ARCH_PPC) || defined(_ARCH_PPC64) || defined(_POWER) || \
- defined(__POWERPC__) || defined(POWERPC) || defined(__powerpc) || \
- defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || \
- defined(__hpux) || defined(_MIPSEB) || defined(mc68000) || \
- defined(__s390__) || defined(__s390x__) || defined(sel)
-# define CPU_BIG_ENDIAN
-# define IS_BIG_ENDIAN 1
-# define IS_LITTLE_ENDIAN 0
+/* try detecting endianness by CPU */
+#ifdef RHASH_BYTE_ORDER
+#elif defined(CPU_IA32) || defined(CPU_X64) || defined(__ia64) || defined(__ia64__) || \
+ defined(__alpha__) || defined(_M_ALPHA) || defined(vax) || defined(MIPSEL) || \
+ defined(_ARM_) || defined(__arm__)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_LE
+#elif defined(__sparc) || defined(__sparc__) || defined(sparc) || \
+ defined(_ARCH_PPC) || defined(_ARCH_PPC64) || defined(_POWER) || \
+ defined(__POWERPC__) || defined(POWERPC) || defined(__powerpc) || \
+ defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || \
+ defined(__hpux) || defined(_MIPSEB) || defined(mc68000) || \
+ defined(__s390__) || defined(__s390x__) || defined(sel)
+# define RHASH_BYTE_ORDER RHASH_BYTE_ORDER_BE
#else
-# error "Can't detect CPU architechture"
+# error "Can't detect CPU architechture"
+#endif
+
+#define IS_BIG_ENDIAN (RHASH_BYTE_ORDER == RHASH_BYTE_ORDER_BE)
+#define IS_LITTLE_ENDIAN (RHASH_BYTE_ORDER == RHASH_BYTE_ORDER_LE)
+
+#ifndef __has_builtin
+# define __has_builtin(x) 0
#endif
#define IS_ALIGNED_32(p) (0 == (3 & ((const char*)(p) - (const char*)0)))
@@ -74,11 +96,23 @@ extern "C" {
#if defined(_MSC_VER) || defined(__BORLANDC__)
#define I64(x) x##ui64
#else
-#define I64(x) x##LL
+#define I64(x) x##ULL
#endif
-/* convert a hash flag to index */
-#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) /* GCC < 3.4 */
+#if defined(_MSC_VER)
+#define RHASH_INLINE __inline
+#elif defined(__GNUC__) && !defined(__STRICT_ANSI__)
+#define RHASH_INLINE inline
+#elif defined(__GNUC__)
+#define RHASH_INLINE __inline__
+#else
+#define RHASH_INLINE
+#endif
+
+/* define rhash_ctz - count traling zero bits */
+#if (defined(__GNUC__) && __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)) || \
+ (defined(__clang__) && __has_builtin(__builtin_ctz))
+/* GCC >= 3.4 or clang */
# define rhash_ctz(x) __builtin_ctz(x)
#else
unsigned rhash_ctz(unsigned); /* define as function */
@@ -87,37 +121,31 @@ unsigned rhash_ctz(unsigned); /* define as function */
void rhash_swap_copy_str_to_u32(void* to, int index, const void* from, size_t length);
void rhash_swap_copy_str_to_u64(void* to, int index, const void* from, size_t length);
void rhash_swap_copy_u64_to_str(void* to, const void* from, size_t length);
-void rhash_u32_mem_swap(unsigned *p, int length_in_u32);
+void rhash_u32_mem_swap(unsigned* p, int length_in_u32);
-/* define bswap_32 */
-#if defined(__GNUC__) && defined(CPU_IA32) && !defined(__i386__)
-/* for intel x86 CPU */
-static inline uint32_t bswap_32(uint32_t x) {
- __asm("bswap\t%0" : "=r" (x) : "0" (x));
- return x;
-}
-#elif defined(__GNUC__) && (__GNUC__ >= 4) && (__GNUC__ > 4 || __GNUC_MINOR__ >= 3)
-/* for GCC >= 4.3 */
+/* bswap definitions */
+#if (defined(__GNUC__) && (__GNUC__ >= 4) && (__GNUC__ > 4 || __GNUC_MINOR__ >= 3)) || \
+ (defined(__clang__) && __has_builtin(__builtin_bswap32) && __has_builtin(__builtin_bswap64))
+/* GCC >= 4.3 or clang */
# define bswap_32(x) __builtin_bswap32(x)
+# define bswap_64(x) __builtin_bswap64(x)
#elif (_MSC_VER > 1300) && (defined(CPU_IA32) || defined(CPU_X64)) /* MS VC */
# define bswap_32(x) _byteswap_ulong((unsigned long)x)
-#elif !defined(__STRICT_ANSI__)
-/* general bswap_32 definition */
-static inline uint32_t bswap_32(uint32_t x) {
- x = ((x << 8) & 0xFF00FF00) | ((x >> 8) & 0x00FF00FF);
+# define bswap_64(x) _byteswap_uint64((__int64)x)
+#else
+/* fallback to generic bswap definition */
+static RHASH_INLINE uint32_t bswap_32(uint32_t x)
+{
+# if defined(__GNUC__) && defined(CPU_IA32) && !defined(__i386__) && !defined(RHASH_NO_ASM)
+ __asm("bswap\t%0" : "=r" (x) : "0" (x)); /* gcc x86 version */
+ return x;
+# else
+ x = ((x << 8) & 0xFF00FF00u) | ((x >> 8) & 0x00FF00FFu);
return (x >> 16) | (x << 16);
+# endif
}
-#else
-#define bswap_32(x) ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
- (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
-#endif /* bswap_32 */
-
-#if defined(__GNUC__) && (__GNUC__ >= 4) && (__GNUC__ > 4 || __GNUC_MINOR__ >= 3)
-# define bswap_64(x) __builtin_bswap64(x)
-#elif (_MSC_VER > 1300) && (defined(CPU_IA32) || defined(CPU_X64)) /* MS VC */
-# define bswap_64(x) _byteswap_uint64((__int64)x)
-#elif !defined(__STRICT_ANSI__)
-static inline uint64_t bswap_64(uint64_t x) {
+static RHASH_INLINE uint64_t bswap_64(uint64_t x)
+{
union {
uint64_t ll;
uint32_t l[2];
@@ -127,11 +155,9 @@ static inline uint64_t bswap_64(uint64_t x) {
r.l[1] = bswap_32(w.l[0]);
return r.ll;
}
-#else
-#error "bswap_64 unsupported"
-#endif
+#endif /* bswap definitions */
-#ifdef CPU_BIG_ENDIAN
+#if IS_BIG_ENDIAN
# define be2me_32(x) (x)
# define be2me_64(x) (x)
# define le2me_32(x) bswap_32(x)
@@ -144,7 +170,7 @@ static inline uint64_t bswap_64(uint64_t x) {
# define me64_to_be_str(to, from, length) memcpy((to), (from), (length))
# define me64_to_le_str(to, from, length) rhash_swap_copy_u64_to_str((to), (from), (length))
-#else /* CPU_BIG_ENDIAN */
+#else /* IS_BIG_ENDIAN */
# define be2me_32(x) bswap_32(x)
# define be2me_64(x) bswap_64(x)
# define le2me_32(x) (x)
@@ -156,7 +182,7 @@ static inline uint64_t bswap_64(uint64_t x) {
# define le64_copy(to, index, from, length) memcpy((to) + (index), (from), (length))
# define me64_to_be_str(to, from, length) rhash_swap_copy_u64_to_str((to), (from), (length))
# define me64_to_le_str(to, from, length) memcpy((to), (from), (length))
-#endif /* CPU_BIG_ENDIAN */
+#endif /* IS_BIG_ENDIAN */
/* ROTL/ROTR macros rotate a 32/64-bit word left/right by n bits */
#define ROTL32(dword, n) ((dword) << (n) ^ ((dword) >> (32 - (n))))
@@ -164,6 +190,16 @@ static inline uint64_t bswap_64(uint64_t x) {
#define ROTL64(qword, n) ((qword) << (n) ^ ((qword) >> (64 - (n))))
#define ROTR64(qword, n) ((qword) >> (n) ^ ((qword) << (64 - (n))))
+#define CPU_FEATURE_SSE4_2 (52)
+
+#if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) \
+ && (defined(CPU_X64) || defined(CPU_IA32))
+# define HAS_INTEL_CPUID
+int has_cpu_feature(unsigned feature_bit);
+#else
+# define has_cpu_feature(x) (0)
+#endif
+
#ifdef __cplusplus
} /* extern "C" */
#endif /* __cplusplus */