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authoralbert-github <albert.tests@gmail.com>2020-02-16 14:22:23 (GMT)
committeralbert-github <albert.tests@gmail.com>2020-02-16 14:22:23 (GMT)
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Warnings in case of a VHDL error
When having a vhdl construct like: ``` entity _H_ is ``` we get the, a bit unclear, warnings like: ``` Lexical error at: 16:8. Encountered: _ after: . ``` with version 1.8.17 we got the warning: ``` .../vhdl.vhd:16: warning: Lexical error, Encountered: '_' after: '' ``` not 100% clear either but at least clear which file is involved and what the meaning of the '16' is. Also the message didn't conform the doxygen style / place / handling of warnings / errors anymore (didn't go to the WARN_LOGFILE anymore). (The message is correct as a vhdl identifier cannot start or end with an underscore. Between the used javaCC versions (now 7.05) and the previously used version 6.xx apparently a small in the error handler prototypes has been introduces, and thus not finding the doxygen version anymore.
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