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| author | Andreas Regel <andreas.regel@newayselectronics.com> | 2018-01-03 06:34:06 (GMT) |
|---|---|---|
| committer | Andreas Regel <andreas.regel@newayselectronics.com> | 2018-01-08 13:10:53 (GMT) |
| commit | fe88231028cc137b9e97ae1024ce8781244f3103 (patch) | |
| tree | f6baafb5e089748688a0fdfc988c1b583aa8513b /src/translator_de.h | |
| parent | efd2921d1e3a3f9b7f994673d0af6d70b1888b98 (diff) | |
| download | Doxygen-fe88231028cc137b9e97ae1024ce8781244f3103.zip Doxygen-fe88231028cc137b9e97ae1024ce8781244f3103.tar.gz Doxygen-fe88231028cc137b9e97ae1024ce8781244f3103.tar.bz2 | |
Change german translation of trClassDocumentation() for VHDL output.
Diffstat (limited to 'src/translator_de.h')
| -rw-r--r-- | src/translator_de.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/translator_de.h b/src/translator_de.h index 83a89c0..5103ace 100644 --- a/src/translator_de.h +++ b/src/translator_de.h @@ -471,7 +471,7 @@ class TranslatorGerman : public Translator } else if (Config_getBool(OPTIMIZE_OUTPUT_VHDL)) { - return "Designeinheiten-Dokumentation"; + return "Entwurfseinheiten-Dokumentation"; } else { |