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| author | Andreas Regel <andreas.regel@newayselectronics.com> | 2017-12-06 08:41:22 (GMT) |
|---|---|---|
| committer | Andreas Regel <andreas.regel@newayselectronics.com> | 2018-01-08 13:10:52 (GMT) |
| commit | efd2921d1e3a3f9b7f994673d0af6d70b1888b98 (patch) | |
| tree | 7acd9ec0e3c772a16b3c0afda54ac0b104b44cfb /src | |
| parent | f1fea3603fa3e561d8f1efff5bc685e4484e7998 (diff) | |
| download | Doxygen-efd2921d1e3a3f9b7f994673d0af6d70b1888b98.zip Doxygen-efd2921d1e3a3f9b7f994673d0af6d70b1888b98.tar.gz Doxygen-efd2921d1e3a3f9b7f994673d0af6d70b1888b98.tar.bz2 | |
Fix VHDL Latex documentation having two chapters with the same name.
Diffstat (limited to 'src')
| -rw-r--r-- | src/index.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/index.cpp b/src/index.cpp index 6e446c0..0f12ca4 100644 --- a/src/index.cpp +++ b/src/index.cpp @@ -4017,7 +4017,7 @@ static void writeIndex(OutputList &ol) ol.startIndexSection(isClassHierarchyIndex); ol.parseText(/*projPrefix+*/ (fortranOpt ? theTranslator->trCompoundIndexFortran() : - vhdlOpt ? theTranslator->trDesignUnitIndex() : + vhdlOpt ? theTranslator->trHierarchicalIndex() : theTranslator->trHierarchicalIndex() )); ol.endIndexSection(isClassHierarchyIndex); |