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| author | albert-github <albert.tests@gmail.com> | 2018-03-29 12:37:52 (GMT) |
|---|---|---|
| committer | albert-github <albert.tests@gmail.com> | 2018-03-29 12:37:52 (GMT) |
| commit | 36afe5e25c10dfd5a6208df7c8892eb2bb7498c5 (patch) | |
| tree | 69fa5054e6b9df0586e50e18e8d1883cfb1d1e18 /templates | |
| parent | 7e2fcd305c8c9377aa958a3d812cc31bc81c0e32 (diff) | |
| download | Doxygen-36afe5e25c10dfd5a6208df7c8892eb2bb7498c5.zip Doxygen-36afe5e25c10dfd5a6208df7c8892eb2bb7498c5.tar.gz Doxygen-36afe5e25c10dfd5a6208df7c8892eb2bb7498c5.tar.bz2 | |
Better HTML output for VHDL Ports
Small alignment improvement of HTML output for VHDL Ports so that the mode will be in a separate column
Diffstat (limited to 'templates')
0 files changed, 0 insertions, 0 deletions