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Diffstat (limited to 'src/vhdljjparser.h')
-rw-r--r-- | src/vhdljjparser.h | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/src/vhdljjparser.h b/src/vhdljjparser.h new file mode 100644 index 0000000..7ecf297 --- /dev/null +++ b/src/vhdljjparser.h @@ -0,0 +1,98 @@ +#ifndef VHDLJJPARSER_H +#define VHDLJJPARSER_H + +#include "parserintf.h" +#include <stdio.h> +#include <stdlib.h> +#include <assert.h> +#include <ctype.h> +#include <qarray.h> + +#include <qfile.h> +#include <qdict.h> +#include <string> +#include "memberlist.h" +#include "types.h" +#include "entry.h" + +#include "vhdldocgen.h" +#include "qstringlist.h" +#include "vhdlcode.h" +#include "config.h" + +enum { GEN_SEC=0x1, PARAM_SEC,CONTEXT_SEC,PROTECTED_SEC } ; +void parserVhdlfile(const char* inputBuffer); + +class Entry; +class ClassSDict; +class FileStorage; +class ClassDef; +class MemberDef; +class QStringList; +class VhdlConfNode; + +/** \brief VHDL parser using state-based lexical scanning. + * + * This is the VHDL language parser for doxygen. + */ +class VHDLLanguageScanner : public ParserInterface +{ + public: + virtual ~VHDLLanguageScanner() {} + void startTranslationUnit(const char *) {} + void finishTranslationUnit() {} + void parseInput(const char * fileName, + const char *fileBuf, + Entry *root, + bool sameTranslationUnit, + QStrList &filesInSameTranslationUnit); + + void parseCode(CodeOutputInterface &codeOutIntf, + const char *scopeName, + const QCString &input, + SrcLangExt lang, + bool isExampleBlock, + const char *exampleName=0, + FileDef *fileDef=0, + int startLine=-1, + int endLine=-1, + bool inlineFragment=FALSE, + MemberDef *memberDef=0, + bool showLineNumbers=TRUE, + Definition *searchCtx=0, + bool collectXRefs=TRUE); + + bool needsPreprocessing(const QCString &) { return TRUE; } + void resetCodeParserState() {} + void parsePrototype(const char *) {} +}; + +class VhdlConfNode +{ + public: + VhdlConfNode(const char* a,const char* b,const char* config,const char* cs,bool leaf) + { + arch=a; // architecture e.g. for iobuffer + arch=arch.lower(); + binding=b; // binding e.g. use entiy work.xxx(bev) + binding=binding.lower(); + confVhdl=config; // configuration foo is bar + compSpec=cs; + isInlineConf=false; // primary configuration? + isLeaf=leaf; + }; + + QCString confVhdl; + QCString arch; + QCString binding; + QCString compSpec; + int level; + bool isLeaf; + bool isInlineConf; +}; + +void vhdlscanFreeScanner(); +QList<VhdlConfNode>& getVhdlConfiguration(); +QList<Entry>& getVhdlInstList(); + +#endif |