Add support for ARMv7 atomic operations

ARMv7 adds the DMB (data memory barrier) instruction which we can use to
enforce memory barriers in QAtomicInt and QAtomicPointer. Other than
that, ARMv7 is identical to ARMv6.

Adjust the ARMv6 code to relax the compiler memory barriers on the
*Relaxed() operations, and use *Relaxed() functions together the
appropriate compiler barriers in the *Acquire(), *Release(), and
*Ordered() functions. For "pure" ARMv6 code, the barriers are only
compiler barriers, but for ARMv7, we also emit the DMB instruction.

Reviewed-by: thiago

5 files changed, 179 insertions, 54 deletions

diff --git a/bin/syncqt b/bin/syncqt
index b2a2577..faa3575 100755
--- a/bin/syncqt
+++ b/bin/syncqt
@@ -691,7 +691,7 @@ my $class_lib_map_contents = "";
 my @ignore_for_master_contents = ( "qt.h", "qpaintdevicedefs.h" );
 my @ignore_for_include_check = ( "qatomic.h" );
 my @ignore_for_qt_begin_header_check = ( "qiconset.h", "qconfig.h", "qconfig-dist.h", "qconfig-large.h", "qconfig-medium.h", "qconfig-minimal.h", "qconfig-small.h", "qfeatures.h", "qt_windows.h" );
-my @ignore_for_qt_begin_namespace_check = ( "qconfig.h", "qconfig-dist.h", "qconfig-large.h", "qconfig-medium.h", "qconfig-minimal.h", "qconfig-small.h", "qfeatures.h", "qatomic_arch.h", "qatomic_windowsce.h", "qt_windows.h", "qatomic_macosx.h", "qatomic_arm.h" );
+my @ignore_for_qt_begin_namespace_check = ( "qconfig.h", "qconfig-dist.h", "qconfig-large.h", "qconfig-medium.h", "qconfig-minimal.h", "qconfig-small.h", "qfeatures.h", "qatomic_arch.h", "qatomic_windowsce.h", "qt_windows.h", "qatomic_macosx.h", "qatomic_arm.h", "qatomic_armv7.h" );
 my @ignore_for_qt_module_check = ( "$modules{QtCore}/arch", "$modules{QtCore}/global", "$modules{QtSql}/drivers", "$modules{QtTest}", "$modules{QtDesigner}", "$modules{QtUiTools}", "$modules{QtDBus}", "$modules{phonon}" );
 my %colliding_headers = ();
 my %inject_headers;
diff --git a/src/corelib/arch/arch.pri b/src/corelib/arch/arch.pri
index 046ecdf..971069f 100644
--- a/src/corelib/arch/arch.pri
+++ b/src/corelib/arch/arch.pri
@@ -23,6 +23,7 @@ vxworks:HEADERS += arch/qatomic_vxworks.h
                        arch/qatomic_arm.h \
                        arch/qatomic_armv5.h \
                        arch/qatomic_armv6.h \
+                       arch/qatomic_armv7.h \
                        arch/qatomic_i386.h \
                        arch/qatomic_mips.h \
                        arch/qatomic_s390.h \
diff --git a/src/corelib/arch/qatomic_arm.h b/src/corelib/arch/qatomic_arm.h
index 5db7082..f9d71e9 100644
--- a/src/corelib/arch/qatomic_arm.h
+++ b/src/corelib/arch/qatomic_arm.h
@@ -47,8 +47,12 @@ QT_BEGIN_HEADER
 #if defined(__ARM_ARCH_7__) \
     || defined(__ARM_ARCH_7A__) \
     || defined(__ARM_ARCH_7R__) \
-    || defined(__ARM_ARCH_7M__) \
-    || defined(__ARM_ARCH_6__) \
+    || defined(__ARM_ARCH_7M__)
+# define QT_ARCH_ARMV7
+QT_BEGIN_INCLUDE_HEADER
+# include "QtCore/qatomic_armv7.h"
+QT_END_INCLUDE_HEADER
+#elif defined(__ARM_ARCH_6__) \
     || defined(__ARM_ARCH_6J__) \
     || defined(__ARM_ARCH_6T2__) \
     || defined(__ARM_ARCH_6Z__) \
diff --git a/src/corelib/arch/qatomic_armv6.h b/src/corelib/arch/qatomic_armv6.h
index 38b7069..1aa3b88 100644
--- a/src/corelib/arch/qatomic_armv6.h
+++ b/src/corelib/arch/qatomic_armv6.h
@@ -45,6 +45,7 @@
 QT_BEGIN_HEADER
 
 QT_BEGIN_NAMESPACE
+
 #define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
 
 inline bool QBasicAtomicInt::isReferenceCountingNative()
@@ -102,6 +103,13 @@ Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::isFetchAndAddWaitFree()
 
 #ifndef Q_CC_RVCT
 
+#ifndef Q_DATA_MEMORY_BARRIER
+# define Q_DATA_MEMORY_BARRIER asm volatile("":::"memory")
+#endif
+#ifndef Q_COMPILER_MEMORY_BARRIER
+# define Q_COMPILER_MEMORY_BARRIER asm volatile("":::"memory")
+#endif
+
 inline bool QBasicAtomicInt::ref()
 {
     register int newValue;
@@ -138,7 +146,7 @@ inline bool QBasicAtomicInt::deref()
     return newValue != 0;
 }
 
-inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue)
+inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue)
 {
     register int result;
     asm volatile("0:\n"
@@ -152,11 +160,11 @@ inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue)
                  : [expectedValue] "r" (expectedValue),
                    [newValue] "r" (newValue),
                    [_q_value] "r" (&_q_value)
-                 : "cc", "memory");
+                 : "cc");
     return result == 0;
 }
 
-inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue)
+inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue)
 {
     register int originalValue;
     register int result;
@@ -170,11 +178,11 @@ inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue)
                    "+m" (_q_value)
                  : [newValue] "r" (newValue),
                    [_q_value] "r" (&_q_value)
-                 : "cc", "memory");
+                 : "cc");
     return originalValue;
 }
 
-inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd)
+inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd)
 {
     register int originalValue;
     register int newValue;
@@ -191,12 +199,12 @@ inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd)
                    "+m" (_q_value)
                  : [valueToAdd] "r" (valueToAdd),
                    [_q_value] "r" (&_q_value)
-                 : "cc", "memory");
+                 : "cc");
     return originalValue;
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetOrdered(T *expectedValue, T *newValue)
+Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetRelaxed(T *expectedValue, T *newValue)
 {
     register T *result;
     asm volatile("0:\n"
@@ -210,12 +218,12 @@ Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetOrdered(T *expectedValu
                  : [expectedValue] "r" (expectedValue),
                    [newValue] "r" (newValue),
                    [_q_value] "r" (&_q_value)
-                 : "cc", "memory");
+                 : "cc");
     return result == 0;
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreOrdered(T *newValue)
+Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreRelaxed(T *newValue)
 {
     register T *originalValue;
     register int result;
@@ -229,12 +237,12 @@ Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreOrdered(T *newValue)
                    "+m" (_q_value)
                  : [newValue] "r" (newValue),
                    [_q_value] "r" (&_q_value)
-                 : "cc", "memory");
+                 : "cc");
     return originalValue;
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddOrdered(qptrdiff valueToAdd)
+Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddRelaxed(qptrdiff valueToAdd)
 {
     register T *originalValue;
     register T *newValue;
@@ -251,7 +259,7 @@ Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddOrdered(qptrdiff valueTo
                    "+m" (_q_value)
                  : [valueToAdd] "r" (valueToAdd * sizeof(T)),
                    [_q_value] "r" (&_q_value)
-                 : "cc", "memory");
+                 : "cc");
     return originalValue;
 }
 
@@ -263,9 +271,18 @@ Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddOrdered(qptrdiff valueTo
 // RVCT embedded assembly documentation:
 // http://www.keil.com/support/man/docs/armcc/armcc_chddbeib.htm
 
-// save our pragma state and switch to ARM mode
-#pragma push
-#pragma arm
+#if __TARGET_ARCH_THUMB-0 < 4
+// save our pragma state and switch to ARM mode (unless using Thumb2)
+# pragma push
+# pragma arm
+#endif
+
+#ifndef Q_DATA_MEMORY_BARRIER
+# define Q_DATA_MEMORY_BARRIER __schedule_barrier()
+#endif
+#ifndef Q_COMPILER_MEMORY_BARRIER
+# define Q_COMPILER_MEMORY_BARRIER __schedule_barrier()
+#endif
 
 inline bool QBasicAtomicInt::ref()
 {
@@ -297,7 +314,7 @@ inline bool QBasicAtomicInt::deref()
     return newValue != 0;
 }
 
-inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue)
+inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue)
 {
     register int result;
     retry:
@@ -311,7 +328,7 @@ inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue)
     return result == 0;
 }
 
-inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue)
+inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue)
 {
     register int originalValue;
     register int result;
@@ -325,7 +342,7 @@ inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue)
     return originalValue;
 }
 
-inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd)
+inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd)
 {
     register int originalValue;
     register int newValue;
@@ -342,7 +359,7 @@ inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd)
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetOrdered(T *expectedValue, T *newValue)
+Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetRelaxed(T *expectedValue, T *newValue)
 {
     register T *result;
     retry:
@@ -357,7 +374,7 @@ Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetOrdered(T *expectedValu
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreOrdered(T *newValue)
+Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreRelaxed(T *newValue)
 {
     register T *originalValue;
     register int result;
@@ -372,7 +389,7 @@ Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreOrdered(T *newValue)
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddOrdered(qptrdiff valueToAdd)
+Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddRelaxed(qptrdiff valueToAdd)
 {
     register T *originalValue;
     register T *newValue;
@@ -388,111 +405,153 @@ Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddOrdered(qptrdiff valueTo
     return originalValue;
 }
 
-// go back to the previous pragma state (probably Thumb mode)
-#pragma pop
+#if __TARGET_ARCH_THUMB-0 < 4
+# pragma pop
 #endif
 
-// common code
+#endif
 
-inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue)
-{
-    return testAndSetOrdered(expectedValue, newValue);
-}
+// common code
 
 inline bool QBasicAtomicInt::testAndSetAcquire(int expectedValue, int newValue)
 {
-    return testAndSetOrdered(expectedValue, newValue);
+    bool returnValue = testAndSetRelaxed(expectedValue, newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return returnValue;
 }
 
 inline bool QBasicAtomicInt::testAndSetRelease(int expectedValue, int newValue)
 {
-    return testAndSetOrdered(expectedValue, newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return testAndSetRelaxed(expectedValue, newValue);
 }
 
-inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue)
+inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue)
 {
-    return fetchAndStoreOrdered(newValue);
+    Q_DATA_MEMORY_BARRIER;
+    bool returnValue = testAndSetRelaxed(expectedValue, newValue);
+    Q_COMPILER_MEMORY_BARRIER;
+    return returnValue;
 }
 
 inline int QBasicAtomicInt::fetchAndStoreAcquire(int newValue)
 {
-    return fetchAndStoreOrdered(newValue);
+    int returnValue = fetchAndStoreRelaxed(newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return returnValue;
 }
 
 inline int QBasicAtomicInt::fetchAndStoreRelease(int newValue)
 {
-    return fetchAndStoreOrdered(newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return fetchAndStoreRelaxed(newValue);
 }
 
-inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd)
+inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue)
 {
-    return fetchAndAddOrdered(valueToAdd);
+    Q_DATA_MEMORY_BARRIER;
+    int returnValue = fetchAndStoreRelaxed(newValue);
+    Q_COMPILER_MEMORY_BARRIER;
+    return returnValue;
 }
 
+
 inline int QBasicAtomicInt::fetchAndAddAcquire(int valueToAdd)
 {
-    return fetchAndAddOrdered(valueToAdd);
+    int returnValue = fetchAndAddRelaxed(valueToAdd);
+    Q_DATA_MEMORY_BARRIER;
+    return returnValue;
 }
 
 inline int QBasicAtomicInt::fetchAndAddRelease(int valueToAdd)
 {
-    return fetchAndAddOrdered(valueToAdd);
+    Q_DATA_MEMORY_BARRIER;
+    return fetchAndAddRelaxed(valueToAdd);
 }
 
-template <typename T>
-Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetRelaxed(T *expectedValue, T *newValue)
+inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd)
 {
-    return testAndSetOrdered(expectedValue, newValue);
+    Q_DATA_MEMORY_BARRIER;
+    int returnValue = fetchAndAddRelaxed(valueToAdd);
+    Q_COMPILER_MEMORY_BARRIER;
+    return returnValue;
 }
 
 template <typename T>
 Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetAcquire(T *expectedValue, T *newValue)
 {
-    return testAndSetOrdered(expectedValue, newValue);
+    bool returnValue = testAndSetRelaxed(expectedValue, newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return returnValue;
 }
 
 template <typename T>
 Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetRelease(T *expectedValue, T *newValue)
 {
-    return testAndSetOrdered(expectedValue, newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return testAndSetRelaxed(expectedValue, newValue);
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreRelaxed(T *newValue)
+Q_INLINE_TEMPLATE bool QBasicAtomicPointer<T>::testAndSetOrdered(T *expectedValue, T *newValue)
 {
-    return fetchAndStoreOrdered(newValue);
+    Q_DATA_MEMORY_BARRIER;
+    bool returnValue = testAndSetAcquire(expectedValue, newValue);
+    Q_COMPILER_MEMORY_BARRIER;
+    return returnValue;
 }
 
 template <typename T>
 Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreAcquire(T *newValue)
 {
-    return fetchAndStoreOrdered(newValue);
+    T *returnValue = fetchAndStoreRelaxed(newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return returnValue;
 }
 
 template <typename T>
 Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreRelease(T *newValue)
 {
-    return fetchAndStoreOrdered(newValue);
+    Q_DATA_MEMORY_BARRIER;
+    return fetchAndStoreRelaxed(newValue);
 }
 
 template <typename T>
-Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddRelaxed(qptrdiff valueToAdd)
+Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndStoreOrdered(T *newValue)
 {
-    return fetchAndAddOrdered(valueToAdd);
+    Q_DATA_MEMORY_BARRIER;
+    T *returnValue = fetchAndStoreRelaxed(newValue);
+    Q_COMPILER_MEMORY_BARRIER;
+    return returnValue;
 }
 
 template <typename T>
 Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddAcquire(qptrdiff valueToAdd)
 {
-    return fetchAndAddOrdered(valueToAdd);
+    T *returnValue = fetchAndAddRelaxed(valueToAdd);
+    Q_DATA_MEMORY_BARRIER;
+    return returnValue;
 }
 
 template <typename T>
 Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddRelease(qptrdiff valueToAdd)
 {
-    return fetchAndAddOrdered(valueToAdd);
+    Q_DATA_MEMORY_BARRIER;
+    return fetchAndAddRelaxed(valueToAdd);
 }
 
+template <typename T>
+Q_INLINE_TEMPLATE T *QBasicAtomicPointer<T>::fetchAndAddOrdered(qptrdiff valueToAdd)
+{
+    Q_DATA_MEMORY_BARRIER;
+    T *returnValue = fetchAndAddRelaxed(valueToAdd);
+    Q_COMPILER_MEMORY_BARRIER;
+    return returnValue;
+}
+
+#undef Q_DATA_MEMORY_BARRIER
+#undef Q_COMPILER_MEMORY_BARRIER
+
 QT_END_NAMESPACE
 
 QT_END_HEADER
diff --git a/src/corelib/arch/qatomic_armv7.h b/src/corelib/arch/qatomic_armv7.h
new file mode 100644
index 0000000..a95c4ea
--- /dev/null
+++ b/src/corelib/arch/qatomic_armv7.h
@@ -0,0 +1,61 @@
+/****************************************************************************
+**
+** Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
+** All rights reserved.
+** Contact: Nokia Corporation (qt-info@nokia.com)
+**
+** This file is part of the QtCore module of the Qt Toolkit.
+**
+** $QT_BEGIN_LICENSE:LGPL$
+** No Commercial Usage
+** This file contains pre-release code and may not be distributed.
+** You may use this file in accordance with the terms and conditions
+** contained in the Technology Preview License Agreement accompanying
+** this package.
+**
+** GNU Lesser General Public License Usage
+** Alternatively, this file may be used under the terms of the GNU Lesser
+** General Public License version 2.1 as published by the Free Software
+** Foundation and appearing in the file LICENSE.LGPL included in the
+** packaging of this file.  Please review the following information to
+** ensure the GNU Lesser General Public License version 2.1 requirements
+** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+**
+** In addition, as a special exception, Nokia gives you certain additional
+** rights.  These rights are described in the Nokia Qt LGPL Exception
+** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
+**
+** If you have questions regarding the use of this file, please contact
+** Nokia at qt-info@nokia.com.
+**
+**
+**
+**
+**
+**
+**
+**
+** $QT_END_LICENSE$
+**
+****************************************************************************/
+
+#ifndef QATOMIC_ARMV7_H
+#define QATOMIC_ARMV7_H
+
+QT_BEGIN_HEADER
+
+// use the DMB instruction when compiling for ARMv7, ...
+#ifndef Q_CC_RCVT
+# define Q_DATA_MEMORY_BARRIER asm volatile("dmb\n":::"memory")
+#else
+# define Q_DATA_MEMORY_BARRIER do{__asm { dmb } __schedule_barrier();}while(0)
+#endif
+
+// ... but the implementation is otherwise identical to that for ARMv6
+QT_BEGIN_INCLUDE_HEADER
+#include "QtCore/qatomic_armv6.h"
+QT_END_INCLUDE_HEADER
+
+QT_END_HEADER
+
+#endif // QATOMIC_ARMV7_H