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author | Guido van Rossum <guido@python.org> | 1991-09-10 14:53:39 (GMT) |
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committer | Guido van Rossum <guido@python.org> | 1991-09-10 14:53:39 (GMT) |
commit | 7d8b509575c6138dc201d13c215359c0b68dbb18 (patch) | |
tree | e99371e5eb07791443cd83f2ef0c4275995af654 /Parser | |
parent | e3db862e5b3b774d1037b7a876940792f24c5502 (diff) | |
download | cpython-7d8b509575c6138dc201d13c215359c0b68dbb18.zip cpython-7d8b509575c6138dc201d13c215359c0b68dbb18.tar.gz cpython-7d8b509575c6138dc201d13c215359c0b68dbb18.tar.bz2 |
Added work-arounds for MPW 3.{1,2?} code generation bug.
Diffstat (limited to 'Parser')
-rw-r--r-- | Parser/acceler.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Parser/acceler.c b/Parser/acceler.c index 33f91b6..53fa12e 100644 --- a/Parser/acceler.c +++ b/Parser/acceler.c @@ -104,10 +104,27 @@ fixstate(g, d, s) } for (ibit = 0; ibit < g->g_ll.ll_nlabels; ibit++) { if (testbit(d1->d_first, ibit)) { +#ifdef applec +#define MPW_881_bug /* Undefine if bug below is fixed */ +#endif +#ifdef MPW_881_BUG + /* In 881 mode MPW 3.1 has a code + generation bug which seems to + set the upper bits; fix this by + explicitly masking them off */ + int temp; +#endif if (accel[ibit] != -1) printf("XXX ambiguity!\n"); +#ifdef MPW_881_BUG + temp = 0xFFFF & + (a->a_arrow | (1 << 7) | + ((type - NT_OFFSET) << 8)); + accel[ibit] = temp; +#else accel[ibit] = a->a_arrow | (1 << 7) | ((type - NT_OFFSET) << 8); +#endif } } } |