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| author | mainzer <mainzer#hdfgroup.org> | 2019-01-03 19:50:53 (GMT) |
|---|---|---|
| committer | mainzer <mainzer#hdfgroup.org> | 2019-01-03 19:50:53 (GMT) |
| commit | 4f8917f9086088ac5cc7fa3c3deb400afbf33b68 (patch) | |
| tree | 61bbd8c8e659331157a2d65dfe1445729691cc85 /src/H5B2cache.c | |
| parent | 0e0abc50c8282af7c39855e58ed32e25091079c1 (diff) | |
| download | hdf5-4f8917f9086088ac5cc7fa3c3deb400afbf33b68.zip hdf5-4f8917f9086088ac5cc7fa3c3deb400afbf33b68.tar.gz hdf5-4f8917f9086088ac5cc7fa3c3deb400afbf33b68.tar.bz2 | |
Interim checkin to allow Vailin to address assertion failure in
the memory manager -- details shown below.
Note that there are other issues as well -- this is not a
working version.
[mainzer@jelly test]$ ./vfd_swmr
Testing Configure VFD SWMR with fapl PASSED
Testing VFD SWMR configuration for the file and fapl PASSED
Testing H5Fvfd_swmr_end_tick() for VFD SWMR PASSED
Testing Create/Open/Flush an HDF5 file for VFD SWMR PASSED
Testing Verify the metadata file for VFD SWMR writer vfd_swmr: H5MVsection.c:233: H5MV__sect_can_merge: Assertion `((sect1->sect_info.addr)!=((haddr_t)(long)(-1)) && (sect2->sect_info.addr)!=((haddr_t)(long)(-1)) && (sect1->sect_info.addr)<(sect2->sect_info.addr))' failed.
Abort (core dumped)
[mainzer@jelly test]$
Diffstat (limited to 'src/H5B2cache.c')
| -rw-r--r-- | src/H5B2cache.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/H5B2cache.c b/src/H5B2cache.c index 2e1d37b..8b89d5b 100644 --- a/src/H5B2cache.c +++ b/src/H5B2cache.c @@ -113,6 +113,7 @@ const H5AC_class_t H5AC_BT2_HDR[1] = {{ H5B2__cache_hdr_notify, /* 'notify' callback */ H5B2__cache_hdr_free_icr, /* 'free_icr' callback */ NULL, /* 'fsf_size' callback */ + NULL, /* VFD SWMR 'refresh' callback */ }}; /* H5B2 inherits cache-like properties from H5AC */ @@ -131,6 +132,7 @@ const H5AC_class_t H5AC_BT2_INT[1] = {{ H5B2__cache_int_notify, /* 'notify' callback */ H5B2__cache_int_free_icr, /* 'free_icr' callback */ NULL, /* 'fsf_size' callback */ + NULL, /* VFD SWMR 'refresh' callback */ }}; /* H5B2 inherits cache-like properties from H5AC */ @@ -149,6 +151,7 @@ const H5AC_class_t H5AC_BT2_LEAF[1] = {{ H5B2__cache_leaf_notify, /* 'notify' callback */ H5B2__cache_leaf_free_icr, /* 'free_icr' callback */ NULL, /* 'fsf_size' callback */ + NULL, /* VFD SWMR 'refresh' callback */ }}; |