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author | Yann Collet <cyan@fb.com> | 2021-07-08 14:21:59 (GMT) |
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committer | Yann Collet <cyan@fb.com> | 2021-07-08 14:21:59 (GMT) |
commit | 88984e30f5d238ee1da6e7cbd1213f58b8de3eb0 (patch) | |
tree | 4642890039b16b12521a7f62d6d3443af4a4f57a | |
parent | 67204c1fe85e0645c495c994b5228b5ddebeed83 (diff) | |
download | lz4-88984e30f5d238ee1da6e7cbd1213f58b8de3eb0.zip lz4-88984e30f5d238ee1da6e7cbd1213f58b8de3eb0.tar.gz lz4-88984e30f5d238ee1da6e7cbd1213f58b8de3eb0.tar.bz2 |
updated Xilinx link
-rw-r--r-- | index.html | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -391,7 +391,7 @@ They are not interoperable with LZ4 command line utility. ### Hardware <div id="lz4-hardware" class="container"> <ul id="icons" class="list-inline"> -<li><a href="https://github.com/Xilinx/Applications/tree/master/data_compression/xil_lz4"><img src="images/logo50/xilinx.png"/><span> Xilinx FPGA</span></a></li> +<li><a href="https://github.com/Xilinx/Vitis_Libraries/tree/master/data_compression/L2/tests/lz4_compress"><img src="images/logo50/xilinx.png"/><span> Xilinx FPGA</span></a></li> </ul> </div> |