# This file is part of MXE. # See index.html for further information. This patch has been taken from: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56038 diff --git a/gcc/config/i386/adxintrin.h b/gcc/config/i386/adxintrin.h index 6118900..a83410d 100644 --- a/gcc/config/i386/adxintrin.h +++ b/gcc/config/i386/adxintrin.h @@ -28,6 +28,10 @@ #ifndef _ADXINTRIN_H_INCLUDED #define _ADXINTRIN_H_INCLUDED +#ifdef __cplusplus +extern "C" { +#endif + extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _addcarryx_u32 (unsigned char __CF, unsigned int __X, @@ -46,4 +50,8 @@ _addcarryx_u64 (unsigned char __CF, unsigned long __X, } #endif +#ifdef __cplusplus +} +#endif + #endif /* _ADXINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/ammintrin.h b/gcc/config/i386/ammintrin.h index a89b204..a370eb0 100644 --- a/gcc/config/i386/ammintrin.h +++ b/gcc/config/i386/ammintrin.h @@ -36,6 +36,10 @@ #define __DISABLE_SSE4A__ #endif /* __SSE4A__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_stream_sd (double * __P, __m128d __Y) { @@ -85,6 +89,10 @@ _mm_inserti_si64(__m128i __X, __m128i __Y, unsigned const int __I, unsigned cons (unsigned int)(I), (unsigned int)(L))) #endif +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_SSE4A__ #undef __DISABLE_SSE4A__ #pragma GCC pop_options diff --git a/gcc/config/i386/avx2intrin.h b/gcc/config/i386/avx2intrin.h index d04c972..9302273 100644 --- a/gcc/config/i386/avx2intrin.h +++ b/gcc/config/i386/avx2intrin.h @@ -34,6 +34,10 @@ #define __DISABLE_AVX2__ #endif /* __AVX2__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Sum absolute 8-bit integer difference of adjacent groups of 4 byte integers in the first 2 operands. Starting offsets within operands are determined by the 3rd mask operand. */ @@ -1887,3 +1891,7 @@ _mm256_mask_i64gather_epi32 (__m128i src, int const *base, #endif /* __DISABLE_AVX2__ */ +#ifdef __cplusplus +} +#endif + #endif /* _AVX2INTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/avxintrin.h b/gcc/config/i386/avxintrin.h index 2ea327c..32591da 100644 --- a/gcc/config/i386/avxintrin.h +++ b/gcc/config/i386/avxintrin.h @@ -37,6 +37,10 @@ #define __DISABLE_AVX__ #endif /* __AVX__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Internal data types for implementing the intrinsics. */ typedef double __v4df __attribute__ ((__vector_size__ (32))); typedef float __v8sf __attribute__ ((__vector_size__ (32))); @@ -1461,3 +1465,7 @@ _mm256_castsi128_si256 (__m128i __A) #endif /* __DISABLE_AVX__ */ +#ifdef __cplusplus +} +#endif + #endif /* _AVXINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/bmi2intrin.h b/gcc/config/i386/bmi2intrin.h index ff96296..b01e1e1 100644 --- a/gcc/config/i386/bmi2intrin.h +++ b/gcc/config/i386/bmi2intrin.h @@ -34,6 +34,10 @@ #define __DISABLE_BMI2__ #endif /* __BMI2__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _bzhi_u32 (unsigned int __X, unsigned int __Y) @@ -106,4 +110,8 @@ _mulx_u32 (unsigned int __X, unsigned int __Y, unsigned int *__P) #pragma GCC pop_options #endif /* __DISABLE_BMI2__ */ +#ifdef __cplusplus +} +#endif + #endif /* _BMI2INTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/bmiintrin.h b/gcc/config/i386/bmiintrin.h index b2d7c60..c8ad38a 100644 --- a/gcc/config/i386/bmiintrin.h +++ b/gcc/config/i386/bmiintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_BMI__ #endif /* __BMI__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __tzcnt_u16 (unsigned short __X) { @@ -181,4 +185,8 @@ _tzcnt_u64 (unsigned long long __X) #pragma GCC pop_options #endif /* __DISABLE_BMI__ */ +#ifdef __cplusplus +} +#endif + #endif /* _BMIINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index 8c323ae..52047e3 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -21,6 +21,10 @@ * . */ +#ifdef __cplusplus +extern "C" { +#endif + /* %ecx */ #define bit_SSE3 (1 << 0) #define bit_PCLMUL (1 << 1) @@ -275,3 +279,8 @@ __get_cpuid (unsigned int __level, __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx); return 1; } + +#ifdef __cplusplus +} +#endif + diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h index a2bdf0e..2c4af53 100644 --- a/gcc/config/i386/emmintrin.h +++ b/gcc/config/i386/emmintrin.h @@ -36,6 +36,10 @@ #define __DISABLE_SSE2__ #endif /* __SSE2__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* SSE2 */ typedef double __v2df __attribute__ ((__vector_size__ (16))); typedef long long __v2di __attribute__ ((__vector_size__ (16))); @@ -1515,6 +1519,10 @@ _mm_castps_pd(__m128 __A) return (__m128d) __A; } +#ifdef __cplusplus +} +#endif + extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_castps_si128(__m128 __A) { diff --git a/gcc/config/i386/f16cintrin.h b/gcc/config/i386/f16cintrin.h index 1181f8b..5cc37dd 100644 --- a/gcc/config/i386/f16cintrin.h +++ b/gcc/config/i386/f16cintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_F16C__ #endif /* __F16C__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _cvtsh_ss (unsigned short __S) { @@ -95,4 +99,8 @@ _mm256_cvtps_ph (__m256 __A, const int __I) #pragma GCC pop_options #endif /* __DISABLE_F16C__ */ +#ifdef __cplusplus +} +#endif + #endif /* _F16CINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/fma4intrin.h b/gcc/config/i386/fma4intrin.h index e1bdef7..0ee2bf8 100644 --- a/gcc/config/i386/fma4intrin.h +++ b/gcc/config/i386/fma4intrin.h @@ -37,6 +37,10 @@ #define __DISABLE_FMA4__ #endif /* __FMA4__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* 128b Floating point multiply/add type instructions. */ extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_macc_ps (__m128 __A, __m128 __B, __m128 __C) @@ -233,6 +237,10 @@ _mm256_msubadd_pd (__m256d __A, __m256d __B, __m256d __C) return (__m256d) __builtin_ia32_vfmaddsubpd256 ((__v4df)__A, (__v4df)__B, -(__v4df)__C); } +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_FMA4__ #undef __DISABLE_FMA4__ #pragma GCC pop_options diff --git a/gcc/config/i386/fmaintrin.h b/gcc/config/i386/fmaintrin.h index bfbb75d..806ff8e 100644 --- a/gcc/config/i386/fmaintrin.h +++ b/gcc/config/i386/fmaintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_FMA__ #endif /* __FMA__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_fmadd_pd (__m128d __A, __m128d __B, __m128d __C) @@ -294,6 +298,10 @@ _mm256_fmsubadd_ps (__m256 __A, __m256 __B, __m256 __C) -(__v8sf)__C); } +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_FMA__ #undef __DISABLE_FMA__ #pragma GCC pop_options diff --git a/gcc/config/i386/fxsrintrin.h b/gcc/config/i386/fxsrintrin.h index 98e73ee..34cc3cb 100644 --- a/gcc/config/i386/fxsrintrin.h +++ b/gcc/config/i386/fxsrintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_FXSR__ #endif /* __FXSR__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _fxsave (void *__P) @@ -70,4 +74,8 @@ _fxrstor64 (void *__P) #endif /* __DISABLE_FXSR__ */ +#ifdef __cplusplus +} +#endif + #endif /* _FXSRINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/gmm_malloc.h b/gcc/config/i386/gmm_malloc.h index 516b13b..c55db44 100644 --- a/gcc/config/i386/gmm_malloc.h +++ b/gcc/config/i386/gmm_malloc.h @@ -27,6 +27,10 @@ #include #include +#ifdef __cplusplus +extern "C" { +#endif + static __inline__ void* _mm_malloc (size_t size, size_t align) { @@ -71,4 +75,8 @@ _mm_free (void * aligned_ptr) free (((void **) aligned_ptr) [-1]); } +#ifdef __cplusplus +} +#endif + #endif /* _MM_MALLOC_H_INCLUDED */ diff --git a/gcc/config/i386/ia32intrin.h b/gcc/config/i386/ia32intrin.h index 5e7c893..a7fa538 100644 --- a/gcc/config/i386/ia32intrin.h +++ b/gcc/config/i386/ia32intrin.h @@ -25,6 +25,10 @@ # error "Never use directly; include instead." #endif +#ifdef __cplusplus +extern "C" { +#endif + /* 32bit bsf */ extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) @@ -291,3 +295,7 @@ __writeeflags (unsigned int X) #define _rotwr(a,b) __rorw((a), (b)) #define _rotl(a,b) __rold((a), (b)) #define _rotr(a,b) __rord((a), (b)) + +#ifdef __cplusplus +} +#endif diff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.h index 73b4859..49a03e4 100644 --- a/gcc/config/i386/immintrin.h +++ b/gcc/config/i386/immintrin.h @@ -78,6 +78,10 @@ _rdrand16_step (unsigned short *__P) return __builtin_ia32_rdrand16_step (__P); } +#ifdef __cplusplus +extern "C" { +#endif + extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _rdrand32_step (unsigned int *__P) @@ -174,4 +178,8 @@ _rdrand64_step (unsigned long long *__P) #endif /* __x86_64__ */ +#ifdef __cplusplus +} +#endif + #endif /* _IMMINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/lwpintrin.h b/gcc/config/i386/lwpintrin.h index 1cd046a..26d65f1 100644 --- a/gcc/config/i386/lwpintrin.h +++ b/gcc/config/i386/lwpintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_LWP__ #endif /* __LWP__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __llwpcb (void *pcbAddress) { @@ -71,6 +75,9 @@ __lwpval64 (unsigned long long data2, unsigned int data1, unsigned int flags) #endif #endif +#ifdef __cplusplus +} +#endif #ifdef __OPTIMIZE__ extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__)) diff --git a/gcc/config/i386/lzcntintrin.h b/gcc/config/i386/lzcntintrin.h index b680a35..d292f24 100644 --- a/gcc/config/i386/lzcntintrin.h +++ b/gcc/config/i386/lzcntintrin.h @@ -35,6 +35,10 @@ #define __DISABLE_LZCNT__ #endif /* __LZCNT__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __lzcnt16 (unsigned short __X) { @@ -72,4 +76,8 @@ _lzcnt_u64 (unsigned long long __X) #pragma GCC pop_options #endif /* __DISABLE_LZCNT__ */ +#ifdef __cplusplus +} +#endif + #endif /* _LZCNTINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/mm3dnow.h b/gcc/config/i386/mm3dnow.h index bf847f9..464e98f 100644 --- a/gcc/config/i386/mm3dnow.h +++ b/gcc/config/i386/mm3dnow.h @@ -36,6 +36,10 @@ #define __DISABLE_3dNOW__ #endif /* __3dNOW__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _m_femms (void) { @@ -210,6 +214,10 @@ _m_pswapd (__m64 __A) #endif /* __3dNOW_A__ */ +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_3dNOW__ #undef __DISABLE_3dNOW__ #pragma GCC pop_options diff --git a/gcc/config/i386/mmintrin.h b/gcc/config/i386/mmintrin.h index b351200..eaee690 100644 --- a/gcc/config/i386/mmintrin.h +++ b/gcc/config/i386/mmintrin.h @@ -33,6 +33,10 @@ #define __DISABLE_MMX__ #endif /* __MMX__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* The Intel API is flexible enough that we must allow aliasing with other vector types, and their scalar components. */ typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__)); @@ -939,4 +943,8 @@ _mm_set1_pi8 (char __b) #pragma GCC pop_options #endif /* __DISABLE_MMX__ */ +#ifdef __cplusplus +} +#endif + #endif /* _MMINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/pmm_malloc.h b/gcc/config/i386/pmm_malloc.h index 3be2f35..f8c99c7 100644 --- a/gcc/config/i386/pmm_malloc.h +++ b/gcc/config/i386/pmm_malloc.h @@ -34,6 +34,10 @@ extern int posix_memalign (void **, size_t, size_t); extern "C" int posix_memalign (void **, size_t, size_t) throw (); #endif +#ifdef __cplusplus +extern "C" { +#endif + static __inline void * _mm_malloc (size_t size, size_t alignment) { @@ -54,4 +58,8 @@ _mm_free (void * ptr) free (ptr); } +#ifdef __cplusplus +} +#endif + #endif /* _MM_MALLOC_H_INCLUDED */ diff --git a/gcc/config/i386/pmmintrin.h b/gcc/config/i386/pmmintrin.h index 6a79500..2c98a85 100644 --- a/gcc/config/i386/pmmintrin.h +++ b/gcc/config/i386/pmmintrin.h @@ -36,6 +36,10 @@ #define __DISABLE_SSE3__ #endif /* __SSE3__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Additional bits in the MXCSR. */ #define _MM_DENORMALS_ZERO_MASK 0x0040 #define _MM_DENORMALS_ZERO_ON 0x0040 @@ -124,6 +128,10 @@ _mm_mwait (unsigned int __E, unsigned int __H) __builtin_ia32_mwait (__E, __H); } +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_SSE3__ #undef __DISABLE_SSE3__ #pragma GCC pop_options diff --git a/gcc/config/i386/popcntintrin.h b/gcc/config/i386/popcntintrin.h index 41845d8..285e96a 100644 --- a/gcc/config/i386/popcntintrin.h +++ b/gcc/config/i386/popcntintrin.h @@ -30,6 +30,10 @@ #define __DISABLE_POPCNT__ #endif /* __POPCNT__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Calculate a number of bits set to 1. */ extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_popcnt_u32 (unsigned int __X) @@ -50,4 +54,8 @@ _mm_popcnt_u64 (unsigned long long __X) #pragma GCC pop_options #endif /* __DISABLE_POPCNT__ */ +#ifdef __cplusplus +} +#endif + #endif /* _POPCNTINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/prfchwintrin.h b/gcc/config/i386/prfchwintrin.h index b2f5772..f779a28 100644 --- a/gcc/config/i386/prfchwintrin.h +++ b/gcc/config/i386/prfchwintrin.h @@ -28,10 +28,18 @@ #ifndef _PRFCHWINTRIN_H_INCLUDED #define _PRFCHWINTRIN_H_INCLUDED +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _m_prefetchw (void *__P) { __builtin_prefetch (__P, 1, 3 /* _MM_HINT_T0 */); } +#ifdef __cplusplus +} +#endif + #endif /* _PRFCHWINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/rdseedintrin.h b/gcc/config/i386/rdseedintrin.h index 0ab18e5..98eb318 100644 --- a/gcc/config/i386/rdseedintrin.h +++ b/gcc/config/i386/rdseedintrin.h @@ -35,6 +35,10 @@ #endif /* __RDSEED__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _rdseed16_step (unsigned short *p) @@ -63,4 +67,8 @@ _rdseed64_step (unsigned long long *p) #pragma GCC pop_options #endif /* __DISABLE_RDSEED__ */ +#ifdef __cplusplus +} +#endif + #endif /* _RDSEEDINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/rtmintrin.h b/gcc/config/i386/rtmintrin.h index ac40d22..3aa8246 100644 --- a/gcc/config/i386/rtmintrin.h +++ b/gcc/config/i386/rtmintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_RTM__ #endif /* __RTM__ */ +#ifdef __cplusplus +extern "C" { +#endif + #define _XBEGIN_STARTED (~0u) #define _XABORT_EXPLICIT (1 << 0) #define _XABORT_RETRY (1 << 1) @@ -81,4 +85,8 @@ _xabort (const unsigned int imm) #pragma GCC pop_options #endif /* __DISABLE_RTM__ */ +#ifdef __cplusplus +} +#endif + #endif /* _RTMINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h index 886ace4..168b903 100644 --- a/gcc/config/i386/smmintrin.h +++ b/gcc/config/i386/smmintrin.h @@ -37,6 +37,10 @@ #define __DISABLE_SSE4_1__ #endif /* __SSE4_1__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Rounding mode macros. */ #define _MM_FROUND_TO_NEAREST_INT 0x00 #define _MM_FROUND_TO_NEG_INF 0x01 @@ -822,6 +826,10 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y) #define __DISABLE_SSE4_2__ #endif /* __SSE4_1__ */ +#ifdef __cplusplus +} +#endif + /* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, _mm_crc32_u8 (unsigned int __C, unsigned char __V) diff --git a/gcc/config/i386/tbmintrin.h b/gcc/config/i386/tbmintrin.h index 871f532..744b9ca 100644 --- a/gcc/config/i386/tbmintrin.h +++ b/gcc/config/i386/tbmintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_TBM__ #endif /* __TBM__ */ +#ifdef __cplusplus +extern "C" { +#endif + #ifdef __OPTIMIZE__ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __bextri_u32 (unsigned int __X, const unsigned int __I) @@ -177,4 +181,8 @@ __tzmsk_u64 (unsigned long long __X) #pragma GCC pop_options #endif /* __DISABLE_TBM__ */ +#ifdef __cplusplus +} +#endif + #endif /* _TBMINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/tmmintrin.h b/gcc/config/i386/tmmintrin.h index 89556d2..f89e33c 100644 --- a/gcc/config/i386/tmmintrin.h +++ b/gcc/config/i386/tmmintrin.h @@ -36,6 +36,10 @@ #define __DISABLE_SSSE3__ #endif /* __SSSE3__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadd_epi16 (__m128i __X, __m128i __Y) { @@ -241,6 +245,10 @@ _mm_abs_pi32 (__m64 __X) return (__m64) __builtin_ia32_pabsd ((__v2si)__X); } +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_SSSE3__ #undef __DISABLE_SSSE3__ #pragma GCC pop_options diff --git a/gcc/config/i386/wmmintrin.h b/gcc/config/i386/wmmintrin.h index 2002375..a22bb07 100644 --- a/gcc/config/i386/wmmintrin.h +++ b/gcc/config/i386/wmmintrin.h @@ -30,6 +30,10 @@ /* We need definitions from the SSE2 header file. */ #include +#ifdef __cplusplus +extern "C" { +#endif + /* AES */ #ifndef __AES__ @@ -124,6 +128,10 @@ _mm_clmulepi64_si128 (__m128i __X, __m128i __Y, const int __I) (__v2di)(__m128i)(Y), (int)(I))) #endif +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_PCLMUL__ #undef __DISABLE_PCLMUL__ #pragma GCC pop_options diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h index a3824e7..ee1a1fc 100644 --- a/gcc/config/i386/xmmintrin.h +++ b/gcc/config/i386/xmmintrin.h @@ -64,6 +64,10 @@ _mm_prefetch (const void *__P, enum _mm_hint __I) #define __DISABLE_SSE__ #endif /* __SSE__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* The Intel API is flexible enough that we must allow aliasing with other vector types, and their scalar components. */ typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__)); @@ -1254,6 +1258,10 @@ do { \ (row3) = __builtin_ia32_movhlps (__t3, __t2); \ } while (0) +#ifdef __cplusplus +} +#endif + /* For backward source compatibility. */ # include diff --git a/gcc/config/i386/xopintrin.h b/gcc/config/i386/xopintrin.h index cc82bc5..d567a98 100644 --- a/gcc/config/i386/xopintrin.h +++ b/gcc/config/i386/xopintrin.h @@ -36,6 +36,10 @@ #define __DISABLE_XOP__ #endif /* __XOP__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Integer multiply/add intructions. */ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C) @@ -836,6 +840,10 @@ _mm256_permute2_ps (__m256 __X, __m256 __Y, __m256i __C, const int __I) (int)(I))) #endif /* __OPTIMIZE__ */ +#ifdef __cplusplus +} +#endif + #ifdef __DISABLE_XOP__ #undef __DISABLE_XOP__ #pragma GCC pop_options diff --git a/gcc/config/i386/xsaveintrin.h b/gcc/config/i386/xsaveintrin.h index 47be25f..be2caea 100644 --- a/gcc/config/i386/xsaveintrin.h +++ b/gcc/config/i386/xsaveintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_XSAVE__ #endif /* __XSAVE__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _xsave (void *__P, long long __M) @@ -69,4 +73,8 @@ _xrstor64 (void *__P, long long __M) #pragma GCC pop_options #endif /* __DISABLE_XSAVE__ */ +#ifdef __cplusplus +} +#endif + #endif /* _XSAVEINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/xsaveoptintrin.h b/gcc/config/i386/xsaveoptintrin.h index d7534b4..90eeb45 100644 --- a/gcc/config/i386/xsaveoptintrin.h +++ b/gcc/config/i386/xsaveoptintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_XSAVEOPT__ #endif /* __XSAVEOPT__ */ +#ifdef __cplusplus +extern "C" { +#endif + extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _xsaveopt (void *__P, long long __M) @@ -55,4 +59,8 @@ _xsaveopt64 (void *__P, long long __M) #pragma GCC pop_options #endif /* __DISABLE_XSAVEOPT__ */ +#ifdef __cplusplus +} +#endif + #endif /* _XSAVEOPTINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/xtestintrin.h b/gcc/config/i386/xtestintrin.h index ba79e5c..864b727 100644 --- a/gcc/config/i386/xtestintrin.h +++ b/gcc/config/i386/xtestintrin.h @@ -34,6 +34,10 @@ #define __DISABLE_RTM__ #endif /* __RTM__ */ +#ifdef __cplusplus +extern "C" { +#endif + /* Return non-zero if the instruction executes inside an RTM or HLE code region. Return zero otherwise. */ extern __inline int @@ -48,4 +52,8 @@ _xtest (void) #pragma GCC pop_options #endif /* __DISABLE_RTM__ */ +#ifdef __cplusplus +} +#endif + #endif /* _XTESTINTRIN_H_INCLUDED */ -- 1.8.4.5