Fixed issue 64 and beautified code again

19 files changed, 2338 insertions, 2297 deletions

diff --git a/apps/uscxml-browser.cpp b/apps/uscxml-browser.cpp
index 2185aa9..f223cef 100644
--- a/apps/uscxml-browser.cpp
+++ b/apps/uscxml-browser.cpp
@@ -162,6 +162,9 @@ int main(int argc, char** argv) {
 					for (std::list<InterpreterIssue>::iterator issueIter = issues.begin(); issueIter != issues.end(); issueIter++) {
 						std::cout << *issueIter << std::endl;
 					}
+					if (issues.size() == 0) {
+						std::cout << "No issues found" << std::endl;
+					}
 
 				}
 
diff --git a/src/uscxml/Interpreter.cpp b/src/uscxml/Interpreter.cpp
index ed26561..ef7afde 100644
--- a/src/uscxml/Interpreter.cpp
+++ b/src/uscxml/Interpreter.cpp
@@ -924,9 +924,9 @@ InterpreterState InterpreterImpl::step(int waitForMS) {
 				return _state;
 			}
 
-            if (_state == USCXML_FINISHED || _state == USCXML_DESTROYED) {
-                return _state;
-            }
+			if (_state == USCXML_FINISHED || _state == USCXML_DESTROYED) {
+				return _state;
+			}
 
 			setInterpreterState(USCXML_MACROSTEPPED);
 		}
@@ -1472,7 +1472,9 @@ void InterpreterImpl::setupDOM() {
 		if (!stateElem.hasAttribute("id")) {
 			stateElem.setAttribute("id", UUID::getUUID());
 		}
-		_cachedStates[ATTR(stateElem, "id")] = stateElem;
+		// Issue 64 - we may not cache them as they may be in an embedded document
+		if (!isInEmbeddedDocument(stateElem))
+			_cachedStates[ATTR(stateElem, "id")] = stateElem;
 	}
 
 	// make sure every invoke has an idlocation or id - actually required!
@@ -2695,42 +2697,42 @@ void InterpreterImpl::finalizeAndAutoForwardCurrentEvent() {
 			Arabica::XPath::NodeSet<std::string> finalizes = DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "finalize", invokeIter->second.getElement());
 			for (size_t k = 0; k < finalizes.size(); k++) {
 				Element<std::string> finalizeElem = Element<std::string>(finalizes[k]);
-                
-                bool hasChildElems = false;
-                Node<std::string> child = finalizeElem.getFirstChild();
-                while(child) {
-                    if (child.getNodeType() == Node_base::ELEMENT_NODE) {
-                        hasChildElems = true;
-                        break;
-                    }
-                    child = child.getNextSibling();
-                }
-                
-                if (hasChildElems) {
-                    executeContent(finalizeElem);
-                } else {
-                    // Specification 6.5.2: http://www.w3.org/TR/scxml/#N110EF
-                    if (HAS_ATTR(invokeIter->second.getElement(), "namelist")) {
-                        std::list<std::string> names = tokenize(ATTR(invokeIter->second.getElement(), "namelist"));
-                        for (std::list<std::string>::iterator nameIter = names.begin(); nameIter != names.end(); nameIter++) {
-                            if (_currEvent.data.compound.find(*nameIter) != _currEvent.data.compound.end()) {
-                                _dataModel.assign(*nameIter, _currEvent.data.compound[*nameIter]);
-                            }
-                        }
-                    }
-                    
-                    Arabica::XPath::NodeSet<std::string> params = DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "param", invokeIter->second.getElement());
-                    for (size_t l = 0; l < params.size(); l++) {
-                        Element<std::string> paramElem = Element<std::string>(params[l]);
-                        if (HAS_ATTR(paramElem, "location") &&
-                            _currEvent.data.compound.find(ATTR(paramElem, "location")) != _currEvent.data.compound.end()) {
-                            std::string location = ATTR(paramElem, "location");
-                            _dataModel.assign(location, _currEvent.data.compound[location]);
-                        }
-                    }
-                    
-
-                }
+
+				bool hasChildElems = false;
+				Node<std::string> child = finalizeElem.getFirstChild();
+				while(child) {
+					if (child.getNodeType() == Node_base::ELEMENT_NODE) {
+						hasChildElems = true;
+						break;
+					}
+					child = child.getNextSibling();
+				}
+
+				if (hasChildElems) {
+					executeContent(finalizeElem);
+				} else {
+					// Specification 6.5.2: http://www.w3.org/TR/scxml/#N110EF
+					if (HAS_ATTR(invokeIter->second.getElement(), "namelist")) {
+						std::list<std::string> names = tokenize(ATTR(invokeIter->second.getElement(), "namelist"));
+						for (std::list<std::string>::iterator nameIter = names.begin(); nameIter != names.end(); nameIter++) {
+							if (_currEvent.data.compound.find(*nameIter) != _currEvent.data.compound.end()) {
+								_dataModel.assign(*nameIter, _currEvent.data.compound[*nameIter]);
+							}
+						}
+					}
+
+					Arabica::XPath::NodeSet<std::string> params = DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "param", invokeIter->second.getElement());
+					for (size_t l = 0; l < params.size(); l++) {
+						Element<std::string> paramElem = Element<std::string>(params[l]);
+						if (HAS_ATTR(paramElem, "location") &&
+						        _currEvent.data.compound.find(ATTR(paramElem, "location")) != _currEvent.data.compound.end()) {
+							std::string location = ATTR(paramElem, "location");
+							_dataModel.assign(location, _currEvent.data.compound[location]);
+						}
+					}
+
+
+				}
 			}
 		}
 		if (HAS_ATTR(invokeIter->second.getElement(), "autoforward") && stringIsTrue(ATTR(invokeIter->second.getElement(), "autoforward"))) {
@@ -2898,6 +2900,25 @@ Arabica::DOM::Element<std::string> InterpreterImpl::getState(const std::string&
 		return _cachedStates[stateId];
 	}
 
+#if 0
+	std::list<Element<std::string> > stateStack;
+	stateStack.push_back(_scxml);
+
+
+	while(stateStack.size() > 0) {
+		Element<std::string> curr = stateStack.front();
+		stateStack.pop_front();
+
+		if (HAS_ATTR(curr, "id") && ATTR(curr, "id") == stateId) {
+			_cachedStates[stateId] = curr;
+			return curr;
+		}
+
+		Arabica::XPath::NodeSet<std::string> children = getChildStates(curr);
+		stateStack.insert(stateStack.end(), children.begin(), children.end());
+	}
+
+#else
 	// first try atomic and compound states
 	NodeSet<std::string> target = _xpath.evaluate("//" + _nsInfo.xpathPrefix + "state[@id='" + stateId + "']", _scxml).asNodeSet();
 	if (target.size() > 0)
@@ -2917,7 +2938,6 @@ Arabica::DOM::Element<std::string> InterpreterImpl::getState(const std::string&
 	target = _xpath.evaluate("//" + _nsInfo.xpathPrefix + "history[@id='" + stateId + "']", _scxml).asNodeSet();
 	if (target.size() > 0)
 		goto FOUND;
-
 	{
 		ERROR_EXECUTION_THROW("No state with id '" + stateId + "' found");
 	}
@@ -2931,6 +2951,8 @@ FOUND:
 			}
 		}
 	}
+#endif
+
 	// return the empty node
 	return Arabica::DOM::Element<std::string>();
 }
diff --git a/src/uscxml/Interpreter.h b/src/uscxml/Interpreter.h
index 303e126..a22b7b8 100644
--- a/src/uscxml/Interpreter.h
+++ b/src/uscxml/Interpreter.h
@@ -62,7 +62,7 @@
 	e.name = "error.platform"; \
 	e.data.compound["cause"] = Data(msg, Data::VERBATIM); \
 	throw e; \
- 
+
 
 #define USCXML_MONITOR_CATCH(callback) \
 catch (Event e) { \
@@ -75,7 +75,7 @@ catch (Event e) { \
 if (_state == USCXML_DESTROYED) { \
 	throw boost::bad_weak_ptr(); \
 } \
- 
+
 
 #define USCXML_MONITOR_CALLBACK(callback)\
 for(monIter_t monIter = _monitors.begin(); monIter != _monitors.end(); monIter++) { \
@@ -404,37 +404,37 @@ public:
 
 	virtual void handleDOMEvent(Arabica::DOM::Events::Event<std::string>& event);
 
-  std::vector<std::string> getReachableTargets() {
+	std::vector<std::string> getReachableTargets() {
 
-    std::vector<std::string> e;
+		std::vector<std::string> e;
 		tthread::lock_guard<tthread::recursive_mutex> lock(_mutex);
-    Arabica::XPath::NodeSet<std::string> possibleTransitions = DOMUtils::filterChildElements( "transition", _configuration, false);
+		Arabica::XPath::NodeSet<std::string> possibleTransitions = DOMUtils::filterChildElements( "transition", _configuration, false);
 
-    for( size_t i = 0; i < possibleTransitions.size(); i++ ) {
-        Arabica::DOM::Node<std::string>         transitions = possibleTransitions[ i ];
-        Arabica::DOM::NamedNodeMap<std::string> attributes  = transitions.getAttributes();
-        Arabica::DOM::Node<std::string>         events      = attributes.getNamedItem("target");
-        e.push_back( std::string( events.getNodeValue() ) );
-    }
-    return e;
+		for( size_t i = 0; i < possibleTransitions.size(); i++ ) {
+			Arabica::DOM::Node<std::string>         transitions = possibleTransitions[ i ];
+			Arabica::DOM::NamedNodeMap<std::string> attributes  = transitions.getAttributes();
+			Arabica::DOM::Node<std::string>         events      = attributes.getNamedItem("target");
+			e.push_back( std::string( events.getNodeValue() ) );
+		}
+		return e;
 
-  }
+	}
 
-  std::vector<std::string> getEventDescriptors() {
+	std::vector<std::string> getEventDescriptors() {
 
-    std::vector<std::string> e;
+		std::vector<std::string> e;
 		tthread::lock_guard<tthread::recursive_mutex> lock(_mutex);
-    Arabica::XPath::NodeSet<std::string> possibleTransitions = DOMUtils::filterChildElements( "transition", _configuration, false);
+		Arabica::XPath::NodeSet<std::string> possibleTransitions = DOMUtils::filterChildElements( "transition", _configuration, false);
 
-    for( size_t i = 0; i < possibleTransitions.size(); i++ ) {
-        Arabica::DOM::Node<std::string>         transitions  = possibleTransitions[ i ];
-        Arabica::DOM::NamedNodeMap<std::string> attributes   = transitions.getAttributes();
-        Arabica::DOM::Node<std::string>         events       = attributes.getNamedItem("event");
-        e.push_back( std::string( events.getNodeValue() ) );
-    }
-    return e;
+		for( size_t i = 0; i < possibleTransitions.size(); i++ ) {
+			Arabica::DOM::Node<std::string>         transitions  = possibleTransitions[ i ];
+			Arabica::DOM::NamedNodeMap<std::string> attributes   = transitions.getAttributes();
+			Arabica::DOM::Node<std::string>         events       = attributes.getNamedItem("event");
+			e.push_back( std::string( events.getNodeValue() ) );
+		}
+		return e;
 
-  }
+	}
 
 protected:
 	static void run(void*); // static method for thread to run
@@ -623,13 +623,13 @@ public:
 		return _impl->reset();
 	}
 
-  std::vector<std::string> getReachableTargets() {
-    return _impl->getReachableTargets();
-  }
+	std::vector<std::string> getReachableTargets() {
+		return _impl->getReachableTargets();
+	}
 
-  std::vector<std::string> getEventDescriptors() {
-    return _impl->getEventDescriptors();
-  }
+	std::vector<std::string> getEventDescriptors() {
+		return _impl->getEventDescriptors();
+	}
 
 	void start() {
 		return _impl->start();
diff --git a/src/uscxml/messages/MMIMessages.cpp b/src/uscxml/messages/MMIMessages.cpp
index 1c6cc7d..814be5f 100644
--- a/src/uscxml/messages/MMIMessages.cpp
+++ b/src/uscxml/messages/MMIMessages.cpp
@@ -74,7 +74,7 @@ while (node) {\
 	}\
 	node = node.getNextSibling();\
 }\
- 
+
 
 namespace uscxml {
 
diff --git a/src/uscxml/plugins/datamodel/ecmascript/JavaScriptCore/dom/JSCTypedArrayCustom.cpp b/src/uscxml/plugins/datamodel/ecmascript/JavaScriptCore/dom/JSCTypedArrayCustom.cpp
index 1738899..b5122e8 100644
--- a/src/uscxml/plugins/datamodel/ecmascript/JavaScriptCore/dom/JSCTypedArrayCustom.cpp
+++ b/src/uscxml/plugins/datamodel/ecmascript/JavaScriptCore/dom/JSCTypedArrayCustom.cpp
@@ -36,7 +36,7 @@ char* name##Buffer = new char[name##MaxSize];\
 JSStringGetUTF8CString(name, name##Buffer, name##MaxSize);\
 std::string stringName(name##Buffer);\
 free(name##Buffer);\
- 
+
 
 #define JSC_TYPED_ARRAY_GET_PROP_RETURN(type)\
 size_t propMaxSize = JSStringGetMaximumUTF8CStringSize(propertyName);\
@@ -129,7 +129,7 @@ unsigned long index = boost::lexical_cast<unsigned long>(propName);\
 if (array->getLength() > index)\
 	return true;\
 return false;\
- 
+
 namespace Arabica {
 namespace DOM {
 
diff --git a/src/uscxml/plugins/datamodel/lua/LuaDataModel.cpp b/src/uscxml/plugins/datamodel/lua/LuaDataModel.cpp
index 77f4ef3..f6cb570 100644
--- a/src/uscxml/plugins/datamodel/lua/LuaDataModel.cpp
+++ b/src/uscxml/plugins/datamodel/lua/LuaDataModel.cpp
@@ -267,11 +267,11 @@ void LuaDataModel::setEvent(const Event& event) {
 				ERROR_EXECUTION_THROW(e.what());
 			}
 		} else {
-            // some error events have a dom node attached - do not throw for them
-            // issue65
-            if (!nameMatch("error.*", event.name)) {
-                ERROR_EXECUTION_THROW("No DOM support in Lua datamodel");
-            }
+			// some error events have a dom node attached - do not throw for them
+			// issue65
+			if (!nameMatch("error.*", event.name)) {
+				ERROR_EXECUTION_THROW("No DOM support in Lua datamodel");
+			}
 		}
 	} else if (event.content.length() > 0) {
 		// _event.data is a string or JSON
diff --git a/src/uscxml/plugins/datamodel/prolog/swi/SWIDataModel.cpp b/src/uscxml/plugins/datamodel/prolog/swi/SWIDataModel.cpp
index 2ec9fea..8b120c8 100644
--- a/src/uscxml/plugins/datamodel/prolog/swi/SWIDataModel.cpp
+++ b/src/uscxml/plugins/datamodel/prolog/swi/SWIDataModel.cpp
@@ -41,10 +41,10 @@ extern "C" {
 catch (PlException plex) { \
 	ERROR_EXECUTION_THROW((char*)plex); \
 } \
- 
+
 #define PL_MODULE \
 _interpreter.getSessionId().c_str() \
- 
+
 #define SET_PL_ENGINE(dm) \
 assert(_swiEngines.find(dm) != _swiEngines.end()); \
 int rc = PL_set_engine(_swiEngines[dm], NULL); \
diff --git a/src/uscxml/plugins/datamodel/promela/parser/promela.lex.yy.cpp b/src/uscxml/plugins/datamodel/promela/parser/promela.lex.yy.cpp
index 50e9776..3a99921 100644
--- a/src/uscxml/plugins/datamodel/promela/parser/promela.lex.yy.cpp
+++ b/src/uscxml/plugins/datamodel/promela/parser/promela.lex.yy.cpp
@@ -644,7 +644,7 @@ static yyconst flex_int16_t yy_rule_linenum[46] = {
 #define YY_USER_INIT \
   yycolumn = yylloc->first_line = yylloc->first_column = 0; \
   yylineno = yylloc->last_line = yylloc->last_column = 0; \
- 
+
 //int yycolumn = 1;
 
 #define YY_USER_ACTION \
diff --git a/src/uscxml/plugins/datamodel/promela/parser/promela.tab.cpp b/src/uscxml/plugins/datamodel/promela/parser/promela.tab.cpp
index 05ca549..098c890 100644
--- a/src/uscxml/plugins/datamodel/promela/parser/promela.tab.cpp
+++ b/src/uscxml/plugins/datamodel/promela/parser/promela.tab.cpp
@@ -1596,7 +1596,7 @@ yysetstate:
 		{
 			yytype_int16 *yyss1 = yyss;
 			union yyalloc *yyptr =
-					    (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+				    (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
 			if (! yyptr)
 				goto yyexhaustedlab;
 			YYSTACK_RELOCATE (yyss_alloc, yyss);
diff --git a/src/uscxml/plugins/invoker/graphics/openscenegraph/OSGInvoker.cpp b/src/uscxml/plugins/invoker/graphics/openscenegraph/OSGInvoker.cpp
index 597198d..d2bf74d 100644
--- a/src/uscxml/plugins/invoker/graphics/openscenegraph/OSGInvoker.cpp
+++ b/src/uscxml/plugins/invoker/graphics/openscenegraph/OSGInvoker.cpp
@@ -69,7 +69,7 @@ bool pluginConnect(pluma::Host& host) {
 } else if (iequals(LOCALNAME(childElem), tagName) && \
 	validChildren.find(tagName) != validChildren.end()) { \
 		procFunc(childElem);\
- 
+
 
 OSGInvoker::OSGInvoker() {
 }
diff --git a/src/uscxml/plugins/invoker/xhtml/template/xhtml-invoker.inc.h b/src/uscxml/plugins/invoker/xhtml/template/xhtml-invoker.inc.h
index c5a5798..971260b 100644
--- a/src/uscxml/plugins/invoker/xhtml/template/xhtml-invoker.inc.h
+++ b/src/uscxml/plugins/invoker/xhtml/template/xhtml-invoker.inc.h
@@ -1,691 +1,691 @@
 unsigned char template_xhtml_invoker_html[] = {
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+	0x7d, 0x0a, 0x09, 0x09, 0x09, 0x09, 0x7d, 0x29, 0x3b, 0x0a, 0x09, 0x09,
+	0x09, 0x09, 0x73, 0x63, 0x78, 0x6d, 0x6c, 0x2e, 0x6c, 0x6f, 0x6e, 0x67,
+	0x70, 0x6f, 0x6c, 0x6c, 0x28, 0x29, 0x3b, 0x0a, 0x09, 0x09, 0x09, 0x09,
+	0x5f, 0x70, 0x61, 0x72, 0x65, 0x6e, 0x74, 0x20, 0x3d, 0x20, 0x73, 0x63,
+	0x78, 0x6d, 0x6c, 0x3b, 0x0a, 0x0a, 0x09, 0x09, 0x09, 0x09, 0x77, 0x69,
+	0x6e, 0x64, 0x6f, 0x77, 0x2e, 0x6f, 0x6e, 0x62, 0x65, 0x66, 0x6f, 0x72,
+	0x65, 0x75, 0x6e, 0x6c, 0x6f, 0x61, 0x64, 0x20, 0x3d, 0x20, 0x66, 0x75,
+	0x6e, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x20, 0x28, 0x65, 0x29, 0x20, 0x7b,
+	0x0a, 0x09, 0x09, 0x09, 0x09, 0x09, 0x73, 0x63, 0x78, 0x6d, 0x6c, 0x2e,
+	0x64, 0x69, 0x73, 0x63, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x28, 0x29,
+	0x3b, 0x0a, 0x09, 0x09, 0x09, 0x09, 0x09, 0x2f, 0x2f, 0x20, 0x72, 0x65,
+	0x74, 0x75, 0x72, 0x6e, 0x20, 0x27, 0x59, 0x6f, 0x75, 0x20, 0x68, 0x61,
+	0x76, 0x65, 0x20, 0x75, 0x6e, 0x73, 0x61, 0x76, 0x65, 0x64, 0x20, 0x63,
+	0x68, 0x61, 0x6e, 0x67, 0x65, 0x73, 0x21, 0x27, 0x3b, 0x0a, 0x09, 0x09,
+	0x09, 0x09, 0x7d, 0x3b, 0x0a, 0x09, 0x09, 0x09, 0x7d, 0x29, 0x3b, 0x0a,
+	0x09, 0x09, 0x3c, 0x2f, 0x73, 0x63, 0x72, 0x69, 0x70, 0x74, 0x3e, 0x0a,
+	0x0a, 0x09, 0x3c, 0x2f, 0x68, 0x65, 0x61, 0x64, 0x3e, 0x0a, 0x09, 0x3c,
+	0x62, 0x6f, 0x64, 0x79, 0x3e, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 0x79, 0x3e,
+	0x0a, 0x3c, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0x0a
 };
 unsigned int template_xhtml_invoker_html_len = 8253;
diff --git a/src/uscxml/transform/ChartToC.cpp b/src/uscxml/transform/ChartToC.cpp
index a599532..cf4c175 100644
--- a/src/uscxml/transform/ChartToC.cpp
+++ b/src/uscxml/transform/ChartToC.cpp
@@ -58,7 +58,7 @@ ChartToC::ChartToC(const Interpreter& other) : TransformerImpl(), _topMostMachin
 	findNestedMachines();
 
 //    std::cout << _scxml;
-    
+
 	if (_extensions.find("prefix") != _extensions.end()) {
 		_prefixes = new std::list<std::string>();
 		std::pair<std::multimap<std::string, std::string>::iterator,
@@ -2180,8 +2180,8 @@ void ChartToC::writeFSM(std::ostream& stream) {
 	stream << "    }" << std::endl;
 	stream << std::endl;
 
-    stream << "DEQUEUE_EVENT:" << std::endl;
-    stream << "    if (ctx->flags & USCXML_CTX_SPONTANEOUS) {" << std::endl;
+	stream << "DEQUEUE_EVENT:" << std::endl;
+	stream << "    if (ctx->flags & USCXML_CTX_SPONTANEOUS) {" << std::endl;
 	stream << "        ctx->event = NULL;" << std::endl;
 	stream << "        goto SELECT_TRANSITIONS;" << std::endl;
 	stream << "    }" << std::endl;
diff --git a/src/uscxml/transform/ChartToPromela.cpp b/src/uscxml/transform/ChartToPromela.cpp
index b0c3c79..a9afea6 100644
--- a/src/uscxml/transform/ChartToPromela.cpp
+++ b/src/uscxml/transform/ChartToPromela.cpp
@@ -110,7 +110,7 @@ for (std::set<int>::iterator transRefIter = transList->transitionRefs.begin(); \
         stream << padding << _prefix << "transitions[" << *transRefIter << "] = "#value"; " << std::endl; \
     } \
 } \
- 
+
 
 #define DUMP_STATS(disregardTime) \
 uint64_t now = tthread::chrono::system_clock::now(); \
diff --git a/src/uscxml/transform/ChartToVHDL.cpp b/src/uscxml/transform/ChartToVHDL.cpp
index 1bdcafe..127dc91 100644
--- a/src/uscxml/transform/ChartToVHDL.cpp
+++ b/src/uscxml/transform/ChartToVHDL.cpp
@@ -37,1417 +37,1417 @@
 
 namespace uscxml {
 
-    using namespace Arabica::DOM;
-    using namespace Arabica::XPath;
-
-    Transformer ChartToVHDL::transform(const Interpreter& other) {
-        ChartToVHDL* c2c = new ChartToVHDL(other);
-
-        return boost::shared_ptr<TransformerImpl>(c2c);
-    }
-
-    ChartToVHDL::ChartToVHDL(const Interpreter& other) : ChartToC(other), _eventTrie(".") {
-    }
-
-    ChartToVHDL::~ChartToVHDL() {
-    }
-
-    void ChartToVHDL::checkDocument() {
-        // filter unsupported stuff
-        Arabica::XPath::NodeSet<std::string> unsupported;
-
-        std::set<std::string> elements;
-        elements.insert(_nsInfo.xmlNSPrefix + "datamodel");
-        elements.insert(_nsInfo.xmlNSPrefix + "data");
-        elements.insert(_nsInfo.xmlNSPrefix + "assign");
-        elements.insert(_nsInfo.xmlNSPrefix + "donedata");
-        elements.insert(_nsInfo.xmlNSPrefix + "content");
-        elements.insert(_nsInfo.xmlNSPrefix + "param");
-        elements.insert(_nsInfo.xmlNSPrefix + "script");
-
-        elements.insert(_nsInfo.xmlNSPrefix + "parallel");
-        elements.insert(_nsInfo.xmlNSPrefix + "history");
-
-        elements.insert(_nsInfo.xmlNSPrefix + "if"); // implicit elseif und else
-        elements.insert(_nsInfo.xmlNSPrefix + "foreach");
-        elements.insert(_nsInfo.xmlNSPrefix + "send");
-        elements.insert(_nsInfo.xmlNSPrefix + "cancel");
-        elements.insert(_nsInfo.xmlNSPrefix + "invoke");
-        elements.insert(_nsInfo.xmlNSPrefix + "finalize");
-        unsupported = DOMUtils::inDocumentOrder(elements, _scxml);
-
-        std::stringstream ss;
-        if (unsupported.size() > 0) {
-            for (size_t i = 0; i < unsupported.size(); i++) {
-                ss << "  " << DOMUtils::xPathForNode(unsupported[i]) << " unsupported" << std::endl;
-            }
-            throw std::runtime_error("Unsupported elements found:\n" + ss.str());
-        }
-
-        elements.clear();
-        elements.insert(_nsInfo.xmlNSPrefix + "transition");
-        unsupported = DOMUtils::inDocumentOrder(elements, _scxml);
-
-        for (size_t i = 0; i < unsupported.size(); i++) {
-            Element<std::string> transition(unsupported[i]);
-            if (HAS_ATTR(transition, "cond")) {
-                ERROR_PLATFORM_THROW("transition with conditions not supported!");
-            }
-            if (!HAS_ATTR(transition, "target")) {
-                ERROR_PLATFORM_THROW("targetless transition not supported!");
-            }
-        }
-
-    }
-
-    std::string ChartToVHDL::eventNameEscape(const std::string& eventName) {
-        std::string escaped = escape(eventName);
-        boost::replace_all(escaped, ".", "_");
-        return escaped;
-    }
-
-    void ChartToVHDL::findEvents() {
-        // elements with an event attribute
-        NodeSet<std::string> withEvent;
-        withEvent.push_back(DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "raise", _scxml, true));
-        withEvent.push_back(DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "send", _scxml, true));
-        withEvent.push_back(DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "transition", _scxml, true)); // TODO was haben events da verloren???
-
-        for (size_t i = 0; i < withEvent.size(); i++) {
-            if (HAS_ATTR_CAST(withEvent[i], "event")) {
-                // TODO: tokenize!
-                if (ATTR_CAST(withEvent[i], "event") != "*")
-                    _eventTrie.addWord(ATTR_CAST(withEvent[i], "event"));
-            }
-        }
-
-        std::set<std::string> elements;
-        elements.insert(_nsInfo.xmlNSPrefix + "raise");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "if");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "elseif");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "else");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "foreach");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "log");
-        elements.insert(_nsInfo.xmlNSPrefix + "send");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "assign");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "script");
-        //        elements.insert(_nsInfo.xmlNSPrefix + "cancel");
-        _execContent = DOMUtils::inDocumentOrder(elements, _scxml);
-
-    }
-
-    void ChartToVHDL::writeTo(std::ostream& stream) {
-        // same preparations as the C transformation
-        prepare();
-
-        //    checkDocument();
-        findEvents();
-
-
-        stream << "-- generated from " << _sourceURL.asString() << std::endl;
-        stream << "-- run as " << std::endl;
-        stream << "--   ghdl --clean && ghdl -a foo.vhdl && ghdl -e tb && ./tb --stop-time=10ms --vcd=foo.vcd" << std::endl;
-        stream << std::endl;
-
-        writeTypes(stream);
-        writeFiFo(stream);
-        writeEventController(stream);
-        writeMicroStepper(stream);
-        writeTestbench(stream);
-    }
-
-    void ChartToVHDL::writeTypes(std::ostream & stream) {
-        std::string seperator;
-
-        stream << "-- required global types" << std::endl;
-        stream << "library IEEE;" << std::endl;
-        stream << "use IEEE.std_logic_1164.all;" << std::endl;
-        stream << std::endl;
-        stream << "package machine" << _md5 << " is" << std::endl;
-        // create state type
-        stream << "  subtype state_type is std_logic_vector( ";
-        stream << _states.size() - 1;
-        stream << " downto 0);" << std::endl;
-
-        std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix("");
-        stream << "  type event_type is ( hwe_null, ";
-        seperator = "";
-
-        for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-            stream << seperator << "hwe_" << eventNameEscape((*eventIter)->value);
-            seperator = ", ";
-        }
-        stream << " );" << std::endl;
-
-        stream << "end machine" << _md5 << ";" << std::endl;
-        stream << std::endl;
-        stream << "-- END needed global types" << std::endl;
-    }
-
-    void ChartToVHDL::writeIncludes(std::ostream & stream) {
-        // Add controler specific stuff here
-        stream << "library IEEE;" << std::endl;
-        stream << "use IEEE.std_logic_1164.all;" << std::endl;
-        stream << "use work.machine" << _md5 << ".all;" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeTestbench(std::ostream& stream) {
-
-        stream << "-- TESTBENCH" << std::endl;
-        writeIncludes(stream);
-        stream << std::endl;
-
-        stream << "-- empty entity" << std::endl;
-        stream << "entity tb is" << std::endl;
-        stream << "end entity tb;" << std::endl;
-        stream << std::endl;
-
-        stream << "architecture bhv of tb is" << std::endl;
-        stream << std::endl;
-
-        // modules
-        stream << "  -- Module declaration" << std::endl;
-        stream << "  component micro_stepper is" << std::endl;
-        stream << "    port (" << std::endl;
-        stream << "    --inputs" << std::endl;
-        stream << "    clk  :in    std_logic;" << std::endl;
-        stream << "    rst_i  :in    std_logic;" << std::endl;
-        stream << "    en   :in    std_logic;" << std::endl;
-        stream << "    next_event_i    :in  event_type;" << std::endl;
-        stream << "    next_event_we_i :in  std_logic;" << std::endl;
-        stream << "    --outputs" << std::endl;
-        stream << "    error_o     :out std_logic;" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "    state_active_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "    entry_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "    exit_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "    transition_set_" << ATTR(transition, "postFixOrder") << "_o :out std_logic;"
-                        << std::endl;
-            }
-        }
-
-        stream << "    completed_o :out std_logic" << std::endl;
-        stream << "    );" << std::endl;
-        stream << "  end component;" << std::endl;
-        stream << std::endl;
-
-        stream << "  component event_controller is" << std::endl;
-        stream << "  port(" << std::endl;
-        stream << "    --inputs" << std::endl;
-        stream << "    clk  :in    std_logic;" << std::endl;
-        stream << "    rst_i  :in    std_logic;" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "    state_active_" << ATTR(state, "documentOrder")
-                    << "_i :in std_logic;" << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "    entry_set_" << ATTR(state, "documentOrder")
-                        << "_i :in std_logic;" << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "    exit_set_" << ATTR(state, "documentOrder")
-                        << "_i :in std_logic;" << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "    transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_i :in std_logic;" << std::endl;
-            }
-        }
-        stream << "    --outputs" << std::endl;
-        stream << "    micro_stepper_en_o :out  std_logic;" << std::endl;
-        stream << "    event_o    :out  event_type;" << std::endl;
-        stream << "    event_we_o :out  std_logic" << std::endl;
-        //        stream << "    done_o :out std_logic" << std::endl;
-        stream << ");" << std::endl;
-        stream << "end component; " << std::endl;
-
-        // signals
-        stream << "  -- input" << std::endl;
-        stream << "  signal clk   : std_logic := '0';" << std::endl;
-        stream << "  signal reset : std_logic;" << std::endl;
-        stream << "  signal dut_enable : std_logic;" << std::endl;
-        stream << "  signal next_event_we_i : std_logic;" << std::endl;
-        stream << "  signal next_event_i : event_type;" << std::endl;
-        stream << std::endl;
-
-        stream << "  -- output" << std::endl;
-        stream << "  signal error_o, completed_o : std_logic;" << std::endl;
-        stream << std::endl;
-
-        stream << "  -- wiring" << std::endl;
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "  signal state_active_" << ATTR(state, "documentOrder")
-                    << "_sig : std_logic;" << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "  signal entry_set_" << ATTR(state, "documentOrder")
-                        << "_sig : std_logic;" << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "  signal exit_set_" << ATTR(state, "documentOrder")
-                        << "_sig : std_logic;" << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "  signal transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_sig : std_logic;" << std::endl;
-            }
-        }
-
-        // wiring
-        stream << "begin" << std::endl;
-        stream << "  clk   <= not clk  after 20 ns;  -- 25 MHz clock frequency" << std::endl;
-        stream << "  reset <= '1', '0' after 100 ns; -- generates reset signal: --__" << std::endl;
-        stream << std::endl;
-
-        stream << "  -- Module instantiation" << std::endl;
-        stream << "  dut : micro_stepper" << std::endl;
-        stream << "    port map (" << std::endl;
-        stream << "      clk       => clk," << std::endl;
-        stream << "      rst_i     => reset," << std::endl;
-        stream << "      en     => dut_enable," << std::endl;
-        stream << std::endl;
-
-        stream << "      next_event_i     => next_event_i," << std::endl;
-        stream << "      next_event_we_i => next_event_we_i," << std::endl;
-        stream << "      error_o  => error_o," << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "      state_active_" << ATTR(state, "documentOrder")
-                    << "_o => state_active_" << ATTR(state, "documentOrder")
-                    << "_sig," << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "      entry_set_" << ATTR(state, "documentOrder")
-                        << "_o => entry_set_" << ATTR(state, "documentOrder")
-                        << "_sig," << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "      exit_set_" << ATTR(state, "documentOrder")
-                        << "_o => exit_set_" << ATTR(state, "documentOrder")
-                        << "_sig," << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "      transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_o => transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_sig," << std::endl;
-            }
-        }
-
-        stream << "      completed_o  => completed_o" << std::endl;
-        stream << "      );" << std::endl;
-        stream << std::endl;
-
-        stream << "  ec : event_controller" << std::endl;
-        stream << "    port map (" << std::endl;
-        stream << "      clk       => clk," << std::endl;
-        stream << "      rst_i     => reset," << std::endl;
-        stream << std::endl;
-
-        stream << "      event_o     => next_event_i," << std::endl;
-        stream << "      event_we_o => next_event_we_i," << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "      state_active_" << ATTR(state, "documentOrder")
-                    << "_i => state_active_" << ATTR(state, "documentOrder")
-                    << "_sig," << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "      entry_set_" << ATTR(state, "documentOrder")
-                        << "_i => entry_set_" << ATTR(state, "documentOrder")
-                        << "_sig," << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "      exit_set_" << ATTR(state, "documentOrder")
-                        << "_i => exit_set_" << ATTR(state, "documentOrder")
-                        << "_sig," << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "      transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_i => transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_sig," << std::endl;
-            }
-        }
-
-        stream << "      micro_stepper_en_o  => dut_enable" << std::endl;
-        //        stream << "      done_o  => open" << std::endl;
-        stream << "      );" << std::endl;
-        stream << std::endl;
-
-        stream << "end architecture;" << std::endl;
-        stream << "-- END TESTBENCH" << std::endl;
-
-    }
-
-    void ChartToVHDL::writeExContentBlock(std::ostream & stream,
-            std::string index, std::list< Element<std::string> > commandSequence) {
-        // index should be [entry, transition, exit]_<index of state/transition>_<optional index for block>
-
-        // write clock blocks
-    }
-
-    void ChartToVHDL::writeEventController(std::ostream & stream) {
-        // Add controler specific stuff here
-        // create hardware top level
-        stream << "-- Event Controller Logic" << std::endl;
-        writeIncludes(stream);
-        stream << "entity event_controller is" << std::endl;
-        stream << "port(" << std::endl;
-        stream << "    --inputs" << std::endl;
-        stream << "    clk  :in    std_logic;" << std::endl;
-        stream << "    rst_i  :in    std_logic;" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "    state_active_" << ATTR(state, "documentOrder")
-                    << "_i :in std_logic;" << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "    entry_set_" << ATTR(state, "documentOrder")
-                        << "_i :in std_logic;" << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "    exit_set_" << ATTR(state, "documentOrder")
-                        << "_i :in std_logic;" << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "    transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_i :in std_logic;" << std::endl;
-            }
-        }
-
-        stream << "    --outputs" << std::endl;
-        stream << "    micro_stepper_en_o :out  std_logic;" << std::endl;
-        stream << "    event_o    :out  event_type;" << std::endl;
-        stream << "    event_we_o :out  std_logic" << std::endl;
-        stream << ");" << std::endl;
-        stream << "end event_controller; " << std::endl;
-
-        stream << std::endl;
-        stream << "architecture behavioral of event_controller is " << std::endl;
-        stream << std::endl;
-
-        // Add signals and components
-        stream << "signal rst : std_logic;" << std::endl;
-        stream << "signal micro_stepper_en : std_logic;" << std::endl;
-        stream << "signal cmpl_buf : std_logic;" << std::endl;
-        stream << "signal completed_sig : std_logic;" << std::endl;
-        stream << "signal event_bus : event_type;" << std::endl;
-        stream << "signal event_we  : std_logic;" << std::endl;
-
-        for (int i = 0; i < _execContent.size(); i++) {
-            stream << "signal done_" << toStr(i) << "_sig : std_logic;" << std::endl;
-            stream << "signal start_" << toStr(i) << "_sig : std_logic;" << std::endl;
-        }
-
-        stream << "-- sequence input line" << std::endl;
-        for (int i = 0; i < _execContent.size(); i++) {
-            stream << "signal seq_" << toStr(i) << "_sig : std_logic;" << std::endl;
-        }
-        stream << std::endl;
-
-        stream << "begin" << std::endl;
-        stream << std::endl;
-        // system signal mapping
-        stream << "rst <= rst_i;" << std::endl;
-        stream << "micro_stepper_en_o <= micro_stepper_en;" << std::endl;
-        stream << "event_o <= event_bus;" << std::endl;
-        stream << "event_we_o <= event_we;" << std::endl;
-        stream << std::endl;
-
-        // stall management
-        stream << "-- stalling microstepper" << std::endl;
-        //        stream << "ms_enable_manager : process (clk, rst) " << std::endl;
-        //        stream << "begin" << std::endl;
-        //        stream << "  if rst = '1' then" << std::endl;
-        //        stream << "    micro_stepper_en <= '1';" << std::endl;
-        //        stream << "  elsif rising_edge(clk) then" << std::endl;
-        //         stream << "    " << std::endl;
-        stream << "micro_stepper_en <= completed_sig or not ( '0' ";
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << std::endl << "      or entry_set_" << ATTR(state, "documentOrder")
-                        << "_i";
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << std::endl << "      or exit_set_" << ATTR(state, "documentOrder")
-                        << "_i";
-            }
-        }
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << std::endl << "      or transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_i";
-            }
-        }
-        stream << ");" << std::endl;
-        //        stream << "  end if;" << std::endl;
-        //        stream << "end process;" << std::endl;
-        stream << std::endl;
-
-        // write enable management
-        //        stream << "-- write enable for FIFO buffer" << std::endl;
-        //        stream << "event_we <= not rst and ('0'";
-        //        for (int i = 0; i < _execContent.size(); i++) {
-        //            stream << std::endl << "   or start_" << toStr(i) << "_sig";
-        //        }
-        //        stream << ");" << std::endl;
-        //        stream << std::endl;
-
-        // sequential code operation
-        stream << "-- seq code block " << std::endl;
-        stream << "ex_content_block : process (clk, rst) " << std::endl;
-        stream << "begin" << std::endl;
-        stream << "  if rst = '1' then" << std::endl;
-        for (int i = 0; i < _execContent.size(); i++) {
-            stream << "    done_" << toStr(i) << "_sig <= '0';" << std::endl;
-        }
-        stream << "    event_bus <= hwe_null;" << std::endl;
-        stream << "    event_we <= '0';" << std::endl;
-        stream << "    cmpl_buf <= '0';" << std::endl;
-        stream << "    completed_sig <= '0';" << std::endl;
-        stream << "  elsif rising_edge(clk) then" << std::endl;
-
-        stream << "    if micro_stepper_en = '1' then" << std::endl;
-        stream << "      cmpl_buf <= '0' ;" << std::endl;
-        stream << "    else" << std::endl;
-        stream << "      cmpl_buf <= seq_" << toStr(_execContent.size() - 1)
-                << "_sig;" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "    completed_sig <= cmpl_buf;" << std::endl << std::endl;
-        std::string seperator = "    ";
-        for (int i = 0; i < _execContent.size(); i++) {
-            Element<std::string> exContentElem(_execContent[i]);
-
-            //TODO if raise
-            if (TAGNAME(_nsInfo.xmlNSPrefix + exContentElem) == "raise" ||
-                    TAGNAME(_nsInfo.xmlNSPrefix + exContentElem) == "send") {
-                stream << seperator << "if start_" << toStr(i) << "_sig = '1' then"
-                        << std::endl;
-                //TODO use escape
-                stream << "      event_bus <= hwe_" << ATTR(exContentElem, "event")
-                        << ";" << std::endl;
-                stream << "      done_" << toStr(i) << "_sig <= '1';" << std::endl;
-                stream << "      event_we <= '1';" << std::endl;
-                seperator = "    els";
-            }
-        }
-        stream << "    elsif micro_stepper_en = '1' then" << std::endl;
-        for (int i = 0; i < _execContent.size(); i++) {
-            Element<std::string> exContentElem(_execContent[i]);
-
-            //TODO if raise
-            if (TAGNAME(_nsInfo.xmlNSPrefix + exContentElem) == "raise") {
-                stream << "      done_" << toStr(i) << "_sig <= '0';" << std::endl;
-            }
-        }
-        stream << "      event_we <= '0';" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "  end if;" << std::endl;
-        stream << "end process;" << std::endl;
-        stream << std::endl;
-
-        for (size_t i = 0; i < _execContent.size(); i++) {
-            // start lines
-            stream << "start_" << toStr(i) << "_sig <= "
-                    << getLineForExecContent(_execContent[i]) << " and "
-                    << "not done_" << toStr(i) << "_sig";
-            if (i != 0) { // if not first element
-                stream << " and seq_" << toStr(i) << "_sig";
-            }
-            stream << ";" << std::endl;
-
-        }
-
-        stream << "seq_0_sig <= '1';" << std::endl;
-        for (size_t i = 1; i < _execContent.size(); i++) {
-            // seq lines (input if process i is in seqence now)
-            stream << "seq_" << toStr(i) << "_sig <= "
-                    << "done_" << toStr(i - 1) << "_sig or "
-                    << "( not "
-                    << getLineForExecContent(_execContent[i - 1]);
-            stream << " and seq_" << toStr(i - 1) << "_sig";
-            stream << " );" << std::endl;
-        }
-        stream << std::endl;
-
-        stream << "end behavioral; " << std::endl;
-        stream << "-- END Event Controller Logic" << std::endl;
-    }
-
-    std::string ChartToVHDL::getLineForExecContent(const Arabica::DOM::Node<std::string>& elem) {
-        Arabica::DOM::Node<std::string> ecBlock = elem;
-        while (ecBlock) {
-            if (ecBlock.getNodeType() == Arabica::DOM::Node_base::ELEMENT_NODE) {
-                std::string localName = LOCALNAME_CAST(ecBlock);
-                if (localName == _nsInfo.xmlNSPrefix + "transition") {
-                    return "transition_set_" + ATTR_CAST(ecBlock, "postFixOrder") + "_i";
-                }
-
-                if (localName == _nsInfo.xmlNSPrefix + "onentry") {
-                    return "entry_set_" + ATTR_CAST(ecBlock.getParentNode(), "documentOrder") + "_i";
-                }
-
-                if (localName == _nsInfo.xmlNSPrefix + "onexit") {
-                    return "exit_set_" + ATTR_CAST(ecBlock.getParentNode(), "documentOrder") + "_i";
-                }
-
-            }
-            ecBlock = ecBlock.getParentNode();
-        }
-
-        return "";
-    }
-
-    void ChartToVHDL::writeMicroStepper(std::ostream & stream) {
-        // create MicroStepper top level
-        stream << "-- FSM Logic" << std::endl;
-        writeIncludes(stream);
-        stream << "entity micro_stepper is" << std::endl;
-        stream << "port(" << std::endl;
-        stream << "    --inputs" << std::endl;
-        stream << "    clk  :in    std_logic;" << std::endl;
-        stream << "    rst_i  :in    std_logic;" << std::endl;
-        stream << "    en   :in    std_logic;" << std::endl;
-        stream << "    next_event_i    :in  event_type;" << std::endl;
-        stream << "    next_event_we_i :in  std_logic;" << std::endl;
-        stream << "    --outputs" << std::endl;
-        stream << "    error_o     :out std_logic;" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "    state_active_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "    entry_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "    exit_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "    transition_set_" << ATTR(transition, "postFixOrder") << "_o :out std_logic;"
-                        << std::endl;
-            }
-        }
-
-        stream << "    completed_o :out std_logic" << std::endl;
-        stream << ");" << std::endl;
-        stream << "end micro_stepper; " << std::endl;
-
-        stream << std::endl;
-        stream << "architecture behavioral of micro_stepper is " << std::endl;
-        stream << std::endl;
-
-        // Add signals and components
-        writeSignalsAndComponents(stream);
-
-        stream << std::endl;
-        stream << "begin" << std::endl;
-        stream << std::endl;
-
-        // signal mapping
-        writeModuleInstantiation(stream);
-
-        // signal handler
-        writeSpontaneousHandler(stream);
-        writeErrorHandler(stream);
-        writeInternalEventHandler(stream);
-        writeStateHandler(stream);
-        writeResetHandler(stream);
-
-        // combinatorial logic for Sn+1
-        writeOptimalTransitionSetSelection(stream);
-        writeExitSet(stream);
-        writeCompleteEntrySet(stream);
-        writeEntrySet(stream);
-        writeDefaultCompletions(stream);
-        writeActiveStateNplusOne(stream);
-
-        // connect output signals
-        writeSystemSignalMapping(stream);
-
-
-        stream << std::endl;
-        stream << "end behavioral; " << std::endl;
-        stream << "-- END FSM Logic" << std::endl;
-    }
-
-    void ChartToVHDL::writeFiFo(std::ostream & stream) {
-        // taken from: http://www.deathbylogic.com/2013/07/vhdl-standard-fifo/
-        // alternativly take fifo logic for a ram device: http://www.eng.auburn.edu/~strouce/class/elec4200/vhdlmods.pdf
-        stream << "-- standard FIFO buffer" << std::endl;
-        writeIncludes(stream);
-        stream << "" << std::endl;
-        stream << "entity std_fifo is" << std::endl;
-        stream << "generic (" << std::endl;
-        stream << "  constant FIFO_DEPTH  : positive := 256" << std::endl;
-        stream << ");" << std::endl;
-        stream << "port ( " << std::endl;
-        stream << "  clk      : in  std_logic;" << std::endl;
-        stream << "  rst      : in  std_logic;" << std::endl;
-        stream << "  write_en  : in  std_logic;" << std::endl;
-        stream << "  read_en     : in  std_logic;" << std::endl;
-        stream << "  data_in     : in  event_type;" << std::endl;
-        stream << "  data_out  : out event_type;" << std::endl;
-        stream << "  empty       : out std_logic;" << std::endl;
-        stream << "  full        : out std_logic" << std::endl;
-        stream << ");" << std::endl;
-        stream << "end std_fifo;" << std::endl;
-        stream << "" << std::endl;
-        stream << "architecture behavioral of std_fifo is" << std::endl;
-        stream << "begin" << std::endl;
-        stream << "-- Memory Pointer Process" << std::endl;
-        stream << "fifo_proc : process (clk)" << std::endl;
-        stream << "  type FIFO_Memory is array (0 to FIFO_DEPTH - 1) of event_type;" << std::endl;
-        stream << "  variable Memory : FIFO_Memory;" << std::endl;
-        stream << "" << std::endl;
-        stream << "  variable Head : natural range 0 to FIFO_DEPTH - 1;" << std::endl;
-        stream << "  variable Tail : natural range 0 to FIFO_DEPTH - 1;" << std::endl;
-        stream << "" << std::endl;
-        stream << "  variable Looped : boolean;" << std::endl;
-        stream << "begin" << std::endl;
-        stream << "  if rising_edge(clk) then" << std::endl;
-        stream << "    if rst = '1' then" << std::endl;
-        stream << "      Head := 0;" << std::endl;
-        stream << "      Tail := 0;" << std::endl;
-        stream << "" << std::endl;
-        stream << "      Looped := false;" << std::endl;
-        stream << "" << std::endl;
-        stream << "      full  <= '0';" << std::endl;
-        stream << "      empty <= '1';" << std::endl;
-        stream << "    else" << std::endl;
-        stream << "      if (read_en = '1') then" << std::endl;
-        stream << "        if ((Looped = true) or (Head /= Tail)) then" << std::endl;
-        stream << "          -- Update data output" << std::endl;
-        stream << "          data_out <= Memory(Tail);" << std::endl;
-        stream << "          " << std::endl;
-        stream << "          -- Update Tail pointer as needed" << std::endl;
-        stream << "          if (Tail = FIFO_DEPTH - 1) then" << std::endl;
-        stream << "            Tail := 0;" << std::endl;
-        stream << "            " << std::endl;
-        stream << "            Looped := false;" << std::endl;
-        stream << "          else" << std::endl;
-        stream << "            Tail := Tail + 1;" << std::endl;
-        stream << "          end if;" << std::endl;
-        stream << "" << std::endl;
-        stream << "        end if;" << std::endl;
-        stream << "      end if;" << std::endl;
-        stream << "" << std::endl;
-        stream << "      if (write_en = '1') then" << std::endl;
-        stream << "        if ((Looped = false) or (Head /= Tail)) then" << std::endl;
-        stream << "          -- Write Data to Memory" << std::endl;
-        stream << "          Memory(Head) := data_in;" << std::endl;
-        stream << "          " << std::endl;
-        stream << "          -- Increment Head pointer as needed" << std::endl;
-        stream << "          if (Head = FIFO_DEPTH - 1) then" << std::endl;
-        stream << "            Head := 0;" << std::endl;
-        stream << "            " << std::endl;
-        stream << "            Looped := true;" << std::endl;
-        stream << "          else" << std::endl;
-        stream << "            Head := Head + 1;" << std::endl;
-        stream << "          end if;" << std::endl;
-        stream << "        end if;" << std::endl;
-        stream << "      end if;" << std::endl;
-        stream << "" << std::endl;
-        stream << "      -- Update empty and full flags" << std::endl;
-        stream << "      if (Head = Tail) then" << std::endl;
-        stream << "        if Looped then" << std::endl;
-        stream << "          full <= '1';" << std::endl;
-        stream << "        else" << std::endl;
-        stream << "          empty <= '1';" << std::endl;
-        stream << "        end if;" << std::endl;
-        stream << "      else" << std::endl;
-        stream << "        empty  <= '0';" << std::endl;
-        stream << "        full  <= '0';" << std::endl;
-        stream << "      end if;" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "  end if;" << std::endl;
-        stream << "end process;" << std::endl;
-        stream << "" << std::endl;
-        stream << "end behavioral;" << std::endl;
-        stream << "-- END standard FIFO buffer" << std::endl;
-    }
-
-    void ChartToVHDL::writeSignalsAndComponents(std::ostream & stream) {
-        // create internal signals
-        stream << "-- system signals" << std::endl;
-        stream << "signal stall : std_logic;" << std::endl;
-        stream << "signal completed_sig : std_logic;" << std::endl;
-        //        stream << "signal rst_2 : std_logic;" << std::endl;
-        //        stream << "signal rst_1 : std_logic;" << std::endl;
-        stream << "signal rst : std_logic;" << std::endl;
-        stream << std::endl;
-
-        stream << "-- state signals" << std::endl;
-
-        std::list<std::string> signalDecls;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-
-            signalDecls.push_back("signal state_active_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-            signalDecls.push_back("signal state_next_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-            signalDecls.push_back("signal in_entry_set_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-            signalDecls.push_back("signal in_exit_set_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-            signalDecls.push_back("signal in_complete_entry_set_up_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-            signalDecls.push_back("signal in_complete_entry_set_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-            signalDecls.push_back("signal default_completion_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
-        }
-
-        signalDecls.sort();
-        for (std::list<std::string>::iterator iter = signalDecls.begin(); iter != signalDecls.end(); iter++) {
-            stream << *iter << std::endl;
-        }
-        stream << std::endl;
-
-
-        stream << "-- transition signals" << std::endl;
-        stream << "signal spontaneous_en : std_logic;" << std::endl;
-        stream << "signal spontaneous_active : std_logic;" << std::endl;
-        stream << "signal optimal_transition_set_combined_sig : std_logic;" << std::endl;
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            stream << "signal in_optimal_transition_set_" << ATTR(transition, "postFixOrder") << "_sig : std_logic;"
-                    << std::endl;
-        }
-        stream << std::endl;
-
-        stream << "-- event signals" << std::endl;
-        stream << "signal int_event_write_en : std_logic;" << std::endl;
-        stream << "signal int_event_read_en : std_logic;" << std::endl;
-        stream << "signal int_event_empty : std_logic;" << std::endl;
-        stream << "signal int_event_input : event_type;" << std::endl;
-        stream << "signal int_event_output : event_type;" << std::endl;
-        stream << "signal next_event_re : std_logic;" << std::endl;
-        stream << "signal next_event_dequeued : std_logic;" << std::endl;
-        stream << "signal next_event : event_type;" << std::endl;
-        stream << "signal event_consumed : std_logic;" << std::endl;
-        stream << std::endl;
-
-        std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix("");
-        for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-            stream << "signal event_" << eventNameEscape((*eventIter)->value) << "_sig : std_logic;" << std::endl;
-        }
-        stream << std::endl;
-
-        stream << "-- error signals" << std::endl;
-        stream << "signal reg_error_out : std_logic;" << std::endl;
-        stream << "signal error_full_int_event_fifo : std_logic;" << std::endl;
-        stream << std::endl;
-
-        // add components
-        stream << "-- event FIFO" << std::endl;
-        stream << "component std_fifo is" << std::endl;
-        stream << "port ( " << std::endl;
-        stream << "	clk		: in  std_logic;" << std::endl;
-        stream << "	rst		: in  std_logic;" << std::endl;
-        stream << "	write_en	: in  std_logic;" << std::endl;
-        stream << "	read_en         : in  std_logic;" << std::endl;
-        stream << "	data_in         : in  event_type;" << std::endl;
-        stream << "	data_out	: out event_type;" << std::endl;
-        stream << "	empty           : out std_logic;" << std::endl;
-        stream << "	full            : out std_logic" << std::endl; // we calculate how much we need
-        stream << ");" << std::endl;
-        stream << "end component;" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeModuleInstantiation(std::ostream & stream) {
-        // instantiate event fifo
-        stream << "int_event_fifo : component std_fifo " << std::endl;
-        stream << "port map ( " << std::endl;
-        stream << "	clk         => clk," << std::endl;
-        stream << "	rst         => rst_i," << std::endl;
-        stream << "	write_en    => int_event_write_en," << std::endl;
-        stream << "	read_en     => int_event_read_en," << std::endl;
-        stream << "	data_in     => int_event_input," << std::endl;
-        stream << "	data_out    => int_event_output," << std::endl;
-        stream << "	empty       => int_event_empty," << std::endl;
-        stream << "	full        => error_full_int_event_fifo" << std::endl; // we calculate how much we need
-        stream << ");" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeErrorHandler(std::ostream & stream) {
-        // sets error output signal if an error occures somewhere
-        stream << "-- error handler" << std::endl;
-        stream << "-- sets error output signal if an error occures somewhere" << std::endl;
-        stream << "error_handler : process (clk, rst) " << std::endl;
-        stream << "begin" << std::endl;
-        stream << "    if rst = '1' then" << std::endl;
-        stream << "        reg_error_out <= '0';" << std::endl;
-        stream << "    elsif rising_edge(clk) then" << std::endl;
-        stream << "        reg_error_out <= error_full_int_event_fifo;" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "end process;" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeResetHandler(std::ostream & stream) {
-        stream << "-- reset handler" << std::endl;
-        stream << "rst <= rst_i;" << std::endl;
-        //        stream << "rst_proc: process(clk, rst_i)" << std::endl;
-        //        stream << "begin" << std::endl;
-        //        stream << "    if rst_i = '1' then" << std::endl;
-        //        stream << "        rst_2 <= '1';" << std::endl;
-        //        stream << "        rst_1 <= '1';" << std::endl;
-        //        stream << "        rst <= '1';" << std::endl;
-        //        stream << "    elsif (rising_edge(clk)) then" << std::endl;
-        //        stream << "        rst_2 <= rst_i;" << std::endl;
-        //        stream << "        rst_1 <= rst_i;" << std::endl;
-        //        stream << "        rst <= rst_1;" << std::endl;
-        //        stream << "    end if;" << std::endl;
-        //        stream << "end process;" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeSpontaneousHandler(std::ostream & stream) {
-        // sets spontaneous signal
-        stream << "-- spontaneous handler" << std::endl;
-        stream << "spontaneous_handler : process (clk, rst) " << std::endl;
-        stream << "begin" << std::endl;
-        stream << "    if rst = '1' then" << std::endl;
-        stream << "        spontaneous_en <= '1';" << std::endl;
-        stream << "    elsif rising_edge(clk) and stall = '0' then" << std::endl;
-        stream << "        if spontaneous_en = '1' then" << std::endl;
-        stream << "            spontaneous_en <= optimal_transition_set_combined_sig;" << std::endl;
-        stream << "        else" << std::endl;
-        //TODO if new event is dequeued then 1 else stay 0       
-        stream << "            spontaneous_en <= next_event_dequeued;" << std::endl;
-        stream << "        end if;" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "end process;" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeInternalEventHandler(std::ostream & stream) {
-        // Add controler specific stuff here
-        stream << "-- event handler" << std::endl;
-        stream << "-- pops events and set event signals" << std::endl;
-        stream << "event_handler : process (clk, rst) " << std::endl;
-        stream << "begin" << std::endl;
-        stream << "    if rst = '1' then" << std::endl;
-
-        std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix("");
-        for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-            stream << "        event_" << eventNameEscape((*eventIter)->value) << "_sig <= '0';" << std::endl;
-        }
-
-        stream << "        next_event_dequeued <= '0';" << std::endl;
-        stream << "        event_consumed <= '0';" << std::endl;
-
-        stream << "    elsif falling_edge(clk) and stall = '0' then" << std::endl;
-
-        VContainer eventConsumed = VOR;
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-
-            if (HAS_ATTR(transition, "event") == true) {
-                *eventConsumed += VLINE("in_optimal_transition_set_"
-                        + ATTR(transition, "postFixOrder") + "_sig");
-            }
-        }
-
-        VBranch* tree = (VASSIGN,
-                VLINE("event_consumed"),
-                eventConsumed);
-        tree->print(stream);
-        stream << ";" << std::endl;
-
-        stream << "      if int_event_empty = '0' then " << std::endl;
-        stream << "      case next_event is " << std::endl;
-        for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-            stream << "      when hwe_"
-                    << eventNameEscape((*eventIter)->value) << " =>" << std::endl;
-            for (std::list<TrieNode*>::iterator eventIter2 = eventNames.begin(); eventIter2 != eventNames.end(); eventIter2++) {
-                stream << "        event_" << eventNameEscape((*eventIter2)->value);
-                if (eventNameEscape((*eventIter)->value) == eventNameEscape((*eventIter2)->value)) {
-                    stream << "_sig <= '1';" << std::endl;
-                } else {
-                    stream << "_sig <= '0';" << std::endl;
-                }
-            }
-            stream << "        next_event_dequeued <= '1';" << std::endl;
-        }
-        stream << "      when others =>" << std::endl;
-        for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-            stream << "        event_" << eventNameEscape((*eventIter)->value) << "_sig <= '0';" << std::endl;
-        }
-        stream << "        next_event_dequeued <= '0';" << std::endl;
-        stream << "      end case;" << std::endl;
-        stream << "      elsif int_event_empty = '1' and event_consumed = '1' then" << std::endl;
-
-        for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-            stream << "        event_" << eventNameEscape((*eventIter)->value) << "_sig <= '0';" << std::endl;
-        }
-        stream << "        next_event_dequeued <= '0';" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "    end if;" << std::endl;
-        stream << "end process;" << std::endl;
-        stream << std::endl;
-
-        stream << "next_event_re <= not int_event_empty and not stall; " << std::endl;
-        stream << "next_event <= int_event_output; " << std::endl;
-        stream << "int_event_write_en <= next_event_we_i; " << std::endl;
-        stream << "int_event_input <= next_event_i; " << std::endl;
-        stream << "int_event_read_en <= not stall; --not spontaneous_en and  " << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeActiveStateNplusOne(std::ostream & stream) {
-        stream << "-- active configuration" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-
-            // TÖDO: is there a case where complete entry set reflects not the next state ?
-            VBranch* tree = (VASSIGN,
-                    //                    VLINE("state_next_" + toStr(i) + "_sig"),
-                    //                    (VAND,
-                    //                    VLINE("in_complete_entry_set_" + toStr(i) + "_sig") ,
-                    //                    (VOR, VLINE("in_exit_set_" + toStr(i) + "_sig"), (VNOT, VLINE("state_active_" + toStr(i) + "_sig"))))
-                    //                    );
-                    VLINE("state_next_" + toStr(i) + "_sig"),
-                    (VOR,
-                    VLINE("in_complete_entry_set_" + toStr(i) + "_sig"),
-                    (VAND, (VNOT, VLINE("in_exit_set_" + toStr(i) + "_sig")), VLINE("state_active_" + toStr(i) + "_sig")))
-                    );
-
-            tree->print(stream);
-            stream << ";" << std::endl;
-
-        }
-    }
-
-    void ChartToVHDL::writeOptimalTransitionSetSelection(std::ostream & stream) {
-        stream << "-- optimal transition set selection" << std::endl;
-        VContainer optimalTransitions = VOR;
-        VContainer spontaneoursActive = VOR;
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            std::string conflicts = ATTR(transition, "conflictBools");
-
-
-            VContainer nameMatchers = VOR;
-            if (HAS_ATTR(transition, "event")) {
-                std::list<std::string> eventDescs = tokenize(ATTR(transition, "event"));
-                for (std::list<std::string>::iterator descIter = eventDescs.begin(); descIter != eventDescs.end(); descIter++) {
-                    std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix((*descIter) == "*" ? "" : *descIter);
-                    for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
-                        *nameMatchers += VLINE("event_" + eventNameEscape((*eventIter)->value) + "_sig");
-                    }
-                }
-            } else {
-                *nameMatchers += VLINE("'1'");
-            }
-
-            VContainer conflicters = VOR;
-            for (size_t j = 0; j < i; j++) {
-                if (conflicts[j] == '1') {
-                    *conflicters += VLINE("in_optimal_transition_set_" + toStr(j) + "_sig");
-                }
-            }
-
-            VBranch* tree = (VASSIGN,
-                    VLINE("in_optimal_transition_set_" + ATTR(transition, "postFixOrder") + "_sig"),
-                    (VAND,
-                    (HAS_ATTR(transition, "event")
-                    ? (VNOT, VLINE("spontaneous_active"))
-                    : (VNOP, VLINE("spontaneous_en"))),
-                    VLINE("state_active_" + ATTR(transition, "source") + "_sig"),
-                    nameMatchers,
-                    (VNOT, conflicters)));
-
-            tree->print(stream);
-            stream << ";" << std::endl;
-
-            *optimalTransitions += VLINE("in_optimal_transition_set_"
-                    + ATTR(transition, "postFixOrder") + "_sig");
-            if (HAS_ATTR(transition, "event") == false) {
-                *spontaneoursActive += VLINE("in_optimal_transition_set_"
-                        + ATTR(transition, "postFixOrder") + "_sig");
-            }
-        }
-
-        VBranch* tree = (VASSIGN,
-                VLINE("optimal_transition_set_combined_sig"),
-                optimalTransitions);
-        tree->print(stream);
-        stream << ";" << std::endl;
-
-        VBranch* tree2 = (VASSIGN,
-                VLINE("spontaneous_active"),
-                spontaneoursActive);
-        tree2->print(stream);
-        stream << ";" << std::endl;
-    }
-
-    void ChartToVHDL::writeExitSet(std::ostream & stream) {
-        stream << "-- exit set selection" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            std::string completion = ATTR(state, "completionBools");
-            std::string ancestors = ATTR(state, "ancBools");
-            std::string children = ATTR(state, "childBools");
-            std::string parent = ATTR(state, "parent");
-
-            VContainer exitsetters = VOR;
-            for (size_t j = 0; j < _transitions.size(); j++) {
-                Element<std::string> transition(_transitions[j]);
-                std::string exitSet = ATTR(transition, "exitSetBools");
-                if (exitSet[i] == '1') {
-                    *exitsetters += VLINE("in_optimal_transition_set_" + toStr(j) + "_sig ");
-                }
-            }
-
-            VBranch* tree = (VASSIGN,
-                    VLINE("in_exit_set_" + toStr(i) + "_sig"),
-                    (VAND,
-                    VLINE("state_active_" + toStr(i) + "_sig"),
-                    exitsetters));
-
-            tree->print(stream);
-            stream << ";" << std::endl;
-        }
-    }
-
-    void ChartToVHDL::writeEntrySet(std::ostream & stream) {
-        stream << "-- entry set selection" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-
-            VBranch* tree = (VASSIGN,
-                    VLINE("in_entry_set_" + toStr(i) + "_sig"),
-                    (VAND,
-                    VLINE("in_complete_entry_set_" + toStr(i) + "_sig"),
-                    (VOR, VLINE("in_exit_set_" + toStr(i) + "_sig"),
-                    (VNOT, VLINE("state_active_" + toStr(i) + "_sig")))));
-
-            tree->print(stream);
-            stream << ";" << std::endl;
-        }
-    }
-
-    void ChartToVHDL::writeDefaultCompletions(std::ostream & stream) {
-        // TODO direct connect the line in complete entry set (no extra line needed ...)
-        stream << "-- default completion assignments" << std::endl;
-        stream << "-- indikates if the state for which I am the def-completion is active" << std::endl;
-        std::map<Element<std::string>, NodeSet<std::string> > completions;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            completions[state]; // initialize other completions to 0
-
-            // we just need this if parent is a compound state
-            std::string parent = ATTR(state, "parent");
-            if (!parent.empty()
-                    && isCompound(Element<std::string>(_states[strTo<size_t>(parent)]))) {
-
-                // Am I default completen ?
-                std::string completion = ATTR_CAST(_states[strTo<size_t>(parent)], "completionBools");
-                if (completion[i] == '1') {
-                    // Yes? then give me the parent line
-                    completions[state].push_back(Element<std::string>(_states[strTo<size_t>(parent)]));
-
-                }
-            }
-        }
-
-        std::map<Element<std::string>, NodeSet<std::string> >::const_iterator complIter = completions.begin();
-        while (complIter != completions.end()) {
-            const Element<std::string>& state(complIter->first);
-            const NodeSet<std::string>& refs(complIter->second);
-
-            std::string index = ATTR(state, "documentOrder");
-            VContainer defaultCompleters = VOR;
-
-            for (size_t i = 0; i < refs.size(); i++) {
-                //                *defaultCompleters += VLINE("in_complete_entry_set_" +
-                // TODO: default completion just when state is entered the first time ?
-                // if yes then we use the following code. If not we have to revert
-                *defaultCompleters += VLINE("in_entry_set_" +
-                        ATTR_CAST(refs[i], "documentOrder") + "_sig ");
-            }
-
-            VBranch* tree = (VASSIGN,
-                    VLINE("default_completion_" + index + "_sig"), defaultCompleters);
-
-            tree->print(stream);
-            stream << ";" << std::endl;
-
-            complIter++;
-        }
-
-
-    }
-
-    void ChartToVHDL::writeCompleteEntrySet(std::ostream & stream) {
-        stream << "-- complete entry set selection" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            std::string completion = ATTR(state, "completionBools");
-            std::string ancestors = ATTR(state, "ancBools");
-            std::string children = ATTR(state, "childBools");
-            std::string parent = ATTR(state, "parent");
-
-            VContainer optimalEntrysetters = VOR;
-            for (size_t j = 0; j < _transitions.size(); j++) {
-                Element<std::string> transition(_transitions[j]);
-                std::string targetSet = ATTR(transition, "targetBools");
-                if (targetSet[i] == '1') {// <- ? TODO Was ist hier der vergleich?
-                    *optimalEntrysetters += VLINE("in_optimal_transition_set_" + toStr(j) + "_sig");
-                }
-            }
-
-            VContainer completeEntrysetters = VOR;
-            stream << "--" << state.getNodeName() << std::endl; // for debugging
-            if (isCompound(state) || isParallel(state)) { // <- true for scxml? TODO
-                for (size_t j = 0; j < _states.size(); j++) {
-                    if (children[j] != '1') // if is child of state j 
-                        continue;
-                    *completeEntrysetters += VLINE("in_complete_entry_set_up_" + toStr(j) + "_sig");
-                }
-            }
-
-            VBranch* tree = (VASSIGN,
-                    VLINE("in_complete_entry_set_up_" + toStr(i) + "_sig"),
-                    (VOR, optimalEntrysetters, completeEntrysetters)
-                    );
-                    
-
-            tree->print(stream);
-            stream << ";" << std::endl;
+using namespace Arabica::DOM;
+using namespace Arabica::XPath;
+
+Transformer ChartToVHDL::transform(const Interpreter& other) {
+	ChartToVHDL* c2c = new ChartToVHDL(other);
+
+	return boost::shared_ptr<TransformerImpl>(c2c);
+}
+
+ChartToVHDL::ChartToVHDL(const Interpreter& other) : ChartToC(other), _eventTrie(".") {
+}
+
+ChartToVHDL::~ChartToVHDL() {
+}
+
+void ChartToVHDL::checkDocument() {
+	// filter unsupported stuff
+	Arabica::XPath::NodeSet<std::string> unsupported;
+
+	std::set<std::string> elements;
+	elements.insert(_nsInfo.xmlNSPrefix + "datamodel");
+	elements.insert(_nsInfo.xmlNSPrefix + "data");
+	elements.insert(_nsInfo.xmlNSPrefix + "assign");
+	elements.insert(_nsInfo.xmlNSPrefix + "donedata");
+	elements.insert(_nsInfo.xmlNSPrefix + "content");
+	elements.insert(_nsInfo.xmlNSPrefix + "param");
+	elements.insert(_nsInfo.xmlNSPrefix + "script");
+
+	elements.insert(_nsInfo.xmlNSPrefix + "parallel");
+	elements.insert(_nsInfo.xmlNSPrefix + "history");
+
+	elements.insert(_nsInfo.xmlNSPrefix + "if"); // implicit elseif und else
+	elements.insert(_nsInfo.xmlNSPrefix + "foreach");
+	elements.insert(_nsInfo.xmlNSPrefix + "send");
+	elements.insert(_nsInfo.xmlNSPrefix + "cancel");
+	elements.insert(_nsInfo.xmlNSPrefix + "invoke");
+	elements.insert(_nsInfo.xmlNSPrefix + "finalize");
+	unsupported = DOMUtils::inDocumentOrder(elements, _scxml);
+
+	std::stringstream ss;
+	if (unsupported.size() > 0) {
+		for (size_t i = 0; i < unsupported.size(); i++) {
+			ss << "  " << DOMUtils::xPathForNode(unsupported[i]) << " unsupported" << std::endl;
+		}
+		throw std::runtime_error("Unsupported elements found:\n" + ss.str());
+	}
+
+	elements.clear();
+	elements.insert(_nsInfo.xmlNSPrefix + "transition");
+	unsupported = DOMUtils::inDocumentOrder(elements, _scxml);
+
+	for (size_t i = 0; i < unsupported.size(); i++) {
+		Element<std::string> transition(unsupported[i]);
+		if (HAS_ATTR(transition, "cond")) {
+			ERROR_PLATFORM_THROW("transition with conditions not supported!");
+		}
+		if (!HAS_ATTR(transition, "target")) {
+			ERROR_PLATFORM_THROW("targetless transition not supported!");
+		}
+	}
+
+}
+
+std::string ChartToVHDL::eventNameEscape(const std::string& eventName) {
+	std::string escaped = escape(eventName);
+	boost::replace_all(escaped, ".", "_");
+	return escaped;
+}
+
+void ChartToVHDL::findEvents() {
+	// elements with an event attribute
+	NodeSet<std::string> withEvent;
+	withEvent.push_back(DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "raise", _scxml, true));
+	withEvent.push_back(DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "send", _scxml, true));
+	withEvent.push_back(DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "transition", _scxml, true)); // TODO was haben events da verloren???
+
+	for (size_t i = 0; i < withEvent.size(); i++) {
+		if (HAS_ATTR_CAST(withEvent[i], "event")) {
+			// TODO: tokenize!
+			if (ATTR_CAST(withEvent[i], "event") != "*")
+				_eventTrie.addWord(ATTR_CAST(withEvent[i], "event"));
+		}
+	}
+
+	std::set<std::string> elements;
+	elements.insert(_nsInfo.xmlNSPrefix + "raise");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "if");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "elseif");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "else");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "foreach");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "log");
+	elements.insert(_nsInfo.xmlNSPrefix + "send");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "assign");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "script");
+	//        elements.insert(_nsInfo.xmlNSPrefix + "cancel");
+	_execContent = DOMUtils::inDocumentOrder(elements, _scxml);
+
+}
+
+void ChartToVHDL::writeTo(std::ostream& stream) {
+	// same preparations as the C transformation
+	prepare();
+
+	//    checkDocument();
+	findEvents();
+
+
+	stream << "-- generated from " << _sourceURL.asString() << std::endl;
+	stream << "-- run as " << std::endl;
+	stream << "--   ghdl --clean && ghdl -a foo.vhdl && ghdl -e tb && ./tb --stop-time=10ms --vcd=foo.vcd" << std::endl;
+	stream << std::endl;
+
+	writeTypes(stream);
+	writeFiFo(stream);
+	writeEventController(stream);
+	writeMicroStepper(stream);
+	writeTestbench(stream);
+}
+
+void ChartToVHDL::writeTypes(std::ostream & stream) {
+	std::string seperator;
+
+	stream << "-- required global types" << std::endl;
+	stream << "library IEEE;" << std::endl;
+	stream << "use IEEE.std_logic_1164.all;" << std::endl;
+	stream << std::endl;
+	stream << "package machine" << _md5 << " is" << std::endl;
+	// create state type
+	stream << "  subtype state_type is std_logic_vector( ";
+	stream << _states.size() - 1;
+	stream << " downto 0);" << std::endl;
+
+	std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix("");
+	stream << "  type event_type is ( hwe_null, ";
+	seperator = "";
+
+	for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+		stream << seperator << "hwe_" << eventNameEscape((*eventIter)->value);
+		seperator = ", ";
+	}
+	stream << " );" << std::endl;
+
+	stream << "end machine" << _md5 << ";" << std::endl;
+	stream << std::endl;
+	stream << "-- END needed global types" << std::endl;
+}
+
+void ChartToVHDL::writeIncludes(std::ostream & stream) {
+	// Add controler specific stuff here
+	stream << "library IEEE;" << std::endl;
+	stream << "use IEEE.std_logic_1164.all;" << std::endl;
+	stream << "use work.machine" << _md5 << ".all;" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeTestbench(std::ostream& stream) {
+
+	stream << "-- TESTBENCH" << std::endl;
+	writeIncludes(stream);
+	stream << std::endl;
+
+	stream << "-- empty entity" << std::endl;
+	stream << "entity tb is" << std::endl;
+	stream << "end entity tb;" << std::endl;
+	stream << std::endl;
+
+	stream << "architecture bhv of tb is" << std::endl;
+	stream << std::endl;
+
+	// modules
+	stream << "  -- Module declaration" << std::endl;
+	stream << "  component micro_stepper is" << std::endl;
+	stream << "    port (" << std::endl;
+	stream << "    --inputs" << std::endl;
+	stream << "    clk  :in    std_logic;" << std::endl;
+	stream << "    rst_i  :in    std_logic;" << std::endl;
+	stream << "    en   :in    std_logic;" << std::endl;
+	stream << "    next_event_i    :in  event_type;" << std::endl;
+	stream << "    next_event_we_i :in  std_logic;" << std::endl;
+	stream << "    --outputs" << std::endl;
+	stream << "    error_o     :out std_logic;" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "    state_active_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "    entry_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "    exit_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "    transition_set_" << ATTR(transition, "postFixOrder") << "_o :out std_logic;"
+			       << std::endl;
+		}
+	}
+
+	stream << "    completed_o :out std_logic" << std::endl;
+	stream << "    );" << std::endl;
+	stream << "  end component;" << std::endl;
+	stream << std::endl;
+
+	stream << "  component event_controller is" << std::endl;
+	stream << "  port(" << std::endl;
+	stream << "    --inputs" << std::endl;
+	stream << "    clk  :in    std_logic;" << std::endl;
+	stream << "    rst_i  :in    std_logic;" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "    state_active_" << ATTR(state, "documentOrder")
+		       << "_i :in std_logic;" << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "    entry_set_" << ATTR(state, "documentOrder")
+			       << "_i :in std_logic;" << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "    exit_set_" << ATTR(state, "documentOrder")
+			       << "_i :in std_logic;" << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "    transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_i :in std_logic;" << std::endl;
+		}
+	}
+	stream << "    --outputs" << std::endl;
+	stream << "    micro_stepper_en_o :out  std_logic;" << std::endl;
+	stream << "    event_o    :out  event_type;" << std::endl;
+	stream << "    event_we_o :out  std_logic" << std::endl;
+	//        stream << "    done_o :out std_logic" << std::endl;
+	stream << ");" << std::endl;
+	stream << "end component; " << std::endl;
+
+	// signals
+	stream << "  -- input" << std::endl;
+	stream << "  signal clk   : std_logic := '0';" << std::endl;
+	stream << "  signal reset : std_logic;" << std::endl;
+	stream << "  signal dut_enable : std_logic;" << std::endl;
+	stream << "  signal next_event_we_i : std_logic;" << std::endl;
+	stream << "  signal next_event_i : event_type;" << std::endl;
+	stream << std::endl;
+
+	stream << "  -- output" << std::endl;
+	stream << "  signal error_o, completed_o : std_logic;" << std::endl;
+	stream << std::endl;
+
+	stream << "  -- wiring" << std::endl;
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "  signal state_active_" << ATTR(state, "documentOrder")
+		       << "_sig : std_logic;" << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "  signal entry_set_" << ATTR(state, "documentOrder")
+			       << "_sig : std_logic;" << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "  signal exit_set_" << ATTR(state, "documentOrder")
+			       << "_sig : std_logic;" << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "  signal transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_sig : std_logic;" << std::endl;
+		}
+	}
+
+	// wiring
+	stream << "begin" << std::endl;
+	stream << "  clk   <= not clk  after 20 ns;  -- 25 MHz clock frequency" << std::endl;
+	stream << "  reset <= '1', '0' after 100 ns; -- generates reset signal: --__" << std::endl;
+	stream << std::endl;
+
+	stream << "  -- Module instantiation" << std::endl;
+	stream << "  dut : micro_stepper" << std::endl;
+	stream << "    port map (" << std::endl;
+	stream << "      clk       => clk," << std::endl;
+	stream << "      rst_i     => reset," << std::endl;
+	stream << "      en     => dut_enable," << std::endl;
+	stream << std::endl;
+
+	stream << "      next_event_i     => next_event_i," << std::endl;
+	stream << "      next_event_we_i => next_event_we_i," << std::endl;
+	stream << "      error_o  => error_o," << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "      state_active_" << ATTR(state, "documentOrder")
+		       << "_o => state_active_" << ATTR(state, "documentOrder")
+		       << "_sig," << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "      entry_set_" << ATTR(state, "documentOrder")
+			       << "_o => entry_set_" << ATTR(state, "documentOrder")
+			       << "_sig," << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "      exit_set_" << ATTR(state, "documentOrder")
+			       << "_o => exit_set_" << ATTR(state, "documentOrder")
+			       << "_sig," << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "      transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_o => transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_sig," << std::endl;
+		}
+	}
+
+	stream << "      completed_o  => completed_o" << std::endl;
+	stream << "      );" << std::endl;
+	stream << std::endl;
+
+	stream << "  ec : event_controller" << std::endl;
+	stream << "    port map (" << std::endl;
+	stream << "      clk       => clk," << std::endl;
+	stream << "      rst_i     => reset," << std::endl;
+	stream << std::endl;
+
+	stream << "      event_o     => next_event_i," << std::endl;
+	stream << "      event_we_o => next_event_we_i," << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "      state_active_" << ATTR(state, "documentOrder")
+		       << "_i => state_active_" << ATTR(state, "documentOrder")
+		       << "_sig," << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "      entry_set_" << ATTR(state, "documentOrder")
+			       << "_i => entry_set_" << ATTR(state, "documentOrder")
+			       << "_sig," << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "      exit_set_" << ATTR(state, "documentOrder")
+			       << "_i => exit_set_" << ATTR(state, "documentOrder")
+			       << "_sig," << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "      transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_i => transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_sig," << std::endl;
+		}
+	}
+
+	stream << "      micro_stepper_en_o  => dut_enable" << std::endl;
+	//        stream << "      done_o  => open" << std::endl;
+	stream << "      );" << std::endl;
+	stream << std::endl;
+
+	stream << "end architecture;" << std::endl;
+	stream << "-- END TESTBENCH" << std::endl;
+
+}
+
+void ChartToVHDL::writeExContentBlock(std::ostream & stream,
+                                      std::string index, std::list< Element<std::string> > commandSequence) {
+	// index should be [entry, transition, exit]_<index of state/transition>_<optional index for block>
+
+	// write clock blocks
+}
+
+void ChartToVHDL::writeEventController(std::ostream & stream) {
+	// Add controler specific stuff here
+	// create hardware top level
+	stream << "-- Event Controller Logic" << std::endl;
+	writeIncludes(stream);
+	stream << "entity event_controller is" << std::endl;
+	stream << "port(" << std::endl;
+	stream << "    --inputs" << std::endl;
+	stream << "    clk  :in    std_logic;" << std::endl;
+	stream << "    rst_i  :in    std_logic;" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "    state_active_" << ATTR(state, "documentOrder")
+		       << "_i :in std_logic;" << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "    entry_set_" << ATTR(state, "documentOrder")
+			       << "_i :in std_logic;" << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "    exit_set_" << ATTR(state, "documentOrder")
+			       << "_i :in std_logic;" << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "    transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_i :in std_logic;" << std::endl;
+		}
+	}
+
+	stream << "    --outputs" << std::endl;
+	stream << "    micro_stepper_en_o :out  std_logic;" << std::endl;
+	stream << "    event_o    :out  event_type;" << std::endl;
+	stream << "    event_we_o :out  std_logic" << std::endl;
+	stream << ");" << std::endl;
+	stream << "end event_controller; " << std::endl;
+
+	stream << std::endl;
+	stream << "architecture behavioral of event_controller is " << std::endl;
+	stream << std::endl;
+
+	// Add signals and components
+	stream << "signal rst : std_logic;" << std::endl;
+	stream << "signal micro_stepper_en : std_logic;" << std::endl;
+	stream << "signal cmpl_buf : std_logic;" << std::endl;
+	stream << "signal completed_sig : std_logic;" << std::endl;
+	stream << "signal event_bus : event_type;" << std::endl;
+	stream << "signal event_we  : std_logic;" << std::endl;
+
+	for (int i = 0; i < _execContent.size(); i++) {
+		stream << "signal done_" << toStr(i) << "_sig : std_logic;" << std::endl;
+		stream << "signal start_" << toStr(i) << "_sig : std_logic;" << std::endl;
+	}
+
+	stream << "-- sequence input line" << std::endl;
+	for (int i = 0; i < _execContent.size(); i++) {
+		stream << "signal seq_" << toStr(i) << "_sig : std_logic;" << std::endl;
+	}
+	stream << std::endl;
+
+	stream << "begin" << std::endl;
+	stream << std::endl;
+	// system signal mapping
+	stream << "rst <= rst_i;" << std::endl;
+	stream << "micro_stepper_en_o <= micro_stepper_en;" << std::endl;
+	stream << "event_o <= event_bus;" << std::endl;
+	stream << "event_we_o <= event_we;" << std::endl;
+	stream << std::endl;
+
+	// stall management
+	stream << "-- stalling microstepper" << std::endl;
+	//        stream << "ms_enable_manager : process (clk, rst) " << std::endl;
+	//        stream << "begin" << std::endl;
+	//        stream << "  if rst = '1' then" << std::endl;
+	//        stream << "    micro_stepper_en <= '1';" << std::endl;
+	//        stream << "  elsif rising_edge(clk) then" << std::endl;
+	//         stream << "    " << std::endl;
+	stream << "micro_stepper_en <= completed_sig or not ( '0' ";
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << std::endl << "      or entry_set_" << ATTR(state, "documentOrder")
+			       << "_i";
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << std::endl << "      or exit_set_" << ATTR(state, "documentOrder")
+			       << "_i";
+		}
+	}
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << std::endl << "      or transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_i";
+		}
+	}
+	stream << ");" << std::endl;
+	//        stream << "  end if;" << std::endl;
+	//        stream << "end process;" << std::endl;
+	stream << std::endl;
+
+	// write enable management
+	//        stream << "-- write enable for FIFO buffer" << std::endl;
+	//        stream << "event_we <= not rst and ('0'";
+	//        for (int i = 0; i < _execContent.size(); i++) {
+	//            stream << std::endl << "   or start_" << toStr(i) << "_sig";
+	//        }
+	//        stream << ");" << std::endl;
+	//        stream << std::endl;
+
+	// sequential code operation
+	stream << "-- seq code block " << std::endl;
+	stream << "ex_content_block : process (clk, rst) " << std::endl;
+	stream << "begin" << std::endl;
+	stream << "  if rst = '1' then" << std::endl;
+	for (int i = 0; i < _execContent.size(); i++) {
+		stream << "    done_" << toStr(i) << "_sig <= '0';" << std::endl;
+	}
+	stream << "    event_bus <= hwe_null;" << std::endl;
+	stream << "    event_we <= '0';" << std::endl;
+	stream << "    cmpl_buf <= '0';" << std::endl;
+	stream << "    completed_sig <= '0';" << std::endl;
+	stream << "  elsif rising_edge(clk) then" << std::endl;
+
+	stream << "    if micro_stepper_en = '1' then" << std::endl;
+	stream << "      cmpl_buf <= '0' ;" << std::endl;
+	stream << "    else" << std::endl;
+	stream << "      cmpl_buf <= seq_" << toStr(_execContent.size() - 1)
+	       << "_sig;" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "    completed_sig <= cmpl_buf;" << std::endl << std::endl;
+	std::string seperator = "    ";
+	for (int i = 0; i < _execContent.size(); i++) {
+		Element<std::string> exContentElem(_execContent[i]);
+
+		//TODO if raise
+		if (TAGNAME(_nsInfo.xmlNSPrefix + exContentElem) == "raise" ||
+		        TAGNAME(_nsInfo.xmlNSPrefix + exContentElem) == "send") {
+			stream << seperator << "if start_" << toStr(i) << "_sig = '1' then"
+			       << std::endl;
+			//TODO use escape
+			stream << "      event_bus <= hwe_" << ATTR(exContentElem, "event")
+			       << ";" << std::endl;
+			stream << "      done_" << toStr(i) << "_sig <= '1';" << std::endl;
+			stream << "      event_we <= '1';" << std::endl;
+			seperator = "    els";
+		}
+	}
+	stream << "    elsif micro_stepper_en = '1' then" << std::endl;
+	for (int i = 0; i < _execContent.size(); i++) {
+		Element<std::string> exContentElem(_execContent[i]);
+
+		//TODO if raise
+		if (TAGNAME(_nsInfo.xmlNSPrefix + exContentElem) == "raise") {
+			stream << "      done_" << toStr(i) << "_sig <= '0';" << std::endl;
+		}
+	}
+	stream << "      event_we <= '0';" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "  end if;" << std::endl;
+	stream << "end process;" << std::endl;
+	stream << std::endl;
+
+	for (size_t i = 0; i < _execContent.size(); i++) {
+		// start lines
+		stream << "start_" << toStr(i) << "_sig <= "
+		       << getLineForExecContent(_execContent[i]) << " and "
+		       << "not done_" << toStr(i) << "_sig";
+		if (i != 0) { // if not first element
+			stream << " and seq_" << toStr(i) << "_sig";
+		}
+		stream << ";" << std::endl;
+
+	}
+
+	stream << "seq_0_sig <= '1';" << std::endl;
+	for (size_t i = 1; i < _execContent.size(); i++) {
+		// seq lines (input if process i is in seqence now)
+		stream << "seq_" << toStr(i) << "_sig <= "
+		       << "done_" << toStr(i - 1) << "_sig or "
+		       << "( not "
+		       << getLineForExecContent(_execContent[i - 1]);
+		stream << " and seq_" << toStr(i - 1) << "_sig";
+		stream << " );" << std::endl;
+	}
+	stream << std::endl;
+
+	stream << "end behavioral; " << std::endl;
+	stream << "-- END Event Controller Logic" << std::endl;
+}
+
+std::string ChartToVHDL::getLineForExecContent(const Arabica::DOM::Node<std::string>& elem) {
+	Arabica::DOM::Node<std::string> ecBlock = elem;
+	while (ecBlock) {
+		if (ecBlock.getNodeType() == Arabica::DOM::Node_base::ELEMENT_NODE) {
+			std::string localName = LOCALNAME_CAST(ecBlock);
+			if (localName == _nsInfo.xmlNSPrefix + "transition") {
+				return "transition_set_" + ATTR_CAST(ecBlock, "postFixOrder") + "_i";
+			}
+
+			if (localName == _nsInfo.xmlNSPrefix + "onentry") {
+				return "entry_set_" + ATTR_CAST(ecBlock.getParentNode(), "documentOrder") + "_i";
+			}
+
+			if (localName == _nsInfo.xmlNSPrefix + "onexit") {
+				return "exit_set_" + ATTR_CAST(ecBlock.getParentNode(), "documentOrder") + "_i";
+			}
+
+		}
+		ecBlock = ecBlock.getParentNode();
+	}
+
+	return "";
+}
+
+void ChartToVHDL::writeMicroStepper(std::ostream & stream) {
+	// create MicroStepper top level
+	stream << "-- FSM Logic" << std::endl;
+	writeIncludes(stream);
+	stream << "entity micro_stepper is" << std::endl;
+	stream << "port(" << std::endl;
+	stream << "    --inputs" << std::endl;
+	stream << "    clk  :in    std_logic;" << std::endl;
+	stream << "    rst_i  :in    std_logic;" << std::endl;
+	stream << "    en   :in    std_logic;" << std::endl;
+	stream << "    next_event_i    :in  event_type;" << std::endl;
+	stream << "    next_event_we_i :in  std_logic;" << std::endl;
+	stream << "    --outputs" << std::endl;
+	stream << "    error_o     :out std_logic;" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "    state_active_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "    entry_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "    exit_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "    transition_set_" << ATTR(transition, "postFixOrder") << "_o :out std_logic;"
+			       << std::endl;
+		}
+	}
+
+	stream << "    completed_o :out std_logic" << std::endl;
+	stream << ");" << std::endl;
+	stream << "end micro_stepper; " << std::endl;
+
+	stream << std::endl;
+	stream << "architecture behavioral of micro_stepper is " << std::endl;
+	stream << std::endl;
+
+	// Add signals and components
+	writeSignalsAndComponents(stream);
+
+	stream << std::endl;
+	stream << "begin" << std::endl;
+	stream << std::endl;
+
+	// signal mapping
+	writeModuleInstantiation(stream);
+
+	// signal handler
+	writeSpontaneousHandler(stream);
+	writeErrorHandler(stream);
+	writeInternalEventHandler(stream);
+	writeStateHandler(stream);
+	writeResetHandler(stream);
+
+	// combinatorial logic for Sn+1
+	writeOptimalTransitionSetSelection(stream);
+	writeExitSet(stream);
+	writeCompleteEntrySet(stream);
+	writeEntrySet(stream);
+	writeDefaultCompletions(stream);
+	writeActiveStateNplusOne(stream);
+
+	// connect output signals
+	writeSystemSignalMapping(stream);
+
+
+	stream << std::endl;
+	stream << "end behavioral; " << std::endl;
+	stream << "-- END FSM Logic" << std::endl;
+}
+
+void ChartToVHDL::writeFiFo(std::ostream & stream) {
+	// taken from: http://www.deathbylogic.com/2013/07/vhdl-standard-fifo/
+	// alternativly take fifo logic for a ram device: http://www.eng.auburn.edu/~strouce/class/elec4200/vhdlmods.pdf
+	stream << "-- standard FIFO buffer" << std::endl;
+	writeIncludes(stream);
+	stream << "" << std::endl;
+	stream << "entity std_fifo is" << std::endl;
+	stream << "generic (" << std::endl;
+	stream << "  constant FIFO_DEPTH  : positive := 256" << std::endl;
+	stream << ");" << std::endl;
+	stream << "port ( " << std::endl;
+	stream << "  clk      : in  std_logic;" << std::endl;
+	stream << "  rst      : in  std_logic;" << std::endl;
+	stream << "  write_en  : in  std_logic;" << std::endl;
+	stream << "  read_en     : in  std_logic;" << std::endl;
+	stream << "  data_in     : in  event_type;" << std::endl;
+	stream << "  data_out  : out event_type;" << std::endl;
+	stream << "  empty       : out std_logic;" << std::endl;
+	stream << "  full        : out std_logic" << std::endl;
+	stream << ");" << std::endl;
+	stream << "end std_fifo;" << std::endl;
+	stream << "" << std::endl;
+	stream << "architecture behavioral of std_fifo is" << std::endl;
+	stream << "begin" << std::endl;
+	stream << "-- Memory Pointer Process" << std::endl;
+	stream << "fifo_proc : process (clk)" << std::endl;
+	stream << "  type FIFO_Memory is array (0 to FIFO_DEPTH - 1) of event_type;" << std::endl;
+	stream << "  variable Memory : FIFO_Memory;" << std::endl;
+	stream << "" << std::endl;
+	stream << "  variable Head : natural range 0 to FIFO_DEPTH - 1;" << std::endl;
+	stream << "  variable Tail : natural range 0 to FIFO_DEPTH - 1;" << std::endl;
+	stream << "" << std::endl;
+	stream << "  variable Looped : boolean;" << std::endl;
+	stream << "begin" << std::endl;
+	stream << "  if rising_edge(clk) then" << std::endl;
+	stream << "    if rst = '1' then" << std::endl;
+	stream << "      Head := 0;" << std::endl;
+	stream << "      Tail := 0;" << std::endl;
+	stream << "" << std::endl;
+	stream << "      Looped := false;" << std::endl;
+	stream << "" << std::endl;
+	stream << "      full  <= '0';" << std::endl;
+	stream << "      empty <= '1';" << std::endl;
+	stream << "    else" << std::endl;
+	stream << "      if (read_en = '1') then" << std::endl;
+	stream << "        if ((Looped = true) or (Head /= Tail)) then" << std::endl;
+	stream << "          -- Update data output" << std::endl;
+	stream << "          data_out <= Memory(Tail);" << std::endl;
+	stream << "          " << std::endl;
+	stream << "          -- Update Tail pointer as needed" << std::endl;
+	stream << "          if (Tail = FIFO_DEPTH - 1) then" << std::endl;
+	stream << "            Tail := 0;" << std::endl;
+	stream << "            " << std::endl;
+	stream << "            Looped := false;" << std::endl;
+	stream << "          else" << std::endl;
+	stream << "            Tail := Tail + 1;" << std::endl;
+	stream << "          end if;" << std::endl;
+	stream << "" << std::endl;
+	stream << "        end if;" << std::endl;
+	stream << "      end if;" << std::endl;
+	stream << "" << std::endl;
+	stream << "      if (write_en = '1') then" << std::endl;
+	stream << "        if ((Looped = false) or (Head /= Tail)) then" << std::endl;
+	stream << "          -- Write Data to Memory" << std::endl;
+	stream << "          Memory(Head) := data_in;" << std::endl;
+	stream << "          " << std::endl;
+	stream << "          -- Increment Head pointer as needed" << std::endl;
+	stream << "          if (Head = FIFO_DEPTH - 1) then" << std::endl;
+	stream << "            Head := 0;" << std::endl;
+	stream << "            " << std::endl;
+	stream << "            Looped := true;" << std::endl;
+	stream << "          else" << std::endl;
+	stream << "            Head := Head + 1;" << std::endl;
+	stream << "          end if;" << std::endl;
+	stream << "        end if;" << std::endl;
+	stream << "      end if;" << std::endl;
+	stream << "" << std::endl;
+	stream << "      -- Update empty and full flags" << std::endl;
+	stream << "      if (Head = Tail) then" << std::endl;
+	stream << "        if Looped then" << std::endl;
+	stream << "          full <= '1';" << std::endl;
+	stream << "        else" << std::endl;
+	stream << "          empty <= '1';" << std::endl;
+	stream << "        end if;" << std::endl;
+	stream << "      else" << std::endl;
+	stream << "        empty  <= '0';" << std::endl;
+	stream << "        full  <= '0';" << std::endl;
+	stream << "      end if;" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "  end if;" << std::endl;
+	stream << "end process;" << std::endl;
+	stream << "" << std::endl;
+	stream << "end behavioral;" << std::endl;
+	stream << "-- END standard FIFO buffer" << std::endl;
+}
+
+void ChartToVHDL::writeSignalsAndComponents(std::ostream & stream) {
+	// create internal signals
+	stream << "-- system signals" << std::endl;
+	stream << "signal stall : std_logic;" << std::endl;
+	stream << "signal completed_sig : std_logic;" << std::endl;
+	//        stream << "signal rst_2 : std_logic;" << std::endl;
+	//        stream << "signal rst_1 : std_logic;" << std::endl;
+	stream << "signal rst : std_logic;" << std::endl;
+	stream << std::endl;
+
+	stream << "-- state signals" << std::endl;
+
+	std::list<std::string> signalDecls;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+
+		signalDecls.push_back("signal state_active_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+		signalDecls.push_back("signal state_next_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+		signalDecls.push_back("signal in_entry_set_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+		signalDecls.push_back("signal in_exit_set_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+		signalDecls.push_back("signal in_complete_entry_set_up_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+		signalDecls.push_back("signal in_complete_entry_set_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+		signalDecls.push_back("signal default_completion_" + ATTR(state, "documentOrder") + "_sig : std_logic;");
+	}
+
+	signalDecls.sort();
+	for (std::list<std::string>::iterator iter = signalDecls.begin(); iter != signalDecls.end(); iter++) {
+		stream << *iter << std::endl;
+	}
+	stream << std::endl;
+
+
+	stream << "-- transition signals" << std::endl;
+	stream << "signal spontaneous_en : std_logic;" << std::endl;
+	stream << "signal spontaneous_active : std_logic;" << std::endl;
+	stream << "signal optimal_transition_set_combined_sig : std_logic;" << std::endl;
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		stream << "signal in_optimal_transition_set_" << ATTR(transition, "postFixOrder") << "_sig : std_logic;"
+		       << std::endl;
+	}
+	stream << std::endl;
+
+	stream << "-- event signals" << std::endl;
+	stream << "signal int_event_write_en : std_logic;" << std::endl;
+	stream << "signal int_event_read_en : std_logic;" << std::endl;
+	stream << "signal int_event_empty : std_logic;" << std::endl;
+	stream << "signal int_event_input : event_type;" << std::endl;
+	stream << "signal int_event_output : event_type;" << std::endl;
+	stream << "signal next_event_re : std_logic;" << std::endl;
+	stream << "signal next_event_dequeued : std_logic;" << std::endl;
+	stream << "signal next_event : event_type;" << std::endl;
+	stream << "signal event_consumed : std_logic;" << std::endl;
+	stream << std::endl;
+
+	std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix("");
+	for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+		stream << "signal event_" << eventNameEscape((*eventIter)->value) << "_sig : std_logic;" << std::endl;
+	}
+	stream << std::endl;
+
+	stream << "-- error signals" << std::endl;
+	stream << "signal reg_error_out : std_logic;" << std::endl;
+	stream << "signal error_full_int_event_fifo : std_logic;" << std::endl;
+	stream << std::endl;
+
+	// add components
+	stream << "-- event FIFO" << std::endl;
+	stream << "component std_fifo is" << std::endl;
+	stream << "port ( " << std::endl;
+	stream << "	clk		: in  std_logic;" << std::endl;
+	stream << "	rst		: in  std_logic;" << std::endl;
+	stream << "	write_en	: in  std_logic;" << std::endl;
+	stream << "	read_en         : in  std_logic;" << std::endl;
+	stream << "	data_in         : in  event_type;" << std::endl;
+	stream << "	data_out	: out event_type;" << std::endl;
+	stream << "	empty           : out std_logic;" << std::endl;
+	stream << "	full            : out std_logic" << std::endl; // we calculate how much we need
+	stream << ");" << std::endl;
+	stream << "end component;" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeModuleInstantiation(std::ostream & stream) {
+	// instantiate event fifo
+	stream << "int_event_fifo : component std_fifo " << std::endl;
+	stream << "port map ( " << std::endl;
+	stream << "	clk         => clk," << std::endl;
+	stream << "	rst         => rst_i," << std::endl;
+	stream << "	write_en    => int_event_write_en," << std::endl;
+	stream << "	read_en     => int_event_read_en," << std::endl;
+	stream << "	data_in     => int_event_input," << std::endl;
+	stream << "	data_out    => int_event_output," << std::endl;
+	stream << "	empty       => int_event_empty," << std::endl;
+	stream << "	full        => error_full_int_event_fifo" << std::endl; // we calculate how much we need
+	stream << ");" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeErrorHandler(std::ostream & stream) {
+	// sets error output signal if an error occures somewhere
+	stream << "-- error handler" << std::endl;
+	stream << "-- sets error output signal if an error occures somewhere" << std::endl;
+	stream << "error_handler : process (clk, rst) " << std::endl;
+	stream << "begin" << std::endl;
+	stream << "    if rst = '1' then" << std::endl;
+	stream << "        reg_error_out <= '0';" << std::endl;
+	stream << "    elsif rising_edge(clk) then" << std::endl;
+	stream << "        reg_error_out <= error_full_int_event_fifo;" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "end process;" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeResetHandler(std::ostream & stream) {
+	stream << "-- reset handler" << std::endl;
+	stream << "rst <= rst_i;" << std::endl;
+	//        stream << "rst_proc: process(clk, rst_i)" << std::endl;
+	//        stream << "begin" << std::endl;
+	//        stream << "    if rst_i = '1' then" << std::endl;
+	//        stream << "        rst_2 <= '1';" << std::endl;
+	//        stream << "        rst_1 <= '1';" << std::endl;
+	//        stream << "        rst <= '1';" << std::endl;
+	//        stream << "    elsif (rising_edge(clk)) then" << std::endl;
+	//        stream << "        rst_2 <= rst_i;" << std::endl;
+	//        stream << "        rst_1 <= rst_i;" << std::endl;
+	//        stream << "        rst <= rst_1;" << std::endl;
+	//        stream << "    end if;" << std::endl;
+	//        stream << "end process;" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeSpontaneousHandler(std::ostream & stream) {
+	// sets spontaneous signal
+	stream << "-- spontaneous handler" << std::endl;
+	stream << "spontaneous_handler : process (clk, rst) " << std::endl;
+	stream << "begin" << std::endl;
+	stream << "    if rst = '1' then" << std::endl;
+	stream << "        spontaneous_en <= '1';" << std::endl;
+	stream << "    elsif rising_edge(clk) and stall = '0' then" << std::endl;
+	stream << "        if spontaneous_en = '1' then" << std::endl;
+	stream << "            spontaneous_en <= optimal_transition_set_combined_sig;" << std::endl;
+	stream << "        else" << std::endl;
+	//TODO if new event is dequeued then 1 else stay 0
+	stream << "            spontaneous_en <= next_event_dequeued;" << std::endl;
+	stream << "        end if;" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "end process;" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeInternalEventHandler(std::ostream & stream) {
+	// Add controler specific stuff here
+	stream << "-- event handler" << std::endl;
+	stream << "-- pops events and set event signals" << std::endl;
+	stream << "event_handler : process (clk, rst) " << std::endl;
+	stream << "begin" << std::endl;
+	stream << "    if rst = '1' then" << std::endl;
+
+	std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix("");
+	for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+		stream << "        event_" << eventNameEscape((*eventIter)->value) << "_sig <= '0';" << std::endl;
+	}
+
+	stream << "        next_event_dequeued <= '0';" << std::endl;
+	stream << "        event_consumed <= '0';" << std::endl;
+
+	stream << "    elsif falling_edge(clk) and stall = '0' then" << std::endl;
+
+	VContainer eventConsumed = VOR;
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+
+		if (HAS_ATTR(transition, "event") == true) {
+			*eventConsumed += VLINE("in_optimal_transition_set_"
+			                        + ATTR(transition, "postFixOrder") + "_sig");
+		}
+	}
+
+	VBranch* tree = (VASSIGN,
+	                 VLINE("event_consumed"),
+	                 eventConsumed);
+	tree->print(stream);
+	stream << ";" << std::endl;
+
+	stream << "      if int_event_empty = '0' then " << std::endl;
+	stream << "      case next_event is " << std::endl;
+	for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+		stream << "      when hwe_"
+		       << eventNameEscape((*eventIter)->value) << " =>" << std::endl;
+		for (std::list<TrieNode*>::iterator eventIter2 = eventNames.begin(); eventIter2 != eventNames.end(); eventIter2++) {
+			stream << "        event_" << eventNameEscape((*eventIter2)->value);
+			if (eventNameEscape((*eventIter)->value) == eventNameEscape((*eventIter2)->value)) {
+				stream << "_sig <= '1';" << std::endl;
+			} else {
+				stream << "_sig <= '0';" << std::endl;
+			}
+		}
+		stream << "        next_event_dequeued <= '1';" << std::endl;
+	}
+	stream << "      when others =>" << std::endl;
+	for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+		stream << "        event_" << eventNameEscape((*eventIter)->value) << "_sig <= '0';" << std::endl;
+	}
+	stream << "        next_event_dequeued <= '0';" << std::endl;
+	stream << "      end case;" << std::endl;
+	stream << "      elsif int_event_empty = '1' and event_consumed = '1' then" << std::endl;
+
+	for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+		stream << "        event_" << eventNameEscape((*eventIter)->value) << "_sig <= '0';" << std::endl;
+	}
+	stream << "        next_event_dequeued <= '0';" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "    end if;" << std::endl;
+	stream << "end process;" << std::endl;
+	stream << std::endl;
+
+	stream << "next_event_re <= not int_event_empty and not stall; " << std::endl;
+	stream << "next_event <= int_event_output; " << std::endl;
+	stream << "int_event_write_en <= next_event_we_i; " << std::endl;
+	stream << "int_event_input <= next_event_i; " << std::endl;
+	stream << "int_event_read_en <= not stall; --not spontaneous_en and  " << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeActiveStateNplusOne(std::ostream & stream) {
+	stream << "-- active configuration" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+
+		// TÖDO: is there a case where complete entry set reflects not the next state ?
+		VBranch* tree = (VASSIGN,
+		                 //                    VLINE("state_next_" + toStr(i) + "_sig"),
+		                 //                    (VAND,
+		                 //                    VLINE("in_complete_entry_set_" + toStr(i) + "_sig") ,
+		                 //                    (VOR, VLINE("in_exit_set_" + toStr(i) + "_sig"), (VNOT, VLINE("state_active_" + toStr(i) + "_sig"))))
+		                 //                    );
+		                 VLINE("state_next_" + toStr(i) + "_sig"),
+		                 (VOR,
+		                  VLINE("in_complete_entry_set_" + toStr(i) + "_sig"),
+		                  (VAND, (VNOT, VLINE("in_exit_set_" + toStr(i) + "_sig")), VLINE("state_active_" + toStr(i) + "_sig")))
+		                );
+
+		tree->print(stream);
+		stream << ";" << std::endl;
+
+	}
+}
+
+void ChartToVHDL::writeOptimalTransitionSetSelection(std::ostream & stream) {
+	stream << "-- optimal transition set selection" << std::endl;
+	VContainer optimalTransitions = VOR;
+	VContainer spontaneoursActive = VOR;
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		std::string conflicts = ATTR(transition, "conflictBools");
+
+
+		VContainer nameMatchers = VOR;
+		if (HAS_ATTR(transition, "event")) {
+			std::list<std::string> eventDescs = tokenize(ATTR(transition, "event"));
+			for (std::list<std::string>::iterator descIter = eventDescs.begin(); descIter != eventDescs.end(); descIter++) {
+				std::list<TrieNode*> eventNames = _eventTrie.getWordsWithPrefix((*descIter) == "*" ? "" : *descIter);
+				for (std::list<TrieNode*>::iterator eventIter = eventNames.begin(); eventIter != eventNames.end(); eventIter++) {
+					*nameMatchers += VLINE("event_" + eventNameEscape((*eventIter)->value) + "_sig");
+				}
+			}
+		} else {
+			*nameMatchers += VLINE("'1'");
+		}
+
+		VContainer conflicters = VOR;
+		for (size_t j = 0; j < i; j++) {
+			if (conflicts[j] == '1') {
+				*conflicters += VLINE("in_optimal_transition_set_" + toStr(j) + "_sig");
+			}
+		}
+
+		VBranch* tree = (VASSIGN,
+		                 VLINE("in_optimal_transition_set_" + ATTR(transition, "postFixOrder") + "_sig"),
+		                 (VAND,
+		                  (HAS_ATTR(transition, "event")
+		                   ? (VNOT, VLINE("spontaneous_active"))
+		                   : (VNOP, VLINE("spontaneous_en"))),
+		                  VLINE("state_active_" + ATTR(transition, "source") + "_sig"),
+		                  nameMatchers,
+		                  (VNOT, conflicters)));
+
+		tree->print(stream);
+		stream << ";" << std::endl;
+
+		*optimalTransitions += VLINE("in_optimal_transition_set_"
+		                             + ATTR(transition, "postFixOrder") + "_sig");
+		if (HAS_ATTR(transition, "event") == false) {
+			*spontaneoursActive += VLINE("in_optimal_transition_set_"
+			                             + ATTR(transition, "postFixOrder") + "_sig");
+		}
+	}
+
+	VBranch* tree = (VASSIGN,
+	                 VLINE("optimal_transition_set_combined_sig"),
+	                 optimalTransitions);
+	tree->print(stream);
+	stream << ";" << std::endl;
+
+	VBranch* tree2 = (VASSIGN,
+	                  VLINE("spontaneous_active"),
+	                  spontaneoursActive);
+	tree2->print(stream);
+	stream << ";" << std::endl;
+}
+
+void ChartToVHDL::writeExitSet(std::ostream & stream) {
+	stream << "-- exit set selection" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		std::string completion = ATTR(state, "completionBools");
+		std::string ancestors = ATTR(state, "ancBools");
+		std::string children = ATTR(state, "childBools");
+		std::string parent = ATTR(state, "parent");
+
+		VContainer exitsetters = VOR;
+		for (size_t j = 0; j < _transitions.size(); j++) {
+			Element<std::string> transition(_transitions[j]);
+			std::string exitSet = ATTR(transition, "exitSetBools");
+			if (exitSet[i] == '1') {
+				*exitsetters += VLINE("in_optimal_transition_set_" + toStr(j) + "_sig ");
+			}
+		}
+
+		VBranch* tree = (VASSIGN,
+		                 VLINE("in_exit_set_" + toStr(i) + "_sig"),
+		                 (VAND,
+		                  VLINE("state_active_" + toStr(i) + "_sig"),
+		                  exitsetters));
+
+		tree->print(stream);
+		stream << ";" << std::endl;
+	}
+}
+
+void ChartToVHDL::writeEntrySet(std::ostream & stream) {
+	stream << "-- entry set selection" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+
+		VBranch* tree = (VASSIGN,
+		                 VLINE("in_entry_set_" + toStr(i) + "_sig"),
+		                 (VAND,
+		                  VLINE("in_complete_entry_set_" + toStr(i) + "_sig"),
+		                  (VOR, VLINE("in_exit_set_" + toStr(i) + "_sig"),
+		                   (VNOT, VLINE("state_active_" + toStr(i) + "_sig")))));
+
+		tree->print(stream);
+		stream << ";" << std::endl;
+	}
+}
+
+void ChartToVHDL::writeDefaultCompletions(std::ostream & stream) {
+	// TODO direct connect the line in complete entry set (no extra line needed ...)
+	stream << "-- default completion assignments" << std::endl;
+	stream << "-- indikates if the state for which I am the def-completion is active" << std::endl;
+	std::map<Element<std::string>, NodeSet<std::string> > completions;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		completions[state]; // initialize other completions to 0
+
+		// we just need this if parent is a compound state
+		std::string parent = ATTR(state, "parent");
+		if (!parent.empty()
+		        && isCompound(Element<std::string>(_states[strTo<size_t>(parent)]))) {
+
+			// Am I default completen ?
+			std::string completion = ATTR_CAST(_states[strTo<size_t>(parent)], "completionBools");
+			if (completion[i] == '1') {
+				// Yes? then give me the parent line
+				completions[state].push_back(Element<std::string>(_states[strTo<size_t>(parent)]));
+
+			}
+		}
+	}
+
+	std::map<Element<std::string>, NodeSet<std::string> >::const_iterator complIter = completions.begin();
+	while (complIter != completions.end()) {
+		const Element<std::string>& state(complIter->first);
+		const NodeSet<std::string>& refs(complIter->second);
+
+		std::string index = ATTR(state, "documentOrder");
+		VContainer defaultCompleters = VOR;
+
+		for (size_t i = 0; i < refs.size(); i++) {
+			//                *defaultCompleters += VLINE("in_complete_entry_set_" +
+			// TODO: default completion just when state is entered the first time ?
+			// if yes then we use the following code. If not we have to revert
+			*defaultCompleters += VLINE("in_entry_set_" +
+			                            ATTR_CAST(refs[i], "documentOrder") + "_sig ");
+		}
+
+		VBranch* tree = (VASSIGN,
+		                 VLINE("default_completion_" + index + "_sig"), defaultCompleters);
+
+		tree->print(stream);
+		stream << ";" << std::endl;
+
+		complIter++;
+	}
+
+
+}
+
+void ChartToVHDL::writeCompleteEntrySet(std::ostream & stream) {
+	stream << "-- complete entry set selection" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		std::string completion = ATTR(state, "completionBools");
+		std::string ancestors = ATTR(state, "ancBools");
+		std::string children = ATTR(state, "childBools");
+		std::string parent = ATTR(state, "parent");
+
+		VContainer optimalEntrysetters = VOR;
+		for (size_t j = 0; j < _transitions.size(); j++) {
+			Element<std::string> transition(_transitions[j]);
+			std::string targetSet = ATTR(transition, "targetBools");
+			if (targetSet[i] == '1') {// <- ? TODO Was ist hier der vergleich?
+				*optimalEntrysetters += VLINE("in_optimal_transition_set_" + toStr(j) + "_sig");
+			}
+		}
+
+		VContainer completeEntrysetters = VOR;
+		stream << "--" << state.getNodeName() << std::endl; // for debugging
+		if (isCompound(state) || isParallel(state)) { // <- true for scxml? TODO
+			for (size_t j = 0; j < _states.size(); j++) {
+				if (children[j] != '1') // if is child of state j
+					continue;
+				*completeEntrysetters += VLINE("in_complete_entry_set_up_" + toStr(j) + "_sig");
+			}
+		}
+
+		VBranch* tree = (VASSIGN,
+		                 VLINE("in_complete_entry_set_up_" + toStr(i) + "_sig"),
+		                 (VOR, optimalEntrysetters, completeEntrysetters)
+		                );
+
+
+		tree->print(stream);
+		stream << ";" << std::endl;
 
 #if 0
-            stream << "in_complete_entry_set_up_" << toStr(i) << "_sig <= ('0'" << std::endl;
-
-            for (size_t j = 0; j < _transitions.size(); j++) {
-                Element<std::string> transition(_transitions[j]);
-                //            std::cout << transition;
-                std::string targetSet = ATTR(transition, "targetBools");
-                if (targetSet[i] == '1') {
-                    stream << "  or in_optimal_transition_set_" << toStr(j) << std::endl;
-                }
-            }
-            if (isCompound(state)) {
-                for (size_t j = 0; j < _states.size(); j++) {
-                    if (children[j] != '1')
-                        continue;
-
-                    stream << "  or in_complete_entry_set_up_" << toStr(j) << "_sig" << std::endl;
-                }
-
-            }
-            stream << ");" << std::endl;
+		stream << "in_complete_entry_set_up_" << toStr(i) << "_sig <= ('0'" << std::endl;
+
+		for (size_t j = 0; j < _transitions.size(); j++) {
+			Element<std::string> transition(_transitions[j]);
+			//            std::cout << transition;
+			std::string targetSet = ATTR(transition, "targetBools");
+			if (targetSet[i] == '1') {
+				stream << "  or in_optimal_transition_set_" << toStr(j) << std::endl;
+			}
+		}
+		if (isCompound(state)) {
+			for (size_t j = 0; j < _states.size(); j++) {
+				if (children[j] != '1')
+					continue;
+
+				stream << "  or in_complete_entry_set_up_" << toStr(j) << "_sig" << std::endl;
+			}
+
+		}
+		stream << ");" << std::endl;
 #endif
-        }
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            std::string completion = ATTR(state, "completionBools");
-            std::string ancestors = ATTR(state, "ancBools");
-            std::string parent = ATTR(state, "parent");
-
-            if (parent.size() == 0) {
-                continue; // TODO: FixMe <scxml> <-- ?
-            }
-
-            VContainer tmp1 = VAND;
-            // if parent is compound
-            if (!parent.empty() &&
-                    isCompound(Element<std::string>(_states[strTo<size_t>(parent)]))) {
-                std::string children = ATTR_CAST(_states[strTo<size_t>(parent)],
-                        "childBools");
-                // TODO: do not add default_completion line if not needed
-                // --> just if this state is the default completion of parent
-                // --> init attr. or if not present first in document order <-- = completion bool ?
-                *tmp1 += VLINE("default_completion_" + ATTR(state, "documentOrder") + "_sig");
-
-                //TODO check this
-                for (size_t j = 0; j < _states.size(); j++) {
-                    if (children[j] != '1')
-                        continue;
-                    *tmp1 += (VAND,
-                            (VNOT,
-                            (VAND,
-                            VLINE("state_active_" + toStr(j) + "_sig"),
-                            (VNOT,
-                            VLINE("in_exit_set_" + toStr(j) + "_sig")))));
-
-                }
-
-            }
-
-            // if parent is parallel
-            if (isParallel(Element<std::string>(_states[strTo<size_t>(parent)]))) {
-                *tmp1 += VLINE("in_complete_entry_set_" + toStr(parent) + "_sig");
-            }
-
-            VBranch* tree = (VASSIGN,
-                    VLINE("in_complete_entry_set_" + toStr(i) + "_sig"),
-                    (VOR,
-                    VLINE("in_complete_entry_set_up_" + ATTR(state, "documentOrder") + "_sig"),
-                    tmp1));
-
-            tree->print(stream);
-            stream << ";" << std::endl;
+	}
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		std::string completion = ATTR(state, "completionBools");
+		std::string ancestors = ATTR(state, "ancBools");
+		std::string parent = ATTR(state, "parent");
+
+		if (parent.size() == 0) {
+			continue; // TODO: FixMe <scxml> <-- ?
+		}
+
+		VContainer tmp1 = VAND;
+		// if parent is compound
+		if (!parent.empty() &&
+		        isCompound(Element<std::string>(_states[strTo<size_t>(parent)]))) {
+			std::string children = ATTR_CAST(_states[strTo<size_t>(parent)],
+			                                 "childBools");
+			// TODO: do not add default_completion line if not needed
+			// --> just if this state is the default completion of parent
+			// --> init attr. or if not present first in document order <-- = completion bool ?
+			*tmp1 += VLINE("default_completion_" + ATTR(state, "documentOrder") + "_sig");
+
+			//TODO check this
+			for (size_t j = 0; j < _states.size(); j++) {
+				if (children[j] != '1')
+					continue;
+				*tmp1 += (VAND,
+				          (VNOT,
+				           (VAND,
+				            VLINE("state_active_" + toStr(j) + "_sig"),
+				            (VNOT,
+				             VLINE("in_exit_set_" + toStr(j) + "_sig")))));
+
+			}
+
+		}
+
+		// if parent is parallel
+		if (isParallel(Element<std::string>(_states[strTo<size_t>(parent)]))) {
+			*tmp1 += VLINE("in_complete_entry_set_" + toStr(parent) + "_sig");
+		}
+
+		VBranch* tree = (VASSIGN,
+		                 VLINE("in_complete_entry_set_" + toStr(i) + "_sig"),
+		                 (VOR,
+		                  VLINE("in_complete_entry_set_up_" + ATTR(state, "documentOrder") + "_sig"),
+		                  tmp1));
+
+		tree->print(stream);
+		stream << ";" << std::endl;
 
 #if 0
-            stream << "in_complete_entry_set_" << toStr(i) << "_sig <= (in_complete_entry_set_up_" << toStr(i) << "_sig or (" << std::endl;
+		stream << "in_complete_entry_set_" << toStr(i) << "_sig <= (in_complete_entry_set_up_" << toStr(i) << "_sig or (" << std::endl;
 
-            if (isParallel(Element<std::string>(_states[strTo<size_t>(parent)]))) {
-                stream << "  in_complete_entry_set_" << toStr(parent) << "_sig" << std::endl;
-            } else if (isCompound(Element<std::string>(_states[strTo<size_t>(parent)]))) {
-                stream << "  default_completion_" << toStr(parent) << "_sig" << std::endl;
+		if (isParallel(Element<std::string>(_states[strTo<size_t>(parent)]))) {
+			stream << "  in_complete_entry_set_" << toStr(parent) << "_sig" << std::endl;
+		} else if (isCompound(Element<std::string>(_states[strTo<size_t>(parent)]))) {
+			stream << "  default_completion_" << toStr(parent) << "_sig" << std::endl;
 
-                for (size_t j = 0; j < _states.size(); j++) {
-                    if (children[j] != '1')
-                        continue;
-                    stream << "  and not (is_active" << toStr(j) << "_sig and not in_exit_set_" << toStr(j) << "_sig)" << std::endl;
+			for (size_t j = 0; j < _states.size(); j++) {
+				if (children[j] != '1')
+					continue;
+				stream << "  and not (is_active" << toStr(j) << "_sig and not in_exit_set_" << toStr(j) << "_sig)" << std::endl;
 
-                }
-            }
+			}
+		}
 
-            stream << ");" << std::endl;
+		stream << ");" << std::endl;
 #endif
-        }
-    }
-
-    void ChartToVHDL::writeStateHandler(std::ostream & stream) {
-        // updater for current state
-        stream << "-- State Handler" << std::endl;
-        stream << "-- updates current state" << std::endl;
-        stream << "state_proc: process(clk, rst, stall)" << std::endl;
-        stream << "begin" << std::endl;
-        stream << "    if rst = '1' then" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "        state_active_" << toStr(i) << "_sig <= " << "'0';" << std::endl;
-        }
-
-        stream << "        in_complete_entry_set_0_sig <= '1';" << std::endl;
-        stream << "    elsif (rising_edge(clk) and stall = '0') then" << std::endl;
-        stream << "        in_complete_entry_set_0_sig <= '0';" << std::endl;
-
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "        state_active_" << toStr(i) << "_sig <= " << "state_next_" << toStr(i) << "_sig;" << std::endl;
-        }
-
-        stream << "    end if;" << std::endl;
-        stream << "end process;" << std::endl;
-        stream << std::endl;
-    }
-
-    void ChartToVHDL::writeSystemSignalMapping(std::ostream & stream) {
-        stream << "-- system signals" << std::endl;
-        NodeSet<std::string> topLevelFinal = DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "final", _scxml);
-
-        VContainer tlf = VOR;
-        for (size_t i = 0; i < topLevelFinal.size(); i++) {
-            Element<std::string> final(topLevelFinal[i]);
-            *tlf += VLINE("state_active_" + ATTR(final, "documentOrder") + "_sig");
-
-        }
-
-        VBranch* tree = (VASSIGN,
-                VLINE("completed_sig"),
-                tlf);
-
-        tree->print(stream);
-        stream << ";" << std::endl;
-
-        // tmp mapping for events
-        stream << "stall <= not en or completed_sig or ( int_event_empty and not spontaneous_en ) ; " << std::endl;
-        stream << std::endl;
-
-        // interface signals
-        stream << "-- interface signals" << std::endl;
-        for (size_t i = 0; i < _states.size(); i++) {
-            Element<std::string> state(_states[i]);
-            stream << "state_active_" << ATTR(state, "documentOrder")
-                    << "_o <= state_active_" << ATTR(state, "documentOrder")
-                    << "_sig;" << std::endl;
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
-                stream << "exit_set_" << ATTR(state, "documentOrder")
-                        << "_o <= in_exit_set_" << ATTR(state, "documentOrder")
-                        << "_sig;" << std::endl;
-            }
-
-            if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
-                stream << "entry_set_" << ATTR(state, "documentOrder")
-                        << "_o <= in_entry_set_" << ATTR(state, "documentOrder")
-                        << "_sig;" << std::endl;
-            }
-        }
-
-        for (size_t i = 0; i < _transitions.size(); i++) {
-            Element<std::string> transition(_transitions[i]);
-            if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
-                stream << "transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_o <= in_optimal_transition_set_" << ATTR(transition, "postFixOrder")
-                        << "_sig;" << std::endl;
-            }
-        }
-
-        stream << "completed_o <= completed_sig; " << std::endl;
-        stream << "error_o <= reg_error_out; " << std::endl;
-        stream << std::endl;
-    }
+	}
+}
+
+void ChartToVHDL::writeStateHandler(std::ostream & stream) {
+	// updater for current state
+	stream << "-- State Handler" << std::endl;
+	stream << "-- updates current state" << std::endl;
+	stream << "state_proc: process(clk, rst, stall)" << std::endl;
+	stream << "begin" << std::endl;
+	stream << "    if rst = '1' then" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "        state_active_" << toStr(i) << "_sig <= " << "'0';" << std::endl;
+	}
+
+	stream << "        in_complete_entry_set_0_sig <= '1';" << std::endl;
+	stream << "    elsif (rising_edge(clk) and stall = '0') then" << std::endl;
+	stream << "        in_complete_entry_set_0_sig <= '0';" << std::endl;
+
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "        state_active_" << toStr(i) << "_sig <= " << "state_next_" << toStr(i) << "_sig;" << std::endl;
+	}
+
+	stream << "    end if;" << std::endl;
+	stream << "end process;" << std::endl;
+	stream << std::endl;
+}
+
+void ChartToVHDL::writeSystemSignalMapping(std::ostream & stream) {
+	stream << "-- system signals" << std::endl;
+	NodeSet<std::string> topLevelFinal = DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "final", _scxml);
+
+	VContainer tlf = VOR;
+	for (size_t i = 0; i < topLevelFinal.size(); i++) {
+		Element<std::string> final(topLevelFinal[i]);
+		*tlf += VLINE("state_active_" + ATTR(final, "documentOrder") + "_sig");
+
+	}
+
+	VBranch* tree = (VASSIGN,
+	                 VLINE("completed_sig"),
+	                 tlf);
+
+	tree->print(stream);
+	stream << ";" << std::endl;
+
+	// tmp mapping for events
+	stream << "stall <= not en or completed_sig or ( int_event_empty and not spontaneous_en ) ; " << std::endl;
+	stream << std::endl;
+
+	// interface signals
+	stream << "-- interface signals" << std::endl;
+	for (size_t i = 0; i < _states.size(); i++) {
+		Element<std::string> state(_states[i]);
+		stream << "state_active_" << ATTR(state, "documentOrder")
+		       << "_o <= state_active_" << ATTR(state, "documentOrder")
+		       << "_sig;" << std::endl;
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onexit", state).size() > 0) {
+			stream << "exit_set_" << ATTR(state, "documentOrder")
+			       << "_o <= in_exit_set_" << ATTR(state, "documentOrder")
+			       << "_sig;" << std::endl;
+		}
+
+		if (DOMUtils::filterChildElements(_nsInfo.xmlNSPrefix + "onentry", state).size() > 0) {
+			stream << "entry_set_" << ATTR(state, "documentOrder")
+			       << "_o <= in_entry_set_" << ATTR(state, "documentOrder")
+			       << "_sig;" << std::endl;
+		}
+	}
+
+	for (size_t i = 0; i < _transitions.size(); i++) {
+		Element<std::string> transition(_transitions[i]);
+		if (DOMUtils::filterChildType(Arabica::DOM::Node_base::ELEMENT_NODE, transition).size() > 0) {
+			stream << "transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_o <= in_optimal_transition_set_" << ATTR(transition, "postFixOrder")
+			       << "_sig;" << std::endl;
+		}
+	}
+
+	stream << "completed_o <= completed_sig; " << std::endl;
+	stream << "error_o <= reg_error_out; " << std::endl;
+	stream << std::endl;
+}
 
 }
\ No newline at end of file
diff --git a/src/uscxml/transform/ChartToVHDL.h b/src/uscxml/transform/ChartToVHDL.h
index f3bcd3b..8e5a3ef 100644
--- a/src/uscxml/transform/ChartToVHDL.h
+++ b/src/uscxml/transform/ChartToVHDL.h
@@ -164,19 +164,19 @@ protected:
 
 	void writeTypes(std::ostream& stream);
 	void writeIncludes(std::ostream& stream);
-        
-        // top layer components
+
+	// top layer components
 	void writeFiFo(std::ostream& stream);
 	void writeEventController(std::ostream & stream);
 	void writeMicroStepper(std::ostream& stream);
 	void writeTestbench(std::ostream & stream);
-        
-        // system
+
+	// system
 	void writeSignalsAndComponents(std::ostream& stream);
 	void writeSystemSignalMapping(std::ostream& stream);
 	void writeModuleInstantiation(std::ostream& stream);
 
-        // combinatorial logic
+	// combinatorial logic
 	void writeOptimalTransitionSetSelection(std::ostream& stream);
 	void writeExitSet(std::ostream & stream);
 	void writeEntrySet(std::ostream & stream);
@@ -185,24 +185,24 @@ protected:
 	void writeCompleteEntrySet(std::ostream & stream);
 	void writeActiveStateNplusOne(std::ostream & stream);
 
-        // handler
+	// handler
 	void writeStateHandler(std::ostream& stream);
 	void writeResetHandler(std::ostream & stream);
 	void writeSpontaneousHandler(std::ostream & stream);
 	void writeInternalEventHandler(std::ostream & stream);
 	void writeErrorHandler(std::ostream& stream);
-        
-        // event generation
-	void writeExContentBlock(std::ostream & stream, std::string index, 
-            std::list< Arabica::DOM::Element<std::string> > commandSequence);
-        
+
+	// event generation
+	void writeExContentBlock(std::ostream & stream, std::string index,
+	                         std::list< Arabica::DOM::Element<std::string> > commandSequence);
+
 	Trie _eventTrie;
-    Arabica::XPath::NodeSet<std::string> _execContent;
+	Arabica::XPath::NodeSet<std::string> _execContent;
 
 private:
 	std::string eventNameEscape(const std::string& eventName);
 
-    std::string getLineForExecContent(const Arabica::DOM::Node<std::string>& elem);
+	std::string getLineForExecContent(const Arabica::DOM::Node<std::string>& elem);
 
 };
 
diff --git a/test/src/issues/test-issue62.cpp b/test/src/issues/test-issue62.cpp
index 4074177..db44dad 100644
--- a/test/src/issues/test-issue62.cpp
+++ b/test/src/issues/test-issue62.cpp
@@ -4,69 +4,69 @@
 using namespace uscxml;
 
 int main(int argc, char** argv) {
-    google::LogToStderr();
-    google::InitGoogleLogging(argv[0]);
-    
-    const char* scxmlContent =
-    "<scxml datamodel=\"lua\" initial=\"init\" name=\"scxml_root\" version=\"1.0\" xmlns=\"http://www.w3.org/2005/07/scxml\">               "
-    "   <state id=\"init\">                                                                                                                 "
-    "       <transition target=\"InvokeParent\"/>                                                                                           "
-    "   </state>                                                                                                                            "
-    "   <final id=\"FinalShape1\"/>                                                                                                         "
-    "   <state id=\"InvokeParent\">                                                                                                         "
-    "       <invoke autoforward=\"true\" id=\"test_invoke\" type=\"scxml\">                                                                 "
-    "           <content>                                                                                                                   "
-    "               <scxml datamodel=\"lua\" initial=\"On\" name=\"ScxmlShape1\" version=\"1.0\" xmlns=\"http://www.w3.org/2005/07/scxml\"> "
-    "                   <state id=\"On\">                                                                                                   "
-    "                       <onentry>                                                                                                       "
-    "                           <script>print('TEST LOGGING FROM INVOKE SOURCE')</script>                                                   "
-    "                       </onentry>                                                                                                      "
-    "                       <transition target=\"Off\"/>                                                                                    "
-    "                   </state>                                                                                                            "
-    "                   <state id=\"Off\">                                                                                                  "
-    "                       <transition event=\"inside_invoke\" target=\"End\"/>                                                            "
-    "                   </state>                                                                                                            "
-    "                   <final id=\"End\"/>                                                                                                 "
-    "               </scxml>                                                                                                                "
-    "           </content>                                                                                                                  "
-    "       </invoke>                                                                                                                       "
-    "       <transition event=\"done.invoke.test_invoke\" target=\"FinalShape1\"/>                                                          "
-    "       <transition event=\"move_here\" target=\"StateXXX\"/>                                                                           "
-    "   </state>                                                                                                                            "
-    "   <state id=\"StateXXX\">                                                                                                             "
-    "       <transition target=\"FinalShape1\"/>                                                                                            "
-    "   </state>                                                                                                                            "
-    "</scxml>                                                                                                                               ";
-    
-    std::string msg;
-    
-    uscxml::Interpreter scxml = uscxml::Interpreter(uscxml::Interpreter::fromXML(scxmlContent, ""));
-    std::list<InterpreterIssue> issues = scxml.validate();
-    for (std::list<InterpreterIssue>::iterator issueIter = issues.begin(); issueIter != issues.end(); issueIter++) {
-        std::cout << *issueIter;
-    }
-    
-    scxml.addMonitor(new StateTransitionMonitor());
-    
-    uscxml::InterpreterState state;
-    
-    // assume initial stable configuration
-    do {
-        state = scxml.step();
-    } while(state > 0);
-    
-    scxml.receive(Event("move_here"));
-    scxml.receive(Event("inside_invoke"));
+	google::LogToStderr();
+	google::InitGoogleLogging(argv[0]);
+
+	const char* scxmlContent =
+	    "<scxml datamodel=\"lua\" initial=\"init\" name=\"scxml_root\" version=\"1.0\" xmlns=\"http://www.w3.org/2005/07/scxml\">               "
+	    "   <state id=\"init\">                                                                                                                 "
+	    "       <transition target=\"InvokeParent\"/>                                                                                           "
+	    "   </state>                                                                                                                            "
+	    "   <final id=\"FinalShape1\"/>                                                                                                         "
+	    "   <state id=\"InvokeParent\">                                                                                                         "
+	    "       <invoke autoforward=\"true\" id=\"test_invoke\" type=\"scxml\">                                                                 "
+	    "           <content>                                                                                                                   "
+	    "               <scxml datamodel=\"lua\" initial=\"On\" name=\"ScxmlShape1\" version=\"1.0\" xmlns=\"http://www.w3.org/2005/07/scxml\"> "
+	    "                   <state id=\"On\">                                                                                                   "
+	    "                       <onentry>                                                                                                       "
+	    "                           <script>print('TEST LOGGING FROM INVOKE SOURCE')</script>                                                   "
+	    "                       </onentry>                                                                                                      "
+	    "                       <transition target=\"Off\"/>                                                                                    "
+	    "                   </state>                                                                                                            "
+	    "                   <state id=\"Off\">                                                                                                  "
+	    "                       <transition event=\"inside_invoke\" target=\"End\"/>                                                            "
+	    "                   </state>                                                                                                            "
+	    "                   <final id=\"End\"/>                                                                                                 "
+	    "               </scxml>                                                                                                                "
+	    "           </content>                                                                                                                  "
+	    "       </invoke>                                                                                                                       "
+	    "       <transition event=\"done.invoke.test_invoke\" target=\"FinalShape1\"/>                                                          "
+	    "       <transition event=\"move_here\" target=\"StateXXX\"/>                                                                           "
+	    "   </state>                                                                                                                            "
+	    "   <state id=\"StateXXX\">                                                                                                             "
+	    "       <transition target=\"FinalShape1\"/>                                                                                            "
+	    "   </state>                                                                                                                            "
+	    "</scxml>                                                                                                                               ";
+
+	std::string msg;
+
+	uscxml::Interpreter scxml = uscxml::Interpreter(uscxml::Interpreter::fromXML(scxmlContent, ""));
+	std::list<InterpreterIssue> issues = scxml.validate();
+	for (std::list<InterpreterIssue>::iterator issueIter = issues.begin(); issueIter != issues.end(); issueIter++) {
+		std::cout << *issueIter;
+	}
+
+	scxml.addMonitor(new StateTransitionMonitor());
+
+	uscxml::InterpreterState state;
+
+	// assume initial stable configuration
+	do {
+		state = scxml.step();
+	} while(state > 0);
+
+	scxml.receive(Event("move_here"));
+	scxml.receive(Event("inside_invoke"));
+
+	while(state != uscxml::USCXML_FINISHED) {
+		do {
+			state = scxml.step(true);
+		} while(state > 0);
+	}
+
+	std::cout << "************************************" << std::endl;
+	std::cout << "Successfully finished state machine!" << std::endl;
+
+	return EXIT_SUCCESS;
 
-    while(state != uscxml::USCXML_FINISHED) {
-        do {
-            state = scxml.step(true);
-        } while(state > 0);
-    }
-    
-    std::cout << "************************************" << std::endl;
-    std::cout << "Successfully finished state machine!" << std::endl;
-    
-    return EXIT_SUCCESS;
-    
 }
\ No newline at end of file
diff --git a/test/src/issues/test-issue63.cpp b/test/src/issues/test-issue63.cpp
index 12a471c..5cedcad 100644
--- a/test/src/issues/test-issue63.cpp
+++ b/test/src/issues/test-issue63.cpp
@@ -5,44 +5,44 @@
 using namespace uscxml;
 
 int main(int argc, char** argv) {
-    google::LogToStderr();
-    google::InitGoogleLogging(argv[0]);
-    
-    const char* scxmlContent =
-    "<scxml datamodel=\"lua\" initial=\"init\" name=\"scxml_root\" version=\"1.0\" xmlns=\"http://www.w3.org/2005/07/scxml\">"
-    "   <state id=\"init\">                                                                                                  "
-    "       <onentry>  <script>             print('Hello, World!')                  </script>  </onentry>                    "
-    "       <onentry>  <script>             print(\"Hello, World!\")                </script>  </onentry>                    "
-    "       <onentry>  <script>             print('Hello, &quot;World&quot;')       </script>  </onentry>                    "
-    "       <onentry>  <script><![CDATA[    print('Hello, \"World\"')            ]]></script>  </onentry>                    "
-    "       <onentry>  <script>             print(&quot;Hello, world!&quot;)        </script>  </onentry>                    "
-    "       <transition target=\"FinalShape1\"/>                                                                             "
-    "       <transition cond=\"_event.data==&quot;string value&quot;\" event=\"test\" target=\"FinalShape1\"/>               "
-    "   </state>                                                                                                             "
-    "   <final id=\"FinalShape1\"/>                                                                                          "
-    "</scxml>                                                                                                                ";
-    
-    std::string msg;
-    
-    uscxml::Interpreter scxml = uscxml::Interpreter(uscxml::Interpreter::fromXML(scxmlContent, ""));
-    
-    std::list<InterpreterIssue> issues = scxml.validate();
-    for (std::list<InterpreterIssue>::iterator issueIter = issues.begin(); issueIter != issues.end(); issueIter++) {
-        std::cout << *issueIter << std::endl;
-    }
-
-    scxml.addMonitor(new StateTransitionMonitor());
-    
-    uscxml::InterpreterState state;
-    
-    do {
-        
-        state = scxml.step();
-    }   while(state != uscxml::USCXML_FINISHED && state != uscxml::USCXML_DESTROYED);
-    
-    std::cout << "************************************" << std::endl;
-    std::cout << "Successfully finished state machine!" << std::endl;
-    
-    return EXIT_SUCCESS;
-    
+	google::LogToStderr();
+	google::InitGoogleLogging(argv[0]);
+
+	const char* scxmlContent =
+	    "<scxml datamodel=\"lua\" initial=\"init\" name=\"scxml_root\" version=\"1.0\" xmlns=\"http://www.w3.org/2005/07/scxml\">"
+	    "   <state id=\"init\">                                                                                                  "
+	    "       <onentry>  <script>             print('Hello, World!')                  </script>  </onentry>                    "
+	    "       <onentry>  <script>             print(\"Hello, World!\")                </script>  </onentry>                    "
+	    "       <onentry>  <script>             print('Hello, &quot;World&quot;')       </script>  </onentry>                    "
+	    "       <onentry>  <script><![CDATA[    print('Hello, \"World\"')            ]]></script>  </onentry>                    "
+	    "       <onentry>  <script>             print(&quot;Hello, world!&quot;)        </script>  </onentry>                    "
+	    "       <transition target=\"FinalShape1\"/>                                                                             "
+	    "       <transition cond=\"_event.data==&quot;string value&quot;\" event=\"test\" target=\"FinalShape1\"/>               "
+	    "   </state>                                                                                                             "
+	    "   <final id=\"FinalShape1\"/>                                                                                          "
+	    "</scxml>                                                                                                                ";
+
+	std::string msg;
+
+	uscxml::Interpreter scxml = uscxml::Interpreter(uscxml::Interpreter::fromXML(scxmlContent, ""));
+
+	std::list<InterpreterIssue> issues = scxml.validate();
+	for (std::list<InterpreterIssue>::iterator issueIter = issues.begin(); issueIter != issues.end(); issueIter++) {
+		std::cout << *issueIter << std::endl;
+	}
+
+	scxml.addMonitor(new StateTransitionMonitor());
+
+	uscxml::InterpreterState state;
+
+	do {
+
+		state = scxml.step();
+	}   while(state != uscxml::USCXML_FINISHED && state != uscxml::USCXML_DESTROYED);
+
+	std::cout << "************************************" << std::endl;
+	std::cout << "Successfully finished state machine!" << std::endl;
+
+	return EXIT_SUCCESS;
+
 }
\ No newline at end of file
diff --git a/test/src/issues/test-issue64.scxml b/test/src/issues/test-issue64.scxml
new file mode 100644
index 0000000..0969b5f
--- /dev/null
+++ b/test/src/issues/test-issue64.scxml
@@ -0,0 +1,16 @@
+<scxml datamodel="lua" initial="start" name="root" version="1.0" xmlns="http://www.w3.org/2005/07/scxml">
+    <final id="end"/>
+    <state id="start">
+        <invoke id="test_invoke" type="scxml">
+            <content>
+                <scxml datamodel="lua" name="scxml_invoke" version="1.0" xmlns="http://www.w3.org/2005/07/scxml">
+                    <state id="start">
+                        <transition target="end"/>
+                    </state>
+                    <final id="end"/>
+                </scxml>
+            </content>
+        </invoke>
+        <transition event="done.invoke.test_invoke" target="end"/>
+    </state>
+</scxml>
diff --git a/test/src/test-c-machine.cpp b/test/src/test-c-machine.cpp
index d069cfe..9ee3f1f 100644
--- a/test/src/test-c-machine.cpp
+++ b/test/src/test-c-machine.cpp
@@ -591,8 +591,8 @@ public:
 			if (feInfo->currIteration < feInfo->iterations) {
 				USER_DATA(ctx)->dataModel.setForeach((foreach->item != NULL ? foreach->item : ""),
 				                                     (foreach->array != NULL ? foreach->array : ""),
-				                                     (foreach->index != NULL ? foreach->index : ""),
-				                                     feInfo->currIteration);
+					                                     (foreach->index != NULL ? foreach->index : ""),
+						                                     feInfo->currIteration);
 				feInfo->currIteration++;
 				return USCXML_ERR_OK;
 			}