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author | juehv <jens@jensheuschkel.de> | 2016-03-07 16:26:35 (GMT) |
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committer | juehv <jens@jensheuschkel.de> | 2016-03-07 16:26:35 (GMT) |
commit | 3c783ec10666f71a66f564fcec1339534dbcbe42 (patch) | |
tree | 786e49cf9e85e81efc15b983becd262c6fbc467f /src/uscxml/transform/ChartToVHDL.cpp | |
parent | 941a83052e670e56a50c2f6d7e5e5fc8bab02fa1 (diff) | |
download | uscxml-3c783ec10666f71a66f564fcec1339534dbcbe42.zip uscxml-3c783ec10666f71a66f564fcec1339534dbcbe42.tar.gz uscxml-3c783ec10666f71a66f564fcec1339534dbcbe42.tar.bz2 |
fix interface lines
Diffstat (limited to 'src/uscxml/transform/ChartToVHDL.cpp')
-rw-r--r-- | src/uscxml/transform/ChartToVHDL.cpp | 43 |
1 files changed, 22 insertions, 21 deletions
diff --git a/src/uscxml/transform/ChartToVHDL.cpp b/src/uscxml/transform/ChartToVHDL.cpp index 190abc5..f4d2e7f 100644 --- a/src/uscxml/transform/ChartToVHDL.cpp +++ b/src/uscxml/transform/ChartToVHDL.cpp @@ -288,28 +288,29 @@ namespace uscxml { stream << " clk :in std_logic;" << std::endl; stream << " rst_i :in std_logic;" << std::endl; stream << " en :in std_logic;" << std::endl; - stream << " --outputs" << std::endl; - stream << " event_o :out event_type;" << std::endl; - stream << " event_we_o :out std_logic;" << std::endl; for (size_t i = 0; i < _states.size(); i++) { Element<std::string> state(_states[i]); - stream << " state_active_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl; + stream << " state_active_" << ATTR(state, "documentOrder") + << "_i :in std_logic;" << std::endl; //TODO if has ex content - stream << " entry_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl; + stream << " entry_set_" << ATTR(state, "documentOrder") + << "_i :in std_logic;" << std::endl; //TODO if has ex content - stream << " exit_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl; + stream << " exit_set_" << ATTR(state, "documentOrder") + << "_i :in std_logic;" << std::endl; } - + for (size_t i = 0; i < _transitions.size(); i++) { Element<std::string> transition(_transitions[i]); //TODO if has ex content - stream << " transition_set_" << ATTR(transition, "postFixOrder") << "_o : std_logic;" - << std::endl; + stream << " transition_set_" << ATTR(transition, "postFixOrder") + << "_i :in std_logic;" << std::endl; } - //TODO write interface lines (exit, entry, transition) for SUPPORTED executable content - + stream << " --outputs" << std::endl; + stream << " event_o :out event_type;" << std::endl; + stream << " event_we_o :out std_logic;" << std::endl; stream << " done_o :out std_logic" << std::endl; stream << ");" << std::endl; stream << "end event_controller; " << std::endl; @@ -352,7 +353,7 @@ namespace uscxml { for (int i = 0; i < _execContent.size(); i++) { Element<std::string> exContentTag(_execContent[i]); stream << seperator << "if start_" << toStr(i) << "_sig = '1' then" << std::endl; - stream << " event_bus <= hwe_"<< ATTR(exContentTag, "event") <<";" << std::endl; + stream << " event_bus <= hwe_" << ATTR(exContentTag, "event") << ";" << std::endl; stream << " done_" << toStr(i) << "_sig <= '1';" << std::endl; seperator = " els"; } @@ -388,11 +389,11 @@ namespace uscxml { //TODO if has ex content stream << " exit_set_" << ATTR(state, "documentOrder") << "_o :out std_logic;" << std::endl; } - + for (size_t i = 0; i < _transitions.size(); i++) { Element<std::string> transition(_transitions[i]); //TODO if has ex content - stream << " transition_set_" << ATTR(transition, "postFixOrder") << "_o : std_logic;" + stream << " transition_set_" << ATTR(transition, "postFixOrder") << "_o :out std_logic;" << std::endl; } @@ -1046,27 +1047,27 @@ namespace uscxml { stream << "-- interface signals" << std::endl; for (size_t i = 0; i < _states.size(); i++) { Element<std::string> state(_states[i]); - stream << " state_active_" << ATTR(state, "documentOrder") + stream << "state_active_" << ATTR(state, "documentOrder") << "_o <= state_active_" << ATTR(state, "documentOrder") << "_sig;" << std::endl; // TODO if has ex content - stream << " entry_set_" << ATTR(state, "documentOrder") + stream << "entry_set_" << ATTR(state, "documentOrder") << "_o <= in_exit_set_" << ATTR(state, "documentOrder") << "_sig;" << std::endl; // TODO if has ex content - stream << " exit_set_" << ATTR(state, "documentOrder") + stream << "exit_set_" << ATTR(state, "documentOrder") << "_o <= in_entry_set_" << ATTR(state, "documentOrder") << "_sig;" << std::endl; } - + for (size_t i = 0; i < _transitions.size(); i++) { Element<std::string> transition(_transitions[i]); //TODO if has ex content - stream << " transition_set_" << ATTR(transition, "postFixOrder") - << "_o <= in_optimal_transition_set" << ATTR(transition, "postFixOrder") //TODO I think optimal transition set is wrong ... ? + stream << "transition_set_" << ATTR(transition, "postFixOrder") + << "_o <= in_optimal_transition_set_" << ATTR(transition, "postFixOrder") //TODO I think optimal transition set is wrong ... ? << "_sig;" << std::endl; } - + stream << "completed_o <= completed_sig; " << std::endl; stream << "error_o <= reg_error_out; " << std::endl; stream << std::endl; |