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authoralbert-github <albert.tests@gmail.com>2018-03-29 12:37:52 (GMT)
committeralbert-github <albert.tests@gmail.com>2018-03-29 12:37:52 (GMT)
commit36afe5e25c10dfd5a6208df7c8892eb2bb7498c5 (patch)
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Better HTML output for VHDL Ports
Small alignment improvement of HTML output for VHDL Ports so that the mode will be in a separate column
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