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authorDimitri van Heesch <doxygen@gmail.com>2020-10-12 18:13:32 (GMT)
committerDimitri van Heesch <doxygen@gmail.com>2020-10-12 18:13:32 (GMT)
commit86904d5b9752d35ff83bab14969314913f945d5b (patch)
treea205b9d8b40af012479b532e708766ec57e37a1f /src/vhdldocgen.cpp
parentc23cedcb1ff27094ea661776b783942d485669ef (diff)
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Refactoring: Modernize BaseClassList
Diffstat (limited to 'src/vhdldocgen.cpp')
-rw-r--r--src/vhdldocgen.cpp96
1 files changed, 42 insertions, 54 deletions
diff --git a/src/vhdldocgen.cpp b/src/vhdldocgen.cpp
index 12cab2d..ddb22f6 100644
--- a/src/vhdldocgen.cpp
+++ b/src/vhdldocgen.cpp
@@ -234,22 +234,16 @@ void VhdlDocGen::writeOverview()
writeVhdlEntityToolTip(t,cd);
delete port;
- BaseClassList *bl=cd->baseClasses();
- if (bl)
- {
- BaseClassListIterator bcli(*bl);
- BaseClassDef *bcd;
- for ( ; (bcd=bcli.current()) ; ++bcli )
- {
- ClassDef *bClass=bcd->classDef;
- QCString dotn=cd->name()+":";
- dotn+=cd->name();
- QCString csc=bClass->name()+":";
- csc+=bClass->name();
- // fprintf(stderr,"\n <%s| %s>",dotn.data(),csc.data());
- writeVhdlDotLink(t,dotn,csc,0);
- }
- }// if bl
+ for (const auto &bcd : cd->baseClasses())
+ {
+ ClassDef *bClass=bcd.classDef;
+ QCString dotn=cd->name()+":";
+ dotn+=cd->name();
+ QCString csc=bClass->name()+":";
+ csc+=bClass->name();
+ // fprintf(stderr,"\n <%s| %s>",dotn.data(),csc.data());
+ writeVhdlDotLink(t,dotn,csc,0);
+ }
}// for
endDot(t);
@@ -2846,24 +2840,20 @@ bool VhdlDocGen::isSubClass(ClassDef* cd,ClassDef *scd, bool followInstances,int
return FALSE;
}
- if (cd->subClasses())
+ for (const auto &bcd :cd->subClasses())
{
- BaseClassListIterator bcli(*cd->subClasses());
- for ( ; bcli.current() && !found ; ++bcli)
+ const ClassDef *ccd=bcd.classDef;
+ if (!followInstances && ccd->templateMaster()) ccd=ccd->templateMaster();
+ //printf("isSubClass() subclass %s\n",ccd->name().data());
+ if (ccd==scd)
{
- const ClassDef *ccd=bcli.current()->classDef;
- if (!followInstances && ccd->templateMaster()) ccd=ccd->templateMaster();
- //printf("isSubClass() subclass %s\n",ccd->name().data());
- if (ccd==scd)
- {
- found=TRUE;
- }
- else
+ found=TRUE;
+ }
+ else
+ {
+ if (level <256)
{
- if (level <256)
- {
- found=ccd->isBaseClass(scd,followInstances,level+1);
- }
+ found=ccd->isBaseClass(scd,followInstances,level+1);
}
}
}
@@ -2872,35 +2862,33 @@ bool VhdlDocGen::isSubClass(ClassDef* cd,ClassDef *scd, bool followInstances,int
void VhdlDocGen::addBaseClass(ClassDef* cd,ClassDef *ent)
{
- if (cd->baseClasses())
+ BaseClassList bcl = cd->baseClasses();
+ for (auto &bcd : bcl)
{
- BaseClassListIterator bcli(*cd->baseClasses());
- for ( ; bcli.current() ; ++bcli)
+ ClassDef *ccd = bcd.classDef;
+ if (ccd==ent)
{
- ClassDef *ccd=bcli.current()->classDef;
- if (ccd==ent)
+ QCString n = bcd.usedName;
+ int i = n.find('(');
+ if(i<0)
{
- QCString n = bcli.current()->usedName;
- int i = n.find('(');
- if(i<0)
- {
- bcli.current()->usedName.append("(2)");
- return;
- }
- static QRegExp reg("[0-9]+");
- QCString s=n.left(i);
- QCString r=n.right(n.length()-i);
- QCString t=r;
- VhdlDocGen::deleteAllChars(r,')');
- VhdlDocGen::deleteAllChars(r,'(');
- r.setNum(r.toInt()+1);
- t.replace(reg,r.data());
- s.append(t.data());
- bcli.current()->usedName=s;
- bcli.current()->templSpecifiers=t;
+ bcd.usedName.append("(2)");
+ return;
}
+ static QRegExp reg("[0-9]+");
+ QCString s=n.left(i);
+ QCString r=n.right(n.length()-i);
+ QCString t=r;
+ VhdlDocGen::deleteAllChars(r,')');
+ VhdlDocGen::deleteAllChars(r,'(');
+ r.setNum(r.toInt()+1);
+ t.replace(reg,r.data());
+ s.append(t.data());
+ bcd.usedName=s;
+ bcd.templSpecifiers=t;
}
}
+ cd->updateBaseClasses(bcl);
}