diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/Makefile.in | 3 | ||||
-rw-r--r-- | src/context.cpp | 1 | ||||
-rw-r--r-- | src/docparser.cpp | 2 | ||||
-rw-r--r-- | src/doxygen.cpp | 9 | ||||
-rw-r--r-- | src/htmldocvisitor.cpp | 25 | ||||
-rw-r--r-- | src/index.cpp | 4 | ||||
-rw-r--r-- | src/libdoxygen.pro.in | 1 | ||||
-rw-r--r-- | src/libdoxygen.t.in | 9 | ||||
-rw-r--r-- | src/outputlist.cpp | 2 | ||||
-rw-r--r-- | src/vhdldocgen.cpp | 3513 | ||||
-rw-r--r-- | src/vhdldocgen.h | 298 | ||||
-rw-r--r-- | src/vhdlparser.y | 2641 | ||||
-rw-r--r-- | src/vhdlscanner.h | 77 | ||||
-rw-r--r-- | src/vhdlscanner.l | 2643 |
14 files changed, 2787 insertions, 6441 deletions
diff --git a/src/Makefile.in b/src/Makefile.in index 875cf1d..ffe7c16 100644 --- a/src/Makefile.in +++ b/src/Makefile.in @@ -48,7 +48,6 @@ distclean: clean ce_parse.cpp ce_parse.h tag.cpp commentscan.cpp \ declinfo.cpp defargs.cpp commentcnv.cpp doctokenizer.cpp \ pycode.cpp pyscanner.cpp fortrancode.cpp fortranscanner.cpp \ - vhdlscanner.cpp vhdlcode.cpp tclscanner.cpp vhdlparser.h \ - vhdlparser.cpp + vhdlscanner.cpp vhdlcode.cpp tclscanner.cpp FORCE: diff --git a/src/context.cpp b/src/context.cpp index 2d46c86..850f8e8 100644 --- a/src/context.cpp +++ b/src/context.cpp @@ -23,6 +23,7 @@ #include "membername.h" #include "parserintf.h" #include "portable.h" +#include "arguments.h" // TODO: pass the current file to Dot*::writeGraph, so the user can put dot graphs in other // files as well diff --git a/src/docparser.cpp b/src/docparser.cpp index e5e2895..66a890f 100644 --- a/src/docparser.cpp +++ b/src/docparser.cpp @@ -2904,8 +2904,6 @@ void DocVhdlFlow::parse() DBG(("DocVhdlFlow::parse() end\n")); DocNode *n=g_nodeStack.pop(); ASSERT(n==this); - - VhdlDocGen::createFlowChart(g_memberDef); } diff --git a/src/doxygen.cpp b/src/doxygen.cpp index 26eda84..8aba232 100644 --- a/src/doxygen.cpp +++ b/src/doxygen.cpp @@ -11049,7 +11049,7 @@ void parseInput() flushUnresolvedRelations(); if (Config_getBool("OPTIMIZE_OUTPUT_VHDL")) { - VhdlDocGen::computeVhdlComponentRelations(); + VhdlDocGen::computeVhdlComponentRelations(); } computeClassRelations(); g_classEntries.clear(); @@ -11192,13 +11192,6 @@ void parseInput() g_s.begin("Adding members to index pages...\n"); addMembersToIndex(); g_s.end(); - - if (Config_getBool("OPTIMIZE_OUTPUT_VHDL") && - Config_getBool("HAVE_DOT") && - Config_getEnum("DOT_IMAGE_FORMAT")=="svg") - { - VhdlDocGen::writeOverview(); - } } void generateOutput() diff --git a/src/htmldocvisitor.cpp b/src/htmldocvisitor.cpp index c70f2c5..261f739 100644 --- a/src/htmldocvisitor.cpp +++ b/src/htmldocvisitor.cpp @@ -1773,35 +1773,14 @@ void HtmlDocVisitor::visitPost(DocHtmlBlockQuote *b) forceStartParagraph(b); } -void HtmlDocVisitor::visitPre(DocVhdlFlow *vf) +void HtmlDocVisitor::visitPre(DocVhdlFlow *) { if (m_hide) return; - if (VhdlDocGen::getFlowMember()) // use VHDL flow chart creator - { - forceEndParagraph(vf); - QCString fname=FlowChart::convertNameToFileName(); - m_t << "<p>"; - m_t << "flowchart: " ; // TODO: translate me - m_t << "<a href=\""; - m_t << fname.data(); - m_t << ".svg\">"; - m_t << VhdlDocGen::getFlowMember()->name().data(); - m_t << "</a>"; - if (vf->hasCaption()) - { - m_t << "<br />"; - } - } } -void HtmlDocVisitor::visitPost(DocVhdlFlow *vf) +void HtmlDocVisitor::visitPost(DocVhdlFlow *) { if (m_hide) return; - if (VhdlDocGen::getFlowMember()) // use VHDL flow chart creator - { - m_t << "</p>"; - forceStartParagraph(vf); - } } void HtmlDocVisitor::visitPre(DocParBlock *) diff --git a/src/index.cpp b/src/index.cpp index 2013a7c..4f83c6a 100644 --- a/src/index.cpp +++ b/src/index.cpp @@ -2053,10 +2053,6 @@ static void writeAnnotatedIndex(OutputList &ol) QCString title = lne ? lne->title() : theTranslator->trCompoundList(); bool addToIndex = lne==0 || lne->visible(); - if (Config_getBool("OPTIMIZE_OUTPUT_VHDL")) - { - VhdlDocGen::findConstraintFile(lne); - } startFile(ol,"annotated",0,title,HLI_Annotated); diff --git a/src/libdoxygen.pro.in b/src/libdoxygen.pro.in index 457db58..e33b643 100644 --- a/src/libdoxygen.pro.in +++ b/src/libdoxygen.pro.in @@ -201,7 +201,6 @@ SOURCES = arguments.cpp \ ../generated_src/doxygen/ce_parse.cpp \ ../generated_src/doxygen/constexp.cpp \ ../generated_src/doxygen/vhdlcode.cpp \ - ../generated_src/doxygen/vhdlparser.cpp \ ../generated_src/doxygen/vhdlscanner.cpp \ ../generated_src/doxygen/code.cpp \ ../generated_src/doxygen/commentcnv.cpp \ diff --git a/src/libdoxygen.t.in b/src/libdoxygen.t.in index 173f90b..6edd8b7 100644 --- a/src/libdoxygen.t.in +++ b/src/libdoxygen.t.in @@ -111,16 +111,9 @@ sub GenerateLex { $(YACC) -l -d -p ce_parsexpYY constexp.y -o \$(GENERATED_SRC)/ce_parse.c -rm $(GENERATED_SRC)/ce_parse.c -#$ GenerateDep("\$(GENERATED_SRC)/vhdlscanner.cpp","vhdlscanner.l","\$(GENERATED_SRC)/vhdlparser.h"); +#$ GenerateDep("\$(GENERATED_SRC)/vhdlscanner.cpp","vhdlscanner.l"); #$ GenerateLex("vhdlscanner",1); -#$ GenerateDep("\$(GENERATED_SRC)/vhdlparser.cpp","vhdlparser.y"); - $(YACC) -l -p vhdlscannerYY vhdlparser.y -o \$(GENERATED_SRC)/vhdlparser.cpp - -#$ GenerateDep("\$(GENERATED_SRC)/vhdlparser.h","vhdlparser.y"); - $(YACC) -l -d -p vhdlscannerYY vhdlparser.y -o \$(GENERATED_SRC)/vhdlparser.c - -rm $(GENERATED_SRC)/vhdlparser.c - TO_C_CMD=$(PYTHON) to_c_cmd.py < $< > $@ #$ GenerateDep("layout.cpp","\$(GENERATED_SRC)/layout_default.xml.h"); diff --git a/src/outputlist.cpp b/src/outputlist.cpp index 59c3efb..bfd0e40 100644 --- a/src/outputlist.cpp +++ b/src/outputlist.cpp @@ -169,8 +169,6 @@ void OutputList::writeDoc(DocRoot *root,Definition *ctx,MemberDef *md) // ctx?ctx->getDefFileExtension().data():"<null>"); if (og->isEnabled()) og->writeDoc(root,ctx,md); } - - VhdlDocGen::setFlowMember(0); } bool OutputList::parseText(const QCString &textStr) diff --git a/src/vhdldocgen.cpp b/src/vhdldocgen.cpp index 4ff5f9d..8eb4c5e 100644 --- a/src/vhdldocgen.cpp +++ b/src/vhdldocgen.cpp @@ -15,7 +15,7 @@ /****************************************************************************** * Parser for VHDL subset * written by M. Kreis - * supports VHDL-87/93/2008 + * supports VHDL-87 * does not support VHDL-AMS ******************************************************************************/ @@ -28,10 +28,6 @@ #include <qfileinfo.h> #include <qstringlist.h> -#ifdef DEBUGFLOW -#include <qmap.h> -#endif - /* --------------------------------------------------------------- */ // local includes @@ -47,511 +43,56 @@ #include "searchindex.h" #include "outputlist.h" #include "parserintf.h" -#include "vhdlscanner.h" -#include "layout.h" +#include "classlist.h" +#include "entry.h" #include "arguments.h" -#include "portable.h" -#include "memberlist.h" -#include "memberdef.h" #include "groupdef.h" -#include "classlist.h" #include "namespacedef.h" -#include "filename.h" -#include "membergroup.h" +/* --------------------------------------------------------------- */ +//#define theTranslator_vhdlType theTranslator->trVhdlType #define theTranslator_vhdlType VhdlDocGen::trVhdlType static QDict<QCString> g_vhdlKeyDict0(17,FALSE); static QDict<QCString> g_vhdlKeyDict1(17,FALSE); static QDict<QCString> g_vhdlKeyDict2(17,FALSE); -static QDict<QCString> g_xilinxUcfDict(17,FALSE); - -static void initUCF(Entry* root,const char* type,QCString & qcs,int line,QCString & fileName,QCString & brief); -static void writeUCFLink(const MemberDef* mdef,OutputList &ol); -static void assignBinding(VhdlConfNode* conf); -static void addInstance(ClassDef* entity, ClassDef* arch, ClassDef *inst,Entry *cur,ClassDef* archBind=NULL); - -//---------- create svg ------------------------------------------------------------- -static void createSVG(); -static void startDot(FTextStream &t); -static void startTable(FTextStream &t,const QCString &className); -static QList<MemberDef>* getPorts(ClassDef *cd); -static void writeVhdlEntityToolTip(FTextStream& t,ClassDef *cd); -static void endDot(FTextStream &t); -static void writeTable(QList<MemberDef>* port,FTextStream & t); -static void endTabel(FTextStream &t); -static void writeClassToDot(FTextStream &t,ClassDef* cd); -static void writeVhdlDotLink(FTextStream &t,const QCString &a,const QCString &b,const QCString &style); -//static void writeVhdlPortToolTip(FTextStream& t,QList<MemberDef>* port,ClassDef *cd); -static const MemberDef *flowMember=0; - -void VhdlDocGen::setFlowMember( const MemberDef* mem) -{ - flowMember=mem; -} - -const MemberDef* VhdlDocGen::getFlowMember() -{ - return flowMember; -} - - - -//-------------------------------------------------------------------------------------------------- -static void codify(FTextStream &t,const char *str) -{ - if (str) - { - const char *p=str; - char c; - while (*p) - { - c=*p++; - switch(c) - { - case '<': t << "<"; - break; - case '>': t << ">"; - break; - case '&': t << "&"; - break; - case '\'': t << "'"; - break; - case '"': t << """; - break; - default: t << c; - break; - } - } - } -} - -static void writeLink(const MemberDef* mdef,OutputList &ol) -{ - ol.writeObjectLink(mdef->getReference(), - mdef->getOutputFileBase(), - mdef->anchor(), - mdef->name()); -} - -static void startFonts(const QCString& q, const char *keyword,OutputList& ol) -{ - ol.startFontClass(keyword); - ol.docify(q.data()); - ol.endFontClass(); -} - -static QCString splitString(QCString& str,char c) -{ - QCString n=str; - int i=str.find(c); - if (i>0) - { - n=str.left(i); - str=str.remove(0,i+1); - } - return n; -} - -static int compareString(const QCString& s1,const QCString& s2) -{ - return qstricmp(s1.stripWhiteSpace(),s2.stripWhiteSpace()); -} - -static void createSVG() -{ - QCString ov =Config_getString("HTML_OUTPUT"); - QCString dir="-o \""+ov+"/vhdl_design_overview.html\""; - ov+="/vhdl_design.dot"; - - QRegExp ep("[\\s]"); - QCString vlargs="-Tsvg \""+ov+"\" "+dir ; - - QCString dotExe = Config_getString("DOT_PATH")+"dot"; - if (portable_system(dotExe,vlargs)!=0) - { - err("could not create dot file"); - } -} -// Creates a svg image. All in/out/inout ports are shown with brief description and direction. -// Brief descriptions for entities are shown too. -void VhdlDocGen::writeOverview() -{ - ClassSDict::Iterator cli(*Doxygen::classSDict); - ClassDef *cd; - bool found=FALSE; - for ( ; (cd=cli.current()) ; ++cli ) - { - if ((VhdlDocGen::VhdlClasses)cd->protection()==VhdlDocGen::ENTITYCLASS ) - { - found=TRUE; - break; - } - } - - if (!found) return; - - QCString ov =Config_getString("HTML_OUTPUT"); - QCString fileName=ov+"/vhdl_design.dot"; - QFile f(fileName); - QStringList qli; - FTextStream t(&f); - - if (!f.open(IO_WriteOnly)) - { - fprintf(stderr,"Warning: Cannot open file %s for writing\n",fileName.data()); - return; - } - - startDot(t); - - for (cli.toFirst() ; (cd=cli.current()) ; ++cli ) - { - if ((VhdlDocGen::VhdlClasses)cd->protection()!=VhdlDocGen::ENTITYCLASS ) - { - continue; - } - - QList<MemberDef>* port= getPorts(cd); - if (port==0) - { - continue; - } - if (port->count()==0) - { - delete port; - port=NULL; - continue; - } - - startTable(t,cd->name()); - writeClassToDot(t,cd); - writeTable(port,t); - endTabel(t); - - // writeVhdlPortToolTip(t,port,cd); - writeVhdlEntityToolTip(t,cd); - delete port; - - BaseClassList *bl=cd->baseClasses(); - if (bl) - { - BaseClassListIterator bcli(*bl); - BaseClassDef *bcd; - for ( ; (bcd=bcli.current()) ; ++bcli ) - { - ClassDef *bClass=bcd->classDef; - QCString dotn=cd->name()+":"; - dotn+=cd->name(); - QCString csc=bClass->name()+":"; - csc+=bClass->name(); - // fprintf(stderr,"\n <%s| %s>",dotn.data(),csc.data()); - writeVhdlDotLink(t,dotn,csc,0); - } - }// if bl - }// for - - endDot(t); - // writePortLinks(t); - f.close(); - createSVG(); -} - -//------------------------------------------------------------------------------------------------------------------------------------------------------ - -static void startDot(FTextStream &t) -{ - t << " digraph G { \n"; - t << "rankdir=LR \n"; - t << "concentrate=TRUE\n"; - t << "stylesheet=\"doxygen.css\"\n"; -} - -static void endDot(FTextStream &t) -{ - t <<" } \n"; -} - -static void startTable(FTextStream &t,const QCString &className) -{ - t << className <<" [ shape=none , fontname=\"arial\", fontcolor=\"blue\" , \n"; - t << "label=<<TABLE BORDER=\"0\" CELLBORDER=\"1\" CELLSPACING=\"0\">\n"; -} - -static void writeVhdlDotLink(FTextStream &t, - const QCString &a,const QCString &b,const QCString &style) -{ - t << a << "->" << b; - if (!style.isEmpty()) - { - t << "[style=" << style << "];\n"; - } - t << "\n"; -} - - -static QCString formatBriefNote(const QCString &brief,ClassDef * cd) -{ - QRegExp ep("[\n]"); - QCString vForm; - QCString repl("<BR ALIGN=\"LEFT\"/>"); - QCString file=cd->getDefFileName(); - - int k=cd->briefLine(); - - QStringList qsl=QStringList::split(ep,brief); - for(uint j=0;j<qsl.count();j++) - { - QCString qcs=qsl[j].data(); - vForm+=parseCommentAsText(cd,NULL,qcs,file,k); - k++; - vForm+='\n'; - } - - vForm.replace(ep,repl.data()); - return vForm; -} - -#if 0 -static void writeVhdlPortToolTip(FTextStream& t,QList<MemberDef>* port,ClassDef *cd) -{ -/* - uint len=port->count(); - MemberDef *md; - - for (uint j=0;j<len;j++) - { - md=(MemberDef*)port->at(j); - QCString brief=md->briefDescriptionAsTooltip(); - if (brief.isEmpty()) continue; - - QCString node="node"; - node+=VhdlDocGen::getRecordNumber(); - t << node <<"[shape=box margin=0.1, label=<\n"; - t<<"<TABLE BORDER=\"0\" CELLBORDER=\"1\" CELLSPACING=\"0\" CELLPADDING=\"2\" >\n "; - t<<"<TR><TD BGCOLOR=\"lightcyan\"> "; - t<<brief; - t<<" </TD></TR></TABLE>>];"; - QCString dotn=cd->name()+":"; - dotn+=md->name(); - // writeVhdlDotLink(t,dotn,node,"dotted"); - } -*/ -} -#endif - -static void writeVhdlEntityToolTip(FTextStream& t,ClassDef *cd) -{ - - QCString brief=cd->briefDescription(); - - if (brief.isEmpty()) return; - - brief=formatBriefNote(brief,cd); - - QCString node="node"; - node+=VhdlDocGen::getRecordNumber(); - t << node <<"[shape=none margin=0.1, label=<\n"; - t << "<TABLE BORDER=\"0\" CELLBORDER=\"1\" CELLSPACING=\"0\" CELLPADDING=\"2\" >\n "; - t << "<TR><TD BGCOLOR=\"lightcyan\"> "; - t << brief; - t << " </TD></TR></TABLE>>];"; - QCString dotn=cd->name()+":"; - dotn+=cd->name(); - writeVhdlDotLink(t,dotn,node,"dotted"); -} - -static void writeColumn(FTextStream &t,MemberDef *md,bool start) -{ - QCString toolTip; - - static QRegExp reg("[%]"); - bool bidir=(md!=0 &&( qstricmp(md->typeString(),"inout")==0)); - - if (md) - { - toolTip=md->briefDescriptionAsTooltip(); - if (!toolTip.isEmpty()) - { - QCString largs = md->argsString(); - if (!largs.isEmpty()) - largs=largs.replace(reg," "); - toolTip+=" ["; - toolTip+=largs; - toolTip+="]"; - } - } - if (start) - { - t <<"<TR>\n"; - } - - t << "<TD ALIGN=\"LEFT\" "; - if (md) - { - t << "href=\""; - t << md->getOutputFileBase()<< Doxygen::htmlFileExtension; - t << "#" << md->anchor(); - t<<"\" "; - - t<<" TOOLTIP=\""; - if(!toolTip.isEmpty()) - codify(t,toolTip.data()); - else{ - QCString largs = md->argsString(); - if(!largs.isEmpty()){ - largs=largs.replace(reg," "); - codify(t,largs.data()); - } - } - t << "\" "; - - t << " PORT=\""; - t << md->name(); - t << "\" "; - } - if (!toolTip.isEmpty()) - { - // if (!toolTip.isEmpty()) - - if (bidir) - t << "BGCOLOR=\"orange\">"; - else - t << "BGCOLOR=\"azure\">"; - } - else if (bidir) - { - t << "BGCOLOR=\"pink\">"; - } - else - { - t << "BGCOLOR=\"lightgrey\">"; - } - if (md) - { - t << md->name(); - } - else - { - t << " \n"; - } - t << "</TD>\n"; - - if (!start) - { - t << "</TR>\n"; - } -} - -static void endTabel(FTextStream &t) -{ - t << "</TABLE>>\n"; - t << "] \n"; -} - -static void writeClassToDot(FTextStream &t,ClassDef* cd) -{ - t << "<TR><TD COLSPAN=\"2\" BGCOLOR=\"yellow\" "; - t << "PORT=\""; - t << cd->name(); - t << "\" "; - t << "href=\""; - t << cd->getOutputFileBase() << Doxygen::htmlFileExtension; - t << "\" "; - t << ">"; - t << cd->name(); - t << " </TD></TR>\n"; -} +// keywords +static const char* g_vhdlKeyWordMap0[] = +{ + "std","ieee","work","standard","textio","std_logic_1164", + "std_logic_arith","std_logic_misc","std_logic_signed","std_logic_textio", + "std_logic_unsigned","numeric_bit","numeric_std","math_complex","math_real", + "vital_primitives","vital_timing","severity_level","time","delay_length", + "natural", "positive", "bit_vector","file_open_kind","file_open_status", + "line","text","side", "width","event","rising_edge", "falling_edge", + "access","after","alias", "all","architecture","array", "assert","attribute", + "begin","block","body", "buffer", "bus", "case", "component", "configuration", + "constant", "disconnect", "downto", "else", "elsif", "end", "entity", "exit", + "file", "for", "function", "generate", "generic", "group", "guarded", "if", + "impure", "in", "inertial", "inout", "is","label", "library", "linkage", + "literal", "loop","map", "new", "next", "null", "of", "on", "open", "others", + "out", "package", "port", "postponed", "procedure", "process", "pure", + "range", "record", "register", "reject", "report", "return","select", + "severity", "shared", "signal", "subtype", "then", "to", "transport", + "type","unaffected", "units", "until", "use","variable", "wait", "when", + "while", "with","true","false","protected",0 +}; -static QList<MemberDef>* getPorts(ClassDef *cd) +// type +static const char* g_vhdlKeyWordMap1[] = { - MemberDef* md; - QList<MemberDef> *portList=new QList<MemberDef>; - MemberList *ml=cd->getMemberList(MemberListType_variableMembers); - - if (ml==0) return NULL; - - MemberListIterator fmni(*ml); - - for (fmni.toFirst();(md=fmni.current());++fmni) - { - if (md->getMemberSpecifiers()==VhdlDocGen::PORT) - { - portList->append(md); - } - } - - return portList; -} - -//writeColumn(FTextStream &t,QCString name,bool start) + "natural","unsigned","signed","string","boolean", "bit","character", + "std_ulogic","std_ulogic_vector","sTd_logic","std_logic_vector","integer", + "real","zzz",0 +}; -static void writeTable(QList<MemberDef>* port,FTextStream & t) +// logic +static const char* g_vhdlKeyWordMap2[] = { - QCString space(" "); - MemberDef *md; - uint len=port->count(); - - QList<MemberDef> inPorts; - QList<MemberDef> outPorts; - - uint j; - for (j=0;j<len;j++) - { - md=(MemberDef*)port->at(j); - QCString qc=md->typeString(); - if(qc=="in") - { - inPorts.append(md); - } - else - { - outPorts.append(md); - } - } - - int inp = inPorts.count(); - int outp = outPorts.count(); - int maxLen; - - if (inp>=outp) - { - maxLen=inp; - } - else - { - maxLen=outp; - } - - int i; - for(i=0;i<maxLen;i++) - { - //write inports - if (i<inp) - { - md=(MemberDef*)inPorts.at(i); - writeColumn(t,md,TRUE); - } - else - { - writeColumn(t,NULL,TRUE); - } - - if (i<outp) - { - md=(MemberDef*)outPorts.at(i); - writeColumn(t,md,FALSE); - } - else - { - writeColumn(t,NULL,FALSE); - } - } -} - -//-------------------------------------------------------------------------------------------------- - + "abs","and","or","not","mod", "xor","rem","xnor","ror","rol","sla", + "sll",0 +}; VhdlDocGen::VhdlDocGen() { @@ -563,48 +104,6 @@ VhdlDocGen::~VhdlDocGen() void VhdlDocGen::init() { - - // vhdl keywords inlcuded VHDL 2008 -const char* g_vhdlKeyWordMap0[] = -{ - "abs","access","after","alias","all","and","architecture","array","assert","assume","assume_guarantee","attribute", - "begin","block","body","buffer","bus", - "case","component","configuration","constant","context","cover", - "default","disconnect","downto", - "else","elsif","end","entity","exit", - "fairness","file","for","force","function", - "generate","generic","group","guarded", - "if","impure","in","inertial","inout","is", - "label","library","linkage","literal","loop", - "map","mod", - "nand","new","next","nor","not","null", - "of","on","open","or","others","out", - "package","parameter","port","postponed","procedure","process","property","proctected","pure", - "range","record","register","reject","release","restrict","restrict_guarantee","rem","report","rol","ror","return", - "select","sequence","severity","signal","shared","sla","sll","sra","srl","strong","subtype", - "then","to","transport","type", - "unaffected","units","until","use", - "variable","vmode","vprop","vunit", - "wait","when","while","with", - "xor","xnor", - 0 -}; - -// type -const char* g_vhdlKeyWordMap1[] = -{ - "natural","unsigned","signed","string","boolean", "bit","bit_vector","character", - "std_ulogic","std_ulogic_vector","std_logic","std_logic_vector","integer", - "real","float","ufixed","sfixed","time",0 -}; - -// logic -const char* g_vhdlKeyWordMap2[] = -{ - "abs","and","or","not","mod", "xor","rem","xnor","ror","rol","sla", - "sll",0 -}; - int j=0; g_vhdlKeyDict0.setAutoDelete(TRUE); g_vhdlKeyDict1.setAutoDelete(TRUE); @@ -647,7 +146,8 @@ QCString* VhdlDocGen::findKeyWord(const QCString& word) static QCString g_vhdllogic("vhdllogic"); if (word.isEmpty() || word.at(0)=='\0') return 0; - + //printf("VhdlDocGen::findKeyWord(%s)\n",word.data()); + if (g_vhdlKeyDict0.find(word.lower())) return &g_vhdlkeyword; @@ -672,6 +172,79 @@ ClassDef *VhdlDocGen::getClass(const char *name) return cd; } +/*! + * adds architectures to their entity + */ +void VhdlDocGen::computeVhdlComponentRelations() +{ + printf("VhdlDocGen::computeVhdlComponentRelations()\n"); + ClassSDict::Iterator cli(*Doxygen::classSDict); + ClassDef *cd; + for (cli.toFirst();(cd=cli.current());++cli) + { + printf(" cd=%s\n",cd->name().data()); + if (cd->getLanguage()==SrcLangExt_VHDL && + ((VhdlDocGen::VhdlClasses)cd->protection()==VhdlDocGen::ARCHITECTURECLASS || + (VhdlDocGen::VhdlClasses)cd->protection()==VhdlDocGen::PACKBODYCLASS + ) + ) + { + QCString bName=cd->name(); + int i=bName.find("::"); + if (i>0) + { + QCString entityName=bName.left(i); + entityName.stripPrefix("_"); + ClassDef *classEntity=Doxygen::classSDict->find(entityName); + printf(" entity=%s p=%p\n",entityName.data(),classEntity); + // entity for architecutre ? + if (classEntity) + { + MemberList *ml = cd->getMemberList(MemberListType_pubAttribs); + //printf(" found %d members\n",ml->count()); + if (ml) + { + MemberListIterator mli(*ml); + MemberDef *md; + for (mli.toFirst();(md=mli.current());++mli) + { + int spec=md->getMemberSpecifiers(); + if (spec==VhdlDocGen::COMPONENT) + { + printf(" name %s\n",md->name().data()); + ClassDef *baseEntity=Doxygen::classSDict->find(md->name()); + if (baseEntity) + { + classEntity->insertBaseClass(baseEntity,baseEntity->name(),Public,Normal,0); + baseEntity->insertSubClass(classEntity,Public,Normal,0); + } + } + } + } + } + } + } + } +} // computeVhdlComponentRelations + + +/* + * returns a reference, if one class [package(body),entity or an architecture is found] + */ + +ClassDef* VhdlDocGen::findComponent(int type) +{ + ClassSDict::Iterator cli(*Doxygen::classSDict); + ClassDef *cd=0; + + for ( ; (cd=cli.current()) ; ++cli ) + { + if (cd->protection()==type) + return cd; + } + return cd; +} + ClassDef* VhdlDocGen::getPackageName(const QCString & name) { ClassDef* cd=0; @@ -704,7 +277,7 @@ MemberDef* VhdlDocGen::findMember(const QCString& className, const QCString& mem (VhdlDocGen::VhdlClasses)cd->protection()==VhdlDocGen::PACKBODYCLASS) { Definition *d = cd->getOuterScope(); - // searching upper/lower case names + // searching upper/lower case names QCString tt=d->name(); ClassDef *ecd =getClass(tt); @@ -724,8 +297,8 @@ MemberDef* VhdlDocGen::findMember(const QCString& className, const QCString& mem //ClassDef *ecd = (ClassDef*)d; mdef=VhdlDocGen::findMemberDef(ecd,memName,MemberListType_variableMembers); if (mdef) return mdef; - mdef=VhdlDocGen::findMemberDef(cd,memName,MemberListType_pubMethods); - if (mdef) return mdef; + mdef=VhdlDocGen::findMemberDef(cd,memName,MemberListType_pubMethods); + if (mdef) return mdef; } //cd=getClass(getClassName(cd)); //if (!cd) return 0; @@ -803,10 +376,8 @@ MemberDef* VhdlDocGen::findMemberDef(ClassDef* cd,const QCString& key,MemberList for (fmni.toFirst();(md=fmni.current());++fmni) { - if (qstricmp(key,md->name())==0) - { + if (qstricmp(key.data(),md->name().data())==0) return md; - } } return 0; }//findMemberDef @@ -828,26 +399,26 @@ void VhdlDocGen::findAllPackages(const QCString& className,QDict<QCString>& qdic MemberListIterator fmni(*mem); for (fmni.toFirst();(md=fmni.current());++fmni) { - if (VhdlDocGen::isPackage(md)) - { - QCString *temp1=new QCString(md->name().data()); - //*temp1=temp1->lower(); - QCString p(md->name().data()); - //p=p.lower(); - ClassDef* cd=VhdlDocGen::getPackageName(*temp1); - if (cd) - { - QCString *ss=qdict.find(*temp1); - if (ss==0) - { - qdict.insert(p,temp1); - QCString tmp=cd->className(); - VhdlDocGen::findAllPackages(tmp,qdict); - } - else delete temp1; - } - else delete temp1; - } + if (VhdlDocGen::isPackage(md)) + { + QCString *temp1=new QCString(md->name().data()); + //*temp1=temp1->lower(); + QCString p(md->name().data()); + //p=p.lower(); + ClassDef* cd=VhdlDocGen::getPackageName(*temp1); + if (cd) + { + QCString *ss=qdict.find(*temp1); + if (ss==0) + { + qdict.insert(p,temp1); + QCString tmp=cd->className(); + VhdlDocGen::findAllPackages(tmp,qdict); + } + else delete temp1; + } + else delete temp1; + } }//for }//if }//cdef @@ -859,14 +430,19 @@ void VhdlDocGen::findAllPackages(const QCString& className,QDict<QCString>& qdic */ MemberDef* VhdlDocGen::findFunction(const QList<Argument> &ql, - const QCString& funcname, - const QCString& package, bool /*type*/) + const QCString& funcname, + const QCString& package, bool type) { MemberDef* mdef=0; - //int funcType; + int funcType; ClassDef *cdef=getClass(package.data()); if (cdef==0) return 0; + if (type) + funcType=VhdlDocGen::PROCEDURE; + else + funcType=VhdlDocGen::FUNCTION; + MemberList *mem=cdef->getMemberList(MemberListType_pubMethods); if (mem) @@ -875,47 +451,174 @@ MemberDef* VhdlDocGen::findFunction(const QList<Argument> &ql, for (fmni.toFirst();(mdef=fmni.current());++fmni) { QCString mname=mdef->name(); - if ((VhdlDocGen::isProcedure(mdef) || VhdlDocGen::isVhdlFunction(mdef)) && (compareString(funcname,mname)==0)) + if ((VhdlDocGen::isProcedure(mdef) || VhdlDocGen::isVhdlFunction(mdef)) && (VhdlDocGen::compareString(funcname,mname)==0)) { - ArgumentList *alp = mdef->argumentList(); + ArgumentList *alp = mdef->argumentList(); - // ArgumentList* arg2=mdef->getArgumentList(); - if (alp==0) break; + // ArgumentList* arg2=mdef->getArgumentList(); + if (alp==0) break; ArgumentListIterator ali(*alp); ArgumentListIterator ali1(ql); - if (ali.count() != ali1.count()) break; - - Argument *arg,*arg1; - int equ=0; - - for (;(arg=ali.current());++ali) - { - arg1=ali1.current(); ++ali1; - equ+=abs(compareString(arg->type,arg1->type)); - - QCString s1=arg->type; - QCString s2=arg1->type; - VhdlDocGen::deleteAllChars(s1,' '); - VhdlDocGen::deleteAllChars(s2,' '); - equ+=abs(compareString(s1,s2)); - s1=arg->attrib; - s2=arg1->attrib; - VhdlDocGen::deleteAllChars(s1,' '); - VhdlDocGen::deleteAllChars(s2,' '); - equ+=abs(compareString(s1,s2)); - // printf("\n 1. type [%s] name [%s] attrib [%s]",arg->type,arg->name,arg->attrib); - // printf("\n 2. type [%s] name [%s] attrib [%s]",arg1->type,arg1->name,arg1->attrib); - } // for - if (equ==0) return mdef; + if (ali.count() != ali1.count()) break; + + Argument *arg,*arg1; + int equ=0; + + for (;(arg=ali.current());++ali) + { + arg1=ali1.current(); ++ali1; + equ+=abs(VhdlDocGen::compareString(arg->type,arg1->type)); + + QCString s1=arg->type; + QCString s2=arg1->type; + VhdlDocGen::deleteAllChars(s1,' '); + VhdlDocGen::deleteAllChars(s2,' '); + equ+=abs(VhdlDocGen::compareString(s1,s2)); + s1=arg->attrib; + s2=arg1->attrib; + VhdlDocGen::deleteAllChars(s1,' '); + VhdlDocGen::deleteAllChars(s2,' '); + equ+=abs(VhdlDocGen::compareString(s1,s2)); + // printf("\n 1. type [%s] name [%s] attrib [%s]",arg->type,arg->name,arg->attrib); + // printf("\n 2. type [%s] name [%s] attrib [%s]",arg1->type,arg1->name,arg1->attrib); + } // for + if (equ==0) return mdef; }//if }//for }//if return mdef; } //findFunction +/*! + * returns the function with the matching argument list + * is called in vhdscan.l + */ +Entry* VhdlDocGen::findFunction( Entry* root, Entry* func) +{ + //bool found=FALSE; + Entry *found=0; + uint64 functype=func->spec; + EntryListIterator eli(*root->children()); + Entry *rt; + for (;(rt=eli.current());++eli) + { + if (rt->spec==functype && VhdlDocGen::compareString(rt->name,func->name)==0 && rt!=func ) + { + if (VhdlDocGen::compareArgList(func->argList,rt->argList)) + { + found=rt; + return found; + } + }//if1 + if (!found) + { + found = VhdlDocGen::findFunction(rt,func); + } + } // for + return found; +}// findFunction +/* + * compares two argument list of a fuction|procedure + */ + +bool VhdlDocGen::compareArgList(ArgumentList* l1,ArgumentList* l2) +{ + if (l1== 0 || l2== 0) return FALSE; + + ArgumentListIterator ali(*l1); + ArgumentListIterator ali1(*l2); + + if (ali.count() != ali1.count()) return FALSE; + + Argument *arg,*arg1; + int equ=0; + + for (;(arg=ali.current());++ali) + { + bool found = FALSE; + for (ali1.toFirst();(arg1=ali1.current());++ali1) + { + equ=0; + QCString s1=arg->type; + QCString s2=arg1->type; + VhdlDocGen::deleteAllChars(s1,' '); // remove whitespaces + VhdlDocGen::deleteAllChars(s2,' '); + equ+=abs(VhdlDocGen::compareString(s1,s2)); + s1=arg->attrib; + s2=arg1->attrib; + VhdlDocGen::deleteAllChars(s1,' '); + VhdlDocGen::deleteAllChars(s2,' '); + equ+=abs(VhdlDocGen::compareString(s1,s2)); + if (equ==0) found=TRUE; + } + if (!found) return FALSE; + } + return TRUE; +}// compareArgList + +/* + * finds a matching prototype for a function description + */ + +Entry* VhdlDocGen::findFunction(Entry* func) +{ + ClassSDict::Iterator cli(*Doxygen::classSDict); + ClassDef *cd; + for (;(cd=cli.current());++cli) + { + MemberList *mf = cd->getMemberList (MemberListType_pubMethods); + if (mf) + { + MemberListIterator fmni(*mf); + MemberDef *mdd; + for (fmni.toFirst();(mdd=fmni.current());++fmni) + { + int type=mdd->getMemberSpecifiers(); + if (type==VhdlDocGen::PROCEDURE || type==VhdlDocGen::FUNCTION) + { + QCString nnk=mdd->name(); + QCString ff=func->name; + + if (qstricmp(mdd->name(),ff.data())==0) + { + ArgumentList *l=mdd->argumentList(); + if (VhdlDocGen::compareArgList(l,func->argList)) + { + mdd->setDocumentation(func->doc.data(),func->docFile.data(),func->docLine,TRUE); + mdd->setBriefDescription(func->brief,func->briefFile,func->briefLine); + addMemberToGroups(func,mdd);// do not forget grouping! + return func; + } + } + } + } + }// if + }//for + return 0; +}// findFunction + +/* + * adds the documentation for a function|procedure + */ + +void VhdlDocGen::addFuncDoc(EntryNav* rootNav) +{ + Entry *root = rootNav->entry(); + if (root && root->spec==VhdlDocGen::DOCUMENT) + { + Entry *func=VhdlDocGen::findFunction(root); + if (!func && Config_getBool("WARNINGS")) + { + warn(root->fileName,root->docLine, + "warning: documentation for unknown function %s found.\n", + root->name.data() + ); + } + } +}// AddFuncDoc /*! * returns the class title+ref @@ -947,7 +650,13 @@ QCString VhdlDocGen::getClassName(const ClassDef* cd) temp.stripPrefix("_"); return temp; } - + //if ((VhdlDocGen::VhdlClasses)cd->protection()==VhdlDocGen::ARCHITECTURECLASS) + //{ + // QStringList qlist=QStringList::split("-",cd->className(),FALSE); + // if (qlist.count()>1) + // return (QCString)qlist[1]; + // return ""; + //} return substitute(cd->className(),"::","."); } @@ -964,15 +673,13 @@ void VhdlDocGen::writeInlineClassLink(const ClassDef* cd ,OutputList& ol) QCString type; if (ii==VhdlDocGen::ENTITY) - type+=theTranslator_vhdlType(VhdlDocGen::ARCHITECTURE,TRUE); + type=theTranslator_vhdlType(VhdlDocGen::ARCHITECTURE,TRUE); else if (ii==VhdlDocGen::ARCHITECTURE) - type+=theTranslator_vhdlType(VhdlDocGen::ENTITY,TRUE); + type=theTranslator_vhdlType(VhdlDocGen::ENTITY,TRUE); else if (ii==VhdlDocGen::PACKAGE_BODY) - type+=theTranslator_vhdlType(VhdlDocGen::PACKAGE,TRUE); + type=theTranslator_vhdlType(VhdlDocGen::PACKAGE,TRUE); else if (ii==VhdlDocGen::PACKAGE) - type+=theTranslator_vhdlType(VhdlDocGen::PACKAGE_BODY,TRUE); - else - type+=""; + type=theTranslator_vhdlType(VhdlDocGen::PACKAGE_BODY,TRUE); //type=type.lower(); type+=" >> "; @@ -1005,14 +712,14 @@ void VhdlDocGen::writeInlineClassLink(const ClassDef* cd ,OutputList& ol) { QCString *temp=ql.at(i); QStringList qlist=QStringList::split("-",*temp,FALSE); - QCString s1=qlist[0].utf8(); - QCString s2=qlist[1].utf8(); + QCString s1=(QCString)qlist[0].utf8(); + QCString s2=(QCString)qlist[1].utf8(); s1.stripPrefix("_"); if (j==1) s1.resize(0); ClassDef*cc = getClass(temp->data()); if (cc) { - VhdlDocGen::writeVhdlLink(cc,ol,type,s2,s1); + VhdlDocGen::writeVhdlLink(cc,ol,type,s2,s1); } } } @@ -1039,36 +746,16 @@ void VhdlDocGen::findAllArchitectures(QList<QCString>& qll,const ClassDef *cd) if (cd != citer && jj.contains('-')!=-1) { QStringList ql=QStringList::split("-",jj,FALSE); - QCString temp=ql[1].utf8(); - if (qstricmp(cd->className(),temp)==0) + QCString temp=(QCString)ql[1].utf8(); + if (qstricmp(cd->className().data(),temp.data())==0) { - QCString *cl=new QCString(jj); - qll.insert(0,cl); + QCString *cl=new QCString(jj.data()); + qll.insert(0,cl); } } }// for }//findAllArchitectures -ClassDef* VhdlDocGen::findArchitecture(const ClassDef *cd) -{ - ClassDef *citer; - QCString nn=cd->name(); - ClassSDict::Iterator cli(*Doxygen::classSDict); - - for ( ; (citer=cli.current()) ; ++cli ) - { - QCString jj=citer->name(); - QStringList ql=QStringList::split(":",jj,FALSE); - if (ql.count()>1) - { - if (ql[0].utf8()==nn ) - { - return citer; - } - } - } - return 0; -} /* * writes the link entity >> .... or architecture >> ... */ @@ -1081,7 +768,7 @@ void VhdlDocGen::writeVhdlLink(const ClassDef* ccd ,OutputList& ol,QCString& typ ol.docify(type.data()); ol.endBold(); nn.stripPrefix("_"); - ol.writeObjectLink(ccd->getReference(),ccd->getOutputFileBase(),0,nn.data()); + ol.writeObjectLink(ccd->getReference(),ccd->getOutputFileBase(),ccd->anchor(),nn.data()); if (!behav.isEmpty()) { @@ -1090,24 +777,205 @@ void VhdlDocGen::writeVhdlLink(const ClassDef* ccd ,OutputList& ol,QCString& typ ol.docify(behav.data()); ol.endBold(); } - + /* + if (Config_getBool("SOURCE_BROWSER")) { // writes a source link for latex docu + ol.pushGeneratorState(); + ol.disableAllBut(OutputGenerator::Latex); + ol.docify(" | "); + ol.startEmphasis(); + FileDef* fd=ccd->getFileDef(); + if (fd) + ol.writeObjectLink(0,fd->getSourceFileBase(),0,theTranslator->trGotoSourceCode().data()); + ol.endEmphasis(); + ol.popGeneratorState(); + } + */ ol.lineBreak(); } +bool VhdlDocGen::compareString(const QCString& s1,const QCString& s2) +{ + QCString str1=s1.stripWhiteSpace(); + QCString str2=s2.stripWhiteSpace(); + + return qstricmp(str1.data(),str2.data()); +} + +bool VhdlDocGen::getSigTypeName(QList<QCString>& ql, const char* str,QCString& buffer) +{ + //QCString temp(str); + //QStringList qlist=QStringList::split(" is ",temp,FALSE); + //if (qlist.count()!=2) return FALSE; + //temp.resize(0); + //temp+=(QCString)qlist[0]+":"+(QCString)qlist[1]; + //return VhdlDocGen::getSigName(ql,temp.data(),buffer); + return VhdlDocGen::getSigName(ql,str,buffer); +} + +/*! + * divides a port input in its name,direction and type + * @param ql stores the input name(s) + * @param str input string + * @param buffer stores the input direction + * @returns FALSE if it is a port + */ + +bool VhdlDocGen::getSigName(QList<QCString>& ql, + const char* str,QCString& buffer) +{ + int j,ll,index; + const char *signal = "signal "; + QCString qmem; + QCString temp(str); + QCString st(str); + + //QRegExp semi(","); + //QRegExp r(":"); + + // colon position + j = temp.find(':'); + if (j < 0) return FALSE; // no input definition + st=st.left(j); // name only + index=st.find(signal,0,FALSE); + if (index > -1) // found "signal " + { + qmem=st.remove(index,strlen(signal)); // strip it + temp=qmem; + st=qmem; + } + else + { + qmem=temp; + } + + ll=st.find(','); + + if (ll>0) // multiple names + { + while (TRUE) + { + st=st.left(ll).stripWhiteSpace(); // one name + + QCString *sig =new QCString(st); + ql.insert(0,sig); + qmem=qmem.right(qmem.length()-ll-1); // strip from list + st=qmem; // remainder + ll=st.find(','); + if (ll<0) // last name + { + ll = st.find(':'); + st=st.left(ll).stripWhiteSpace(); + ql.insert(0,new QCString(st)); + break; + } + } + } + else // single name + { + st=st.stripWhiteSpace(); + ql.insert(0,new QCString(st)); + } + QCString *qdir=new QCString(str); + st=qdir->mid(j+1); // part after : + st=st.lower().stripWhiteSpace(); + *qdir=st; + ql.insert(0,qdir); + + if (st.stripPrefix("inout")) + { + buffer+="inout"; + return TRUE; + } + if (st.stripPrefix("INOUT")) + { + buffer+="inout"; + return TRUE; + } + + if (st.stripPrefix("out")) + { + buffer+="out"; + return TRUE; + } + if (st.stripPrefix("OUT")) + { + buffer+="out"; + return TRUE; + } + + if (st.stripPrefix("in")) + { + buffer+="in"; + return TRUE; + } + if (st.stripPrefix("IN")) + { + buffer+="in"; + return TRUE; + } + return FALSE; +} + +/*! + * divides a process string in its name and types + * @param text process text + * @param name points to the process name + * @param ql stores the process types + */ + +void VhdlDocGen::parseProcessProto(const char* text, + QCString& name,QStringList& ql) +{ + int index,end; + const char *s=":"; + QCString temp; + QCString s1(text); + index=s1.find(s,0,FALSE); + if (index >=0) + { + name=s1.left(index); + // strcpy(name,tt.data()); + } + + index=s1.find("(",0,FALSE); + end=s1.findRev(")",s1.length(),FALSE); + // end=s1.find(")",0,FALSE); + + if ((end-index)>1) + { + temp=s1.mid(index+1,(end-index-1)); + ql=QStringList::split(",",temp,FALSE); + } +}//parseProcessProto /*! * strips the "--" prefixes of vhdl comments */ void VhdlDocGen::prepareComment(QCString& qcs) { + QCString temp; const char* s="--!"; + //const char *start="--!{"; + //const char *end="--!}"; int index=0; +#if 0 + index=qcs.find(start,0,TRUE); + if (index>0) + temp=qcs.remove(index,strlen(start)); + qcs=temp; + + index=qcs.find(end,0,TRUE); + if (index>0) + temp=qcs.remove(index,strlen(end)); + qcs=temp; +#endif while (TRUE) { index=qcs.find(s,0,TRUE); if (index<0) break; - qcs=qcs.remove(index,qstrlen(s)); + temp=qcs.remove(index,strlen(s)); + qcs=temp; } qcs=qcs.stripWhiteSpace(); } @@ -1122,7 +990,7 @@ void VhdlDocGen::prepareComment(QCString& qcs) * @param doc ??? */ void VhdlDocGen::parseFuncProto(const char* text,QList<Argument>& qlist, - QCString& name,QCString& ret,bool doc) + QCString& name,QCString& ret,bool doc) { (void)qlist; //unused int index,end; @@ -1178,7 +1046,7 @@ QCString VhdlDocGen::getIndexWord(const char* c,int index) { QStringList ql; QCString temp(c); - QRegExp reg("[\\s:|]"); + QRegExp reg("[\\s]"); ql=QStringList::split(reg,temp,FALSE); @@ -1227,16 +1095,16 @@ QCString VhdlDocGen::trTypeString(uint64 type) case VhdlDocGen::PROCESS: return "Process"; case VhdlDocGen::PORT: return "Port"; case VhdlDocGen::GENERIC: return "Generic"; + case VhdlDocGen::DOCUMENT: return "Doc"; case VhdlDocGen::UNITS: return "Units"; - //case VhdlDocGen::PORTMAP: return "Port Map"; + //case VhdlDocGen::PORTMAP: return "Port Map"; case VhdlDocGen::SHAREDVARIABLE: return "Shared Variable"; case VhdlDocGen::GROUP: return "Group"; case VhdlDocGen::VFILE: return "File"; - case VhdlDocGen::INSTANTIATION: return "Instantiation"; + case VhdlDocGen::COMPONENT_INST: return "Component Instantiation"; case VhdlDocGen::ALIAS: return "Alias"; case VhdlDocGen::CONFIG: return "Configuration"; case VhdlDocGen::MISCELLANEOUS: return "Miscellaneous"; - case VhdlDocGen::UCF_CONST: return "Constraints"; default: return ""; } } // convertType @@ -1303,7 +1171,7 @@ QCString VhdlDocGen::getProcessNumber() void VhdlDocGen::writeFormatString(const QCString& s,OutputList&ol,const MemberDef* mdef) { - QRegExp reg("[\\[\\]\\.\\/\\:\\<\\>\\:\\s\\,\\;\\'\\+\\-\\*\\|\\&\\=\\(\\)\"]"); + QRegExp reg("[\\/\\:\\<\\>\\:\\s\\,\\;\\'\\+\\-\\*\\|\\&\\=\\(\\)\"]"); QCString qcs = s; qcs+=QCString(" ");// parsing the last sign QCString *ss; @@ -1324,48 +1192,35 @@ void VhdlDocGen::writeFormatString(const QCString& s,OutputList&ol,const MemberD find=find.left(j); buf[0]=temp[j]; ss=VhdlDocGen::findKeyWord(find); - bool k=isNumber(find); // is this a number + bool k=VhdlDocGen::isNumber(find); // is this a number if (k) { ol.docify(" "); - startFonts(find,"vhdldigit",ol); + VhdlDocGen::startFonts(find,"vhdldigit",ol); ol.docify(" "); } else if (j != 0 && ss) { - startFonts(find,ss->data(),ol); + VhdlDocGen::startFonts(find,ss->data(),ol); } else { - if (j>0) - { - VhdlDocGen::writeStringLink(mdef,find,ol); - } + if (j>0) + { + VhdlDocGen::writeStringLink(mdef,find,ol); + } } - startFonts(&buf[0],"vhdlchar",ol); + VhdlDocGen::startFonts(&buf[0],"vhdlchar",ol); QCString st=temp.remove(0,j+1); find=st; - if (!find.isEmpty() && find.at(0)=='"') - { - int ii=find.find('"',2); - if (ii>1) - { - QCString com=find.left(ii+1); - startFonts(com,"keyword",ol); - temp=find.remove(0,ii+1); - } - } - else - { - temp=st; - } + temp=st; j = reg.match(temp.data(),0,&len); }//while }//if else { - startFonts(find,"vhdlchar",ol); + VhdlDocGen::startFonts(find,"vhdlchar",ol); } ol.endBold(); }// writeFormatString @@ -1373,9 +1228,10 @@ void VhdlDocGen::writeFormatString(const QCString& s,OutputList&ol,const MemberD /*! * returns TRUE if this string is a number */ + bool VhdlDocGen::isNumber(const QCString& s) { - static QRegExp regg("[0-9][0-9eEfFbBcCdDaA_.#-+?xXzZ]*"); + static QRegExp regg("[0-9][0-9eEfFbBcCdDaA_.#-]*"); if (s.isEmpty()) return FALSE; int j,len; @@ -1383,17 +1239,32 @@ bool VhdlDocGen::isNumber(const QCString& s) if ((j==0) && (len==(int)s.length())) return TRUE; return FALSE; + #if 0 + int len=s.length(); + if (len==0) return FALSE; + for (int j=0;j<len;j++) + { + if (isdigit((int)(s.at(j) & 0xff))==0) + return FALSE; + } + return TRUE; + #endif }// isNumber +void VhdlDocGen::startFonts(const QCString& q, const char *keyword,OutputList& ol) +{ + ol.startFontClass(keyword); + ol.docify(q.data()); + ol.endFontClass(); +} /*! * inserts white spaces for better readings * and writes a colored string to the output */ -void VhdlDocGen::formatString(const QCString &s, OutputList& ol,const MemberDef* mdef) +void VhdlDocGen::formatString(QCString & qcs, OutputList& ol,const MemberDef* mdef) { - QCString qcs = s; QCString temp(qcs.length()); qcs.stripPrefix(":"); qcs.stripPrefix("is"); @@ -1401,7 +1272,7 @@ void VhdlDocGen::formatString(const QCString &s, OutputList& ol,const MemberDef* qcs.stripPrefix("of"); qcs.stripPrefix("OF"); - // VhdlDocGen::deleteCharRev(qcs,';'); + VhdlDocGen::deleteCharRev(qcs,';'); //char white='\t'; int len = qcs.length(); unsigned int index=1;//temp.length(); @@ -1411,11 +1282,11 @@ void VhdlDocGen::formatString(const QCString &s, OutputList& ol,const MemberDef* char c=qcs[j]; char b=c; if (j>0) b=qcs[j-1]; - if (c=='"' || c==',' || c=='\''|| c=='(' || c==')' || c==':' || c=='[' || c==']' ) // || (c==':' && b!='=')) // || (c=='=' && b!='>')) + if (c=='"' || c==',' || c==';' || c=='\''|| c=='(' || c==')' || c==':' ) // || (c==':' && b!='=')) // || (c=='=' && b!='>')) { if (temp.at(index-1) != ' ') { - temp+=" "; + temp+=" "; } temp+=c; temp+=" "; @@ -1424,14 +1295,14 @@ void VhdlDocGen::formatString(const QCString &s, OutputList& ol,const MemberDef* { if (b==':') // := operator { - temp.replace(index-1,1,"="); - temp+=" "; + temp.replace(index-1,1,"="); + temp+=" "; } else // = operator { - temp+=" "; - temp+=c; - temp+=" "; + temp+=" "; + temp+=c; + temp+=" "; } } else @@ -1474,17 +1345,17 @@ void VhdlDocGen::writeProcedureProto(OutputList& ol,const ArgumentList* al,const arg->defval+=" "; if (str) { - startFonts(arg->defval,str->data(),ol); + VhdlDocGen::startFonts(arg->defval,str->data(),ol); } else { - startFonts(arg->defval,"vhdlchar",ol); // write type (variable,constant etc.) + VhdlDocGen::startFonts(arg->defval,"vhdlchar",ol); // write type (variable,constant etc.) } - startFonts(nn,"vhdlchar",ol); // write name - if (qstricmp(arg->attrib,arg->type) != 0) + VhdlDocGen::startFonts(nn,"vhdlchar",ol); // write name + if (qstricmp(arg->attrib.data(),arg->type.data()) != 0) { - startFonts(arg->attrib.lower(),"stringliteral",ol); // write in|out + VhdlDocGen::startFonts(arg->attrib.lower(),"stringliteral",ol); // write in|out } ol.docify(" "); VhdlDocGen::formatString(arg->type,ol,mdef); @@ -1523,42 +1394,32 @@ void VhdlDocGen::writeFunctionProto(OutputList& ol,const ArgumentList* al,const for (;(arg=ali.current());++ali) { ol.startBold(); - QCString att=arg->defval; - bool bGen=att.stripPrefix("gen!"); - if (sem && len < 3) { ol.docify(" , "); } - - if (bGen) { - VhdlDocGen::formatString(QCString("generic "),ol,mdef); - } + QCString att=arg->defval; if (!att.isEmpty()) { QCString *str=VhdlDocGen::findKeyWord(att); att+=" "; if (str) - VhdlDocGen::formatString(att,ol,mdef); + VhdlDocGen::formatString(att,ol,mdef); else - startFonts(att,"vhdlchar",ol); + VhdlDocGen::startFonts(att,"vhdlchar",ol); } QCString nn=arg->name; nn+=": "; - QCString ss=arg->type.stripWhiteSpace(); //.lower(); - QCString w=ss.stripWhiteSpace();//.upper(); - startFonts(nn,"vhdlchar",ol); - startFonts("in ","stringliteral",ol); + QCString ss=arg->type; //.lower(); + QCString w=ss;//.upper(); + VhdlDocGen::startFonts(nn,"vhdlchar",ol); + VhdlDocGen::startFonts("in ","stringliteral",ol); QCString *str=VhdlDocGen::findKeyWord(ss); if (str) VhdlDocGen::formatString(w,ol,mdef); else - startFonts(w,"vhdlchar",ol); - - if (arg->attrib) - startFonts(arg->attrib,"vhdlchar",ol); - + VhdlDocGen::startFonts(w,"vhdlchar",ol); sem=TRUE; ol.endBold(); @@ -1573,11 +1434,9 @@ void VhdlDocGen::writeFunctionProto(OutputList& ol,const ArgumentList* al,const if (exp) { ol.insertMemberAlign(); - ol.startBold(); ol.docify("[ "); ol.docify(exp); ol.docify(" ]"); - ol.endBold(); } ol.endBold(); } @@ -1597,11 +1456,9 @@ void VhdlDocGen::writeProcessProto(OutputList& ol,const ArgumentList* al,const M for (;(arg=ali.current());++ali) { if (sem) - { ol.docify(" , "); - } QCString nn=arg->name; - // startFonts(nn,"vhdlchar",ol); + // VhdlDocGen::startFonts(nn,"vhdlchar",ol); VhdlDocGen::writeFormatString(nn,ol,mdef); sem=TRUE; } @@ -1633,19 +1490,17 @@ bool VhdlDocGen::writeFuncProcDocu( } ol.endMemberDocName(); ol.startParameterList(TRUE); - //ol.startParameterName(FALSE); Argument *arg; bool first=TRUE; for (;(arg=ali.current());++ali) { ol.startParameterType(first,""); - // if (first) ol.writeChar('('); + //if (first) ol.writeChar('('); QCString attl=arg->defval; bool bGen=attl.stripPrefix("gen!"); if (bGen) VhdlDocGen::writeFormatString(QCString("generic "),ol,md); - if (VhdlDocGen::isProcedure(md)) { startFonts(arg->defval,"keywordtype",ol); @@ -1655,7 +1510,7 @@ bool VhdlDocGen::writeFuncProcDocu( ol.startParameterName(TRUE); VhdlDocGen::writeFormatString(arg->name,ol,md); - + if (VhdlDocGen::isProcedure(md)) { startFonts(arg->attrib,"stringliteral",ol); @@ -1671,8 +1526,7 @@ bool VhdlDocGen::writeFuncProcDocu( ol.enable(OutputGenerator::Man); if (!VhdlDocGen::isProcess(md)) { - // startFonts(arg->type,"vhdlkeyword",ol); - VhdlDocGen::writeFormatString(arg->type,ol,md); + VhdlDocGen::writeFormatString(arg->type,ol,md); } ol.disable(OutputGenerator::Man); ol.endEmphasis(); @@ -1684,9 +1538,9 @@ bool VhdlDocGen::writeFuncProcDocu( } else { - // ol.docify(" ) "); ol.endParameterName(TRUE,FALSE,TRUE); break; + //ol.docify(" ) "); } ol.endParameterName(FALSE,FALSE,FALSE); @@ -1698,8 +1552,38 @@ bool VhdlDocGen::writeFuncProcDocu( } // writeDocFunProc +/*! + * returns TRUE if this string is a function prototype or + * FALSE if this is a procedure + */ +bool VhdlDocGen::isFunctionProto(QCString& ss) +{ + QCString name=ss; + QCString proc("procedure"); + QCString func("function"); + name=name.stripWhiteSpace(); + QStringList ql=QStringList::split(QRegExp("[\\s]"),name,FALSE); + int j=ql.count(); + if (j<2) return FALSE; + QCString tt=ql[0].utf8().lower(); + + if (tt=="impure" || tt=="pure") tt=ql[1].utf8(); + if (VhdlDocGen::compareString(tt,proc)!=0 && VhdlDocGen::compareString(tt,func)!=0) + return FALSE; + + QCString temp=ql[j-1].utf8(); + temp=temp.stripWhiteSpace(); + if (qstricmp(temp.data(),"is")==0) + { + VhdlDocGen::deleteCharRev(name,'s'); + VhdlDocGen::deleteCharRev(name,'i'); + ss=name; + return TRUE; + } + return FALSE; +} QCString VhdlDocGen::convertArgumentListToString(const ArgumentList* al,bool func) { @@ -1731,7 +1615,7 @@ QCString VhdlDocGen::convertArgumentListToString(const ArgumentList* al,bool fun void VhdlDocGen::writeVhdlDeclarations(MemberList* ml, - OutputList& ol,GroupDef* gd,ClassDef* cd,FileDef *fd,NamespaceDef* nd) + OutputList& ol,GroupDef* gd,ClassDef* cd,FileDef *fd,NamespaceDef *nd) { static ClassDef *cdef; //static GroupDef* gdef; @@ -1742,12 +1626,12 @@ void VhdlDocGen::writeVhdlDeclarations(MemberList* ml, } /* - if (gd && gdef==gd) return; - if (gd && gdef!=gd) - { - gdef=gd; - } - */ + if (gd && gdef==gd) return; + if (gd && gdef!=gd) + { + gdef=gd; + } +*/ VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::LIBRARY,FALSE),0,FALSE,VhdlDocGen::LIBRARY); VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::USE,FALSE),0,FALSE,VhdlDocGen::USE); VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::FUNCTION,FALSE),0,FALSE,VhdlDocGen::FUNCTION); @@ -1766,14 +1650,12 @@ void VhdlDocGen::writeVhdlDeclarations(MemberList* ml, VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::SHAREDVARIABLE,FALSE),0,FALSE,VhdlDocGen::SHAREDVARIABLE); VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::VFILE,FALSE),0,FALSE,VhdlDocGen::VFILE); VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::GROUP,FALSE),0,FALSE,VhdlDocGen::GROUP); - VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::INSTANTIATION,FALSE),0,FALSE,VhdlDocGen::INSTANTIATION); + VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::COMPONENT_INST,FALSE),0,FALSE,VhdlDocGen::COMPONENT_INST); VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::ALIAS,FALSE),0,FALSE,VhdlDocGen::ALIAS); VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::MISCELLANEOUS),0,FALSE,VhdlDocGen::MISCELLANEOUS); // configurations must be added to global file definitions. VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::CONFIG,FALSE),0,FALSE,VhdlDocGen::CONFIG); - VhdlDocGen::writeVHDLDeclarations(ml,ol,cd,nd,fd,gd,theTranslator_vhdlType(VhdlDocGen::UCF_CONST,FALSE),0,FALSE,VhdlDocGen::UCF_CONST); - } static void setGlobalType(MemberList *ml) @@ -1783,21 +1665,15 @@ static void setGlobalType(MemberList *ml) MemberListIterator mmli(*ml); for ( ; (mdd=mmli.current()); ++mmli ) { - QCString l=mdd->typeString(); - - if (qstrcmp(mdd->argsString(),"package")==0) - { - mdd->setMemberSpecifiers(VhdlDocGen::INSTANTIATION); - } - else if (qstrcmp(mdd->argsString(),"configuration")==0) + if (qstricmp(mdd->argsString(),"configuration")==0) { mdd->setMemberSpecifiers(VhdlDocGen::CONFIG); } - else if (qstrcmp(mdd->typeString(),"library")==0) + else if (qstricmp(mdd->typeString(),"library")==0) { mdd->setMemberSpecifiers(VhdlDocGen::LIBRARY); } - else if (qstrcmp(mdd->typeString(),"use")==0) + else if (qstricmp(mdd->typeString(),"package")==0) { mdd->setMemberSpecifiers(VhdlDocGen::USE); } @@ -1805,10 +1681,6 @@ static void setGlobalType(MemberList *ml) { mdd->setMemberSpecifiers(VhdlDocGen::MISCELLANEOUS); } - else if (qstricmp(mdd->typeString(),"ucf_const")==0) - { - mdd->setMemberSpecifiers(VhdlDocGen::UCF_CONST); - } } } @@ -1817,12 +1689,7 @@ bool VhdlDocGen::writeVHDLTypeDocumentation(const MemberDef* mdef, const Definit { ClassDef *cd=(ClassDef*)d; bool hasParams = FALSE; - if (cd==0) return hasParams; - - QCString ttype=mdef->typeString(); - QCString largs=mdef->argsString(); - if ((VhdlDocGen::isVhdlFunction(mdef) || VhdlDocGen::isProcedure(mdef) || VhdlDocGen::isProcess(mdef))) { QCString nn=mdef->typeString(); @@ -1832,7 +1699,6 @@ bool VhdlDocGen::writeVHDLTypeDocumentation(const MemberDef* mdef, const Definit if (memdef && memdef->isLinkable()) { ol.docify(" "); - ol.startBold(); writeLink(memdef,ol); ol.endBold(); @@ -1841,6 +1707,7 @@ bool VhdlDocGen::writeVHDLTypeDocumentation(const MemberDef* mdef, const Definit else { ol.docify(" "); + QCString ttype=mdef->typeString(); VhdlDocGen::formatString(ttype,ol,mdef); ol.docify(" "); } @@ -1848,48 +1715,21 @@ bool VhdlDocGen::writeVHDLTypeDocumentation(const MemberDef* mdef, const Definit hasParams = VhdlDocGen::writeFuncProcDocu(mdef,ol, mdef->argumentList()); } - + if (VhdlDocGen::isMisc(mdef)) + { + writeLink(mdef,ol); + return hasParams; + } if (mdef->isVariable()) { - if (VhdlDocGen::isConstraint(mdef)) - { - writeLink(mdef,ol); - ol.docify(" "); - - largs=largs.replace(QRegExp("#")," "); - VhdlDocGen::formatString(largs,ol,mdef); - return hasParams; - } - else - { - writeLink(mdef,ol); - if (VhdlDocGen::isLibrary(mdef) || VhdlDocGen::isPackage(mdef)) - { - return hasParams; - } - ol.docify(" "); - } - - // QCString largs=mdef->argsString(); - - bool c=largs=="context"; - bool brec=largs.stripPrefix("record") ; - - if (!brec && !c) - VhdlDocGen::formatString(ttype,ol,mdef); - - if (c || brec || largs.stripPrefix("units")) - { - if (c) - largs=ttype; - VhdlDocGen::writeRecUnitDocu(mdef,ol,largs); - return hasParams; - } - + writeLink(mdef,ol); ol.docify(" "); - if (VhdlDocGen::isPort(mdef) || VhdlDocGen::isGeneric(mdef)) + QCString ttype=mdef->typeString(); + VhdlDocGen::formatString(ttype,ol,mdef); + ol.docify(" "); + if (VhdlDocGen::isPort(mdef)) { - // QCString largs=mdef->argsString(); + QCString largs=mdef->argsString(); VhdlDocGen::formatString(largs,ol,mdef); ol.docify(" "); } @@ -1903,8 +1743,6 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, ClassDef *cd,NamespaceDef *nd,FileDef *fd,GroupDef *gd, bool /*inGroup*/) { - static QRegExp reg("[%]"); - Definition *d=0; /* some vhdl files contain only a configuration description @@ -1920,9 +1758,9 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, */ ASSERT(cd!=0 || nd!=0 || fd!=0 || gd!=0 || - mdef->getMemberSpecifiers()==VhdlDocGen::LIBRARY || - mdef->getMemberSpecifiers()==VhdlDocGen::USE - ); // member should belong to something + mdef->getMemberSpecifiers()==VhdlDocGen::LIBRARY || + mdef->getMemberSpecifiers()==VhdlDocGen::USE + ); // member should belong to something if (cd) d=cd; else if (nd) d=nd; else if (fd) d=fd; @@ -1933,27 +1771,27 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, if (!Config_getString("GENERATE_TAGFILE").isEmpty()) { Doxygen::tagFile << " <member kind=\""; - if (VhdlDocGen::isGeneric(mdef)) Doxygen::tagFile << "generic"; - if (VhdlDocGen::isPort(mdef)) Doxygen::tagFile << "port"; - if (VhdlDocGen::isEntity(mdef)) Doxygen::tagFile << "entity"; - if (VhdlDocGen::isComponent(mdef)) Doxygen::tagFile << "component"; - if (VhdlDocGen::isVType(mdef)) Doxygen::tagFile << "type"; - if (VhdlDocGen::isConstant(mdef)) Doxygen::tagFile << "constant"; - if (VhdlDocGen::isSubType(mdef)) Doxygen::tagFile << "subtype"; - if (VhdlDocGen::isVhdlFunction(mdef)) Doxygen::tagFile << "function"; - if (VhdlDocGen::isProcedure(mdef)) Doxygen::tagFile << "procedure"; - if (VhdlDocGen::isProcess(mdef)) Doxygen::tagFile << "process"; - if (VhdlDocGen::isSignals(mdef)) Doxygen::tagFile << "signal"; - if (VhdlDocGen::isAttribute(mdef)) Doxygen::tagFile << "attribute"; - if (VhdlDocGen::isRecord(mdef)) Doxygen::tagFile << "record"; - if (VhdlDocGen::isLibrary(mdef)) Doxygen::tagFile << "library"; - if (VhdlDocGen::isPackage(mdef)) Doxygen::tagFile << "package"; - if (VhdlDocGen::isVariable(mdef)) Doxygen::tagFile << "shared variable"; - if (VhdlDocGen::isFile(mdef)) Doxygen::tagFile << "file"; - if (VhdlDocGen::isGroup(mdef)) Doxygen::tagFile << "group"; - if (VhdlDocGen::isCompInst(mdef)) Doxygen::tagFile << " instantiation"; - if (VhdlDocGen::isAlias(mdef)) Doxygen::tagFile << "alias"; - if (VhdlDocGen::isCompInst(mdef)) Doxygen::tagFile << "configuration"; + if (VhdlDocGen::isGeneric(mdef)) Doxygen::tagFile << "generic"; + if (VhdlDocGen::isPort(mdef)) Doxygen::tagFile << "port"; + if (VhdlDocGen::isEntity(mdef)) Doxygen::tagFile << "entity"; + if (VhdlDocGen::isComponent(mdef)) Doxygen::tagFile << "component"; + if (VhdlDocGen::isVType(mdef)) Doxygen::tagFile << "type"; + if (VhdlDocGen::isConstant(mdef)) Doxygen::tagFile << "constant"; + if (VhdlDocGen::isSubType(mdef)) Doxygen::tagFile << "subtype"; + if (VhdlDocGen::isVhdlFunction(mdef)) Doxygen::tagFile << "function"; + if (VhdlDocGen::isProcedure(mdef)) Doxygen::tagFile << "procedure"; + if (VhdlDocGen::isProcess(mdef)) Doxygen::tagFile << "process"; + if (VhdlDocGen::isSignals(mdef)) Doxygen::tagFile << "signal"; + if (VhdlDocGen::isAttribute(mdef)) Doxygen::tagFile << "attribute"; + if (VhdlDocGen::isRecord(mdef)) Doxygen::tagFile << "record"; + if (VhdlDocGen::isLibrary(mdef)) Doxygen::tagFile << "library"; + if (VhdlDocGen::isPackage(mdef)) Doxygen::tagFile << "package"; + if (VhdlDocGen::isVariable(mdef)) Doxygen::tagFile << "shared variable"; + if (VhdlDocGen::isFile(mdef)) Doxygen::tagFile << "file"; + if (VhdlDocGen::isGroup(mdef)) Doxygen::tagFile << "group"; + if (VhdlDocGen::isCompInst(mdef)) Doxygen::tagFile << "component instantiation"; + if (VhdlDocGen::isAlias(mdef)) Doxygen::tagFile << "alias"; + if (VhdlDocGen::isCompInst(mdef)) Doxygen::tagFile << "configuration"; Doxygen::tagFile << "\">" << endl; Doxygen::tagFile << " <type>" << convertToXML(mdef->typeString()) << "</type>" << endl; @@ -1982,7 +1820,7 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, } QCString cname = d->name(); - QCString cfname = d->getOutputFileBase(); + QCString cfname = mdef->getOutputFileBase(); //HtmlHelp *htmlHelp=0; // bool hasHtmlHelp = Config_getBool("GENERATE_HTML") && Config_getBool("GENERATE_HTMLHELP"); @@ -1994,9 +1832,10 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, // start a new member declaration bool isAnonymous = annoClassDef; // || m_impl->annMemb || m_impl->annEnumType; ///printf("startMemberItem for %s\n",name().data()); + int mm=mdef->getMemberSpecifiers(); if (mm==VhdlDocGen::MISCELLANEOUS) - isAnonymous=TRUE; + isAnonymous=TRUE; ol.startMemberItem( mdef->anchor(), isAnonymous ); //? 1 : m_impl->tArgList ? 3 : 0); @@ -2020,21 +1859,21 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, /*VHDL CHANGE */ bool bRec,bUnit; QCString ltype(mdef->typeString()); - // ltype=ltype.replace(reg," "); QCString largs(mdef->argsString()); - // largs=largs.replace(reg," "); mdef->setType(ltype.data()); mdef->setArgsString(largs.data()); - //ClassDef * plo=mdef->getClassDef(); + //printf(":: ltype=%s largs=%s name=%s mm=%d\n", + // ltype.data(),largs.data(),mdef->name().data(),mm); + ClassDef *kl=0; + //FileDef *fdd=0; ArgumentList *alp = mdef->argumentList(); QCString nn; - //VhdlDocGen::adjustRecordMember(mdef); if (gd) gd=0; switch (mm) { case VhdlDocGen::MISCELLANEOUS: - VhdlDocGen::writeSource(mdef,ol,nn); + VhdlDocGen::writeCodeFragment(mdef,ol); break; case VhdlDocGen::PROCEDURE: case VhdlDocGen::FUNCTION: @@ -2046,10 +1885,10 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, writeLink(mdef,ol); if (alp!=0 && mm==VhdlDocGen::FUNCTION) - VhdlDocGen::writeFunctionProto(ol,alp,mdef); + VhdlDocGen::writeFunctionProto(ol,alp,mdef); if (alp!=0 && mm==VhdlDocGen::PROCEDURE) - VhdlDocGen::writeProcedureProto(ol,alp,mdef); + VhdlDocGen::writeProcedureProto(ol,alp,mdef); break; case VhdlDocGen::USE: @@ -2073,6 +1912,7 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, name+=" <"+mdef->name()+">"; ol.startEmphasis(); ol.writeObjectLink(kl->getReference(),kl->getOutputFileBase(),0,name.data()); + ol.endEmphasis(); ol.popGeneratorState(); } break; @@ -2083,9 +1923,7 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, { VhdlDocGen::writeRecorUnit(ltype,ol,mdef); } - break; - case VhdlDocGen::GENERIC: case VhdlDocGen::PORT: case VhdlDocGen::ALIAS: @@ -2095,18 +1933,18 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, ol.insertMemberAlign(); if (mm==VhdlDocGen::GENERIC) { - ol.startBold(); - VhdlDocGen::formatString(largs,ol,mdef); - ol.endBold(); + ol.startBold(); + VhdlDocGen::formatString(largs,ol,mdef); + ol.endBold(); } else { - ol.docify(" "); - ol.startBold(); - VhdlDocGen::formatString(ltype,ol,mdef); - ol.endBold(); - ol.docify(" "); - VhdlDocGen::formatString(largs,ol,mdef); + ol.docify(" "); + ol.startBold(); + VhdlDocGen::formatString(ltype,ol,mdef); + ol.endBold(); + ol.docify(" "); + VhdlDocGen::formatString(largs,ol,mdef); } break; case VhdlDocGen::PROCESS: @@ -2117,7 +1955,7 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, case VhdlDocGen::PACKAGE: case VhdlDocGen::ENTITY: case VhdlDocGen::COMPONENT: - case VhdlDocGen::INSTANTIATION: + case VhdlDocGen::COMPONENT_INST: case VhdlDocGen::CONFIG: if (VhdlDocGen::isCompInst(mdef) ) { @@ -2133,15 +1971,16 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, } largs.prepend("::"); - largs.prepend(mdef->name().data()); + largs.prepend(mdef->name()); ol.writeObjectLink(mdef->getReference(), cfname, mdef->anchor(), mdef->name()); } else + { writeLink(mdef,ol); - + } ol.insertMemberAlign(); ol.docify(" "); @@ -2155,20 +1994,19 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, { if (VhdlDocGen::isConfig(mdef) || VhdlDocGen::isCompInst(mdef)) { - nn=mdef->getOutputFileBase(); nn=ltype; } else { - nn=mdef->name(); + nn=mdef->name(); } - kl=getClass(nn.data()); - if (kl) - { - nn=kl->getOutputFileBase(); - ol.pushGeneratorState(); - ol.disableAllBut(OutputGenerator::Html); - ol.startEmphasis(); + kl=getClass(nn.data()); + if (kl) + { + nn=kl->getOutputFileBase(); + ol.pushGeneratorState(); + ol.disableAllBut(OutputGenerator::Html); + ol.startEmphasis(); QCString name("<Entity "); if (VhdlDocGen::isConfig(mdef) || VhdlDocGen::isCompInst(mdef)) { @@ -2178,19 +2016,11 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, { name+=mdef->name()+"> "; } - ol.writeObjectLink(kl->getReference(),kl->getOutputFileBase(),0,name.data()); - ol.endEmphasis(); - ol.popGeneratorState(); - } - } - break; - case VhdlDocGen::UCF_CONST: - mm=mdef->name().findRev('_'); - if (mm>0) - { - mdef->setName(mdef->name().left(mm)); + ol.writeObjectLink(kl->getReference(),kl->getOutputFileBase(),0,name.data()); + ol.endEmphasis(); + ol.popGeneratorState(); + } } - writeUCFLink(mdef,ol); break; case VhdlDocGen::SIGNAL: case VhdlDocGen::ATTRIBUTE: @@ -2217,7 +2047,6 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, if (bRec || bUnit) writeRecorUnit(largs,ol,mdef); ol.endBold(); break; - default: break; } @@ -2245,8 +2074,8 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, { ol.startMemberDescription(mdef->anchor()); ol.generateDoc(mdef->briefFile(),mdef->briefLine(), - mdef->getOuterScope()?mdef->getOuterScope():d, - mdef,mdef->briefDescription(),TRUE,FALSE,0,TRUE,FALSE); + mdef->getOuterScope()?mdef->getOuterScope():d, + mdef,mdef->briefDescription(),TRUE,FALSE,0,TRUE,FALSE); if (detailsVisible) { ol.pushGeneratorState(); @@ -2255,11 +2084,11 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, ol.docify(" "); if (mdef->getGroupDef()!=0 && gd==0) // forward link to the group { - ol.startTextLink(mdef->getOutputFileBase(),mdef->anchor()); + ol.startTextLink(mdef->getOutputFileBase(),mdef->anchor()); } else // local link { - ol.startTextLink(0,mdef->anchor()); + ol.startTextLink(0,mdef->anchor()); } ol.endTextLink(); //ol.startEmphasis(); @@ -2272,6 +2101,25 @@ void VhdlDocGen::writeVHDLDeclaration(MemberDef* mdef,OutputList &ol, }// end writeVhdlDeclaration +void VhdlDocGen::writeRecorUnit(QCString & largs,OutputList& ol ,const MemberDef *mdef) +{ + QStringList ql=QStringList::split("#",largs,FALSE); + uint len=ql.count(); + for(uint i=0;i<len;i++) + { + QCString n=ql[i].utf8(); + VhdlDocGen::formatString(n,ol,mdef); + if ((len-i)>1) ol.lineBreak(); + } +} + +void VhdlDocGen::writeLink(const MemberDef* mdef,OutputList &ol) +{ + ol.writeObjectLink(mdef->getReference(), + mdef->getOutputFileBase(), + mdef->anchor(), + mdef->name()); +} void VhdlDocGen::writePlainVHDLDeclarations( MemberList* mlist,OutputList &ol, @@ -2280,6 +2128,8 @@ void VhdlDocGen::writePlainVHDLDeclarations( SDict<QCString> pack(1009); + ol.pushGeneratorState(); + bool first=TRUE; MemberDef *md; MemberListIterator mli(*mlist); @@ -2295,9 +2145,9 @@ void VhdlDocGen::writePlainVHDLDeclarations( { if (!pack.find(md->name().data())) { - if (first) ol.startMemberList(),first=FALSE; - VhdlDocGen::writeVHDLDeclaration(md,ol,cd,nd,fd,gd,FALSE); - pack.append(md->name().data(),new QCString(md->name().data())); + if (first) ol.startMemberList(),first=FALSE; + VhdlDocGen::writeVHDLDeclaration(md,ol,cd,nd,fd,gd,FALSE); + pack.append(md->name().data(),new QCString(md->name().data())); } } //if } //for @@ -2305,7 +2155,7 @@ void VhdlDocGen::writePlainVHDLDeclarations( pack.clear(); }//plainDeclaration -static bool membersHaveSpecificType(MemberList *ml,uint64 type) +bool VhdlDocGen::membersHaveSpecificType(MemberList *ml,uint64 type) { if (ml==0) return FALSE; MemberDef *mdd=0; @@ -2389,9 +2239,23 @@ void VhdlDocGen::writeVHDLDeclarations(MemberList* ml,OutputList &ol, } }// writeVHDLDeclarations +/* strips the prefix for record and unit members*/ +void VhdlDocGen::adjustRecordMember(MemberDef *mdef) +{ //,OutputList & ol) { + QRegExp regg("[_a-zA-Z]"); + QCString nn=mdef->name(); + int j=nn.find(regg,0); + if (j>0) + { + nn=nn.mid(j,nn.length()); + mdef->setName(nn.data()); + } +}//adjustRecordMember + +/* strips the prefix for package and package body */ -bool VhdlDocGen::writeClassType( ClassDef *& cd, - OutputList &ol ,QCString & cname) +bool VhdlDocGen::writeClassType( ClassDef * cd, + OutputList &ol ,QCString & cname) { int id=cd->protection(); QCString qcs = VhdlDocGen::trTypeString(id+2); @@ -2400,7 +2264,6 @@ bool VhdlDocGen::writeClassType( ClassDef *& cd, ol.writeString(qcs.data()); ol.writeString(" "); ol.endBold(); - //ol.insertMemberAlign(); return FALSE; }// writeClassLink @@ -2454,13 +2317,15 @@ QCString VhdlDocGen::trVhdlType(uint64 type,bool sing) if (sing) return "Port"; else return "Ports"; case VhdlDocGen::USE: - if (sing) return "use clause"; - else return "Use Clauses"; + if (sing) return "Package"; + else return "Packages"; case VhdlDocGen::GENERIC: if (sing) return "Generic"; else return "Generics"; case VhdlDocGen::PACKAGE_BODY: return "Package Body"; + case VhdlDocGen::DOCUMENT: + return "Doc"; case VhdlDocGen::UNITS: return "Units"; case VhdlDocGen::SHAREDVARIABLE: @@ -2472,19 +2337,17 @@ QCString VhdlDocGen::trVhdlType(uint64 type,bool sing) case VhdlDocGen::GROUP: if (sing) return "Group"; return "Groups"; - case VhdlDocGen::INSTANTIATION: - if (sing) return "Instantiation"; - else return "Instantiations"; + case VhdlDocGen::COMPONENT_INST: + if (sing) return "Component Instantiation"; + else return "Component Instantiations"; case VhdlDocGen::ALIAS: if (sing) return "Alias"; return "Aliases"; case VhdlDocGen::CONFIG: if (sing) return "Configuration"; return "Configurations"; - case VhdlDocGen::MISCELLANEOUS: + case VhdlDocGen::MISCELLANEOUS: return "Miscellaneous"; - case VhdlDocGen::UCF_CONST: - return "Constraints"; default: return "Class"; } @@ -2508,7 +2371,7 @@ QCString VhdlDocGen::trDesignUnitMembers() QCString VhdlDocGen::trDesignUnitListDescription() { return "Here is a list of all design unit members with links to " - "the Entities they belong to:"; + "the Entities and Packages they belong to:"; } QCString VhdlDocGen::trDesignUnitIndex() @@ -2527,1875 +2390,127 @@ QCString VhdlDocGen::trFunctionAndProc() } -/*! writes a link if the string is linkable else a formatted string */ - -void VhdlDocGen::writeStringLink(const MemberDef *mdef,QCString mem, OutputList& ol) -{ - if (mdef) - { - ClassDef *cd=mdef->getClassDef(); - if (cd) - { - QCString n=cd->name(); - MemberDef* memdef=VhdlDocGen::findMember(n,mem); - if (memdef && memdef->isLinkable()) - { - ol.startBold(); - writeLink(memdef,ol); - ol.endBold(); - ol.docify(" "); - return; - } - } - } - startFonts(mem,"vhdlchar",ol); -}// found component - - - -void VhdlDocGen::writeSource(MemberDef *mdef,OutputList& ol,QCString & cname) -{ - ParserInterface *pIntf = Doxygen::parserManager->getParser(".vhd"); - pIntf->resetCodeParserState(); - - QCString codeFragment=mdef->documentation(); - - if (cname.isEmpty()) - { - writeLink(mdef,ol); - int fi=0; - int j=0; - do - { - fi=codeFragment.find("\n",++fi); - } while(fi>=0 && j++ <3); - - // show only the first four lines - if (j==4) - { - codeFragment=codeFragment.left(fi); - codeFragment.append("\n .... "); - } - } - - codeFragment.prepend("\n"); - ol.pushGeneratorState(); - ol.startCodeFragment(); - pIntf->parseCode(ol, // codeOutIntf - 0, // scope - codeFragment, // input - SrcLangExt_VHDL, // lang - FALSE, // isExample - 0, // exampleName - mdef->getFileDef(), // fileDef - mdef->getStartBodyLine(), // startLine - mdef->getEndBodyLine(), // endLine - TRUE, // inlineFragment - mdef, // memberDef - TRUE // show line numbers - ); - - ol.endCodeFragment(); - ol.popGeneratorState(); - - if (cname.isEmpty()) return; - - mdef->writeSourceDef(ol,cname); - mdef->writeSourceRefs(ol,cname); - mdef->writeSourceReffedBy(ol,cname); -} - - - -QCString VhdlDocGen::convertFileNameToClassName(QCString name) -{ - - QCString n=name; - n=n.remove(0,6); - - int i=0; - - while((i=n.find("__"))>0) - { - n=n.remove(i,1); - } - - while((i=n.find("_1"))>0) - { - n=n.replace(i,2,":"); - } - - return n; -} - -void VhdlDocGen::parseUCF(const char* input, Entry* entity,QCString fileName,bool altera) -{ - QCString ucFile(input); - int lineNo=0; - QCString newLine="\n"; - QCString comment("#!"); - QCString brief; - - while (!ucFile.isEmpty()) - { - int i=ucFile.find("\n"); - if (i<0) break; - lineNo++; - QCString temp=ucFile.left(i); - temp=temp.stripWhiteSpace(); - bool bb=temp.stripPrefix("//"); - - if (!temp.isEmpty()) - { - if (temp.stripPrefix(comment) ) - { - brief+=temp; - brief.append("\\n"); - } - else if (!temp.stripPrefix("#") && !bb) - { - if (altera) - { - int i=temp.find("-name"); - if (i>0) - { - temp=temp.remove(0,i+5); - } - - temp.stripPrefix("set_location_assignment"); - - initUCF(entity,0,temp,lineNo,fileName,brief); - } - else - { - QRegExp ee("[\\s=]"); - int i=temp.find(ee); - QCString ff=temp.left(i); - temp.stripPrefix(ff.data()); - ff.append("#"); - if (!temp.isEmpty()) - { - initUCF(entity,ff.data(),temp,lineNo,fileName,brief); - } - } - } - }//temp - - ucFile=ucFile.remove(0,i+1); - }// while -} - -static void initUCF(Entry* root,const char* type,QCString & qcs,int line,QCString & fileName,QCString & brief) -{ - if (qcs.isEmpty())return; - QRegExp sp("\\s"); - QRegExp reg("[\\s=]"); - QCString n; - // bool bo=(qstricmp(type,qcs.data())==0); - - VhdlDocGen::deleteAllChars(qcs,';'); - qcs=qcs.stripWhiteSpace(); - - int i= qcs.find(reg); - if (i<0) return; - if (i==0) - { - n=type; - VhdlDocGen::deleteAllChars(n,'#'); - type=""; - } - else - { - n=qcs.left(i); - } - qcs=qcs.remove(0,i+1); - // qcs.prepend("|"); - - qcs.stripPrefix("="); - - Entry* current=new Entry; - current->spec=VhdlDocGen::UCF_CONST; - current->section=Entry::VARIABLE_SEC; - current->bodyLine=line; - current->fileName=fileName; - current->type="ucf_const"; - current->args+=qcs; - current->lang= SrcLangExt_VHDL ; - - // adding dummy name for constraints like VOLTAGE=5,TEMPERATURE=20 C - if (n.isEmpty()) - { - n="dummy"; - n+=VhdlDocGen::getRecordNumber(); - } - - current->name= n+"_"; - current->name.append(VhdlDocGen::getRecordNumber().data()); - - if (!brief.isEmpty()) - { - current->brief=brief; - current->briefLine=line; - current->briefFile=fileName; - brief.resize(0); - } - - root->addSubEntry(current); -} - - -static void writeUCFLink(const MemberDef* mdef,OutputList &ol) -{ - - QCString largs(mdef->argsString()); - QCString n= splitString(largs, '#'); - // VhdlDocGen::adjustRecordMember(mdef); - bool equ=(n.length()==largs.length()); - - if (!equ) - { - ol.writeString(n.data()); - ol.docify(" "); - ol.insertMemberAlign(); - } - - if (mdef->name().contains("dummy")==0) - { - writeLink(mdef,ol); - } - if (equ) - { - ol.insertMemberAlign(); - } - ol.docify(" "); - VhdlDocGen::formatString(largs,ol,mdef); -} - -bool VhdlDocGen::findConstraintFile(LayoutNavEntry *lne) -{ - //LayoutNavEntry *cc = LayoutDocManager::instance().rootNavEntry()->find(LayoutNavEntry::Files); - - LayoutNavEntry *kk = lne->parent();// find(LayoutNavEntry::Files); - // LayoutNavEntry *kks = kk->parent();// find(LayoutNavEntry::Files); - QCString file; - QCString co("Constraints"); - - if (Config_getBool("HAVE_DOT") && Config_getEnum("DOT_IMAGE_FORMAT")=="svg") - { - QCString ov = theTranslator->trDesignOverview(); - QCString ofile("vhdl_design_overview"); - LayoutNavEntry *oo=new LayoutNavEntry( lne,LayoutNavEntry::MainPage,TRUE,ofile,ov,""); - kk->addChild(oo); - } - - FileNameListIterator fnli(*Doxygen::inputNameList); - FileName *fn; - for (fnli.toFirst();(fn=fnli.current());++fnli) - { - FileNameIterator fni(*fn); - FileDef *fd; - for (;(fd=fni.current());++fni) - { - if (fd->name().contains(".ucf") || fd->name().contains(".qsf")) - { - file = convertNameToFile(fd->name().data(),FALSE,FALSE); - LayoutNavEntry *ucf=new LayoutNavEntry(lne,LayoutNavEntry::MainPage,TRUE,file,co,""); - kk->addChild(ucf); - break; - } - } - } - return FALSE; -} - - -// for cell_inst : [entity] work.proto [ (label|expr) ] -QCString VhdlDocGen::parseForConfig(QCString & entity,QCString & arch) -{ - int index; - QCString label; - QCString ent("entity"); - if (!entity.contains(":")) return ""; - - QRegExp exp("[:()\\s]"); - QStringList ql=QStringList::split(exp,entity,FALSE); - //int ii=ql.findIndex(ent); - assert(ql.count()>=2); - label = ql[0].utf8(); - entity = ql[1].utf8(); - if ((index=entity.findRev("."))>=0) - { - entity.remove(0,index+1); - } - - if (ql.count()==3) - { - arch= ql[2].utf8(); - ql=QStringList::split(exp,arch,FALSE); - if (ql.count()>1) // expression - { - arch=""; - } - } - return label; // label -} - -// use (configuration|entity|open) work.test [(cellfor)]; - -QCString VhdlDocGen::parseForBinding(QCString & entity,QCString & arch) -{ - int index; - QRegExp exp("[()\\s]"); - - QCString label=""; - QStringList ql=QStringList::split(exp,entity,FALSE); - - if (ql.contains("open")) - { - return "open"; - } - - label=ql[0].utf8(); - - entity = ql[1].utf8(); - if ((index=entity.findRev("."))>=0) - { - entity.remove(0,index+1); - } - - if (ql.count()==3) - { - arch=ql[2].utf8(); - } - return label; -} - - - // find class with upper/lower letters - ClassDef* VhdlDocGen::findVhdlClass(const char *className ) - { - - ClassSDict::Iterator cli(*Doxygen::classSDict); - ClassDef *cd; - for (;(cd=cli.current());++cli) - { - if (qstricmp(className,cd->name().data())==0) - { - return cd; - } - } - return 0; - } - - -//@param arch bit0:flipflop -//@param binding e.g entity work.foo(bar) -//@param label |label0|label1 -// label0:architecture name -//@param confVhdl of configuration file (identifier::entity_name) or -// the architecture if isInlineConf TRUE -//@param isInlineConf -//@param confN List of configurations - -void assignBinding(VhdlConfNode * conf) +/*! adds documentation to a function/procedure */ +bool VhdlDocGen::writeDoc(EntryNav* rootNav) { - QList<Entry> instList= getVhdlInstList(); - QListIterator<Entry> eli(instList); - Entry *cur=0; - ClassDef *archClass=0,*entClass=0; - QCString archName,entityName; - QCString arcBind,entBind; - - bool others,all; - entBind=conf->binding; - QCString conf2=VhdlDocGen::parseForBinding(entBind,arcBind); - - if (qstricmp(conf2,"configuration")==0) + Entry *e=rootNav->entry(); + //if (e->section==Entry::Entry::OVERLOADDOC_SEC) + if (qstricmp(e->type.data(),"function")==0) { - QList<VhdlConfNode> confList = getVhdlConfiguration(); - VhdlConfNode* vconf; - // bool found=false; - for (uint iter=0;iter<confList.count(); iter++) - { - vconf= (VhdlConfNode *)confList.at(iter); - QCString n=VhdlDocGen::getIndexWord(vconf->confVhdl.data(),0); - if (n==entBind) - { - // found=true; - entBind=VhdlDocGen::getIndexWord(vconf->confVhdl.data(),1); - QCString a=VhdlDocGen::getIndexWord(conf->compSpec.data(),0); - QCString e=VhdlDocGen::getIndexWord(conf->confVhdl.data(),1); - a=e+"::"+a; - archClass= VhdlDocGen::findVhdlClass(a.data());//Doxygen::classSDict->find(a.data()); - entClass= VhdlDocGen::findVhdlClass(e.data());//Doxygen::classSDict->find(e.data()); - break; - } - } - } - else // conf2!=configuration - { - QCString a,c,e; - if (conf->isInlineConf) - { - c=conf->confVhdl; - e=VhdlDocGen::getIndexWord(conf->confVhdl.data(),0); - } - else - { - a=VhdlDocGen::getIndexWord(conf->compSpec.data(),0); - e=VhdlDocGen::getIndexWord(conf->confVhdl.data(),1); - c=e+"::"+a; - } - archClass= VhdlDocGen::findVhdlClass(c.data());//Doxygen::classSDict->find(a.data()); - entClass= VhdlDocGen::findVhdlClass(e.data()); //Doxygen::classSDict->find(e.data()); - } - - QCString label=conf->compSpec.lower(); - //label.prepend("|"); - - if (!archClass) - { - // err("architecture %s not found ! ",conf->confVhdl.data()); - return; + VhdlDocGen::addFuncDoc(rootNav); } - archName=archClass->name(); - QCString allOt=VhdlDocGen::getIndexWord(conf->arch.data(),0); - all=allOt.lower()=="all" ; - others= allOt.lower()=="others"; - - for (;(cur=eli.current());++eli) - { - if (cur->exception.lower()==label || conf->isInlineConf) - { - QCString sign,archy; - - if (all || others) - { - archy=VhdlDocGen::getIndexWord(conf->arch.data(),1); - } - else - { - archy=conf->arch; - } - - QCString inst1=VhdlDocGen::getIndexWord(archy.data(),0).lower(); - QCString comp=VhdlDocGen::getIndexWord(archy.data(),1).lower(); - - QStringList ql=QStringList::split(",",inst1); - - for (uint j=0;j<ql.count();j++) - { - QCString archy1,sign1; - if (all || others) - { - archy1=VhdlDocGen::getIndexWord(conf->arch.data(),1); - sign1=cur->type; - } - else - { - archy1=comp+":"+ql[j].utf8(); - sign1=cur->type+":"+cur->name; - } - - if (archy1==sign1.lower() && !cur->stat) - { - // fprintf(stderr," \n label [%s] [%s] [%s]",cur->exception.data(),cur->type.data(),cur->name.data()); - ClassDef *ent= VhdlDocGen::findVhdlClass(entBind.data());//Doxygen::classSDict->find(entBind.data()); - - if (entClass==0 || ent==0) - { - continue; - } - - addInstance(ent,archClass,entClass,cur); - cur->stat=TRUE; - break; - } - }// for - } - }//for each element in instList - -}//assignBinding - -/* - -// file foo.vhd -// enitity foo -// ..... -// end entity - -// file foo_arch.vhd -// architecture xxx of foo is -// ........ -// end architecture - -*/ -void VhdlDocGen::computeVhdlComponentRelations() -{ - - QCString entity,arch,inst; - QList<VhdlConfNode> confList = getVhdlConfiguration(); - - for (uint iter=0;iter<confList.count(); iter++) - { - VhdlConfNode* conf= (VhdlConfNode *)confList.at(iter); - if (!(conf->isInlineConf || conf->isLeaf)) - { - continue; - } - assignBinding(conf); - } - - QList<Entry> qsl= getVhdlInstList(); - QListIterator<Entry> eli(qsl); - Entry *cur; - - for (eli.toFirst();(cur=eli.current());++eli) - { - if (cur->stat ) // was bind - { - continue; - } - - if (cur->includeName=="entity" || cur->includeName=="component" ) - { - entity=cur->includeName+" "+cur->type; - QCString rr=VhdlDocGen::parseForBinding(entity,arch); - } - else if (cur->includeName.isEmpty()) - { - entity=cur->type; - } - - ClassDef *classEntity= VhdlDocGen::findVhdlClass(entity.data());//Doxygen::classSDict->find(entity); - inst=VhdlDocGen::getIndexWord(cur->args.data(),0); - ClassDef *cd=Doxygen::classSDict->find(inst); - ClassDef *ar=Doxygen::classSDict->find(cur->args); - - if (cd==0) - { - continue; - } - - // if (classEntity==0) - // err("%s:%d:Entity:%s%s",cur->fileName.data(),cur->startLine,entity.data()," could not be found"); - - addInstance(classEntity,ar,cd,cur); - } - -} - -static void addInstance(ClassDef* classEntity, ClassDef* ar, - ClassDef *cd , Entry *cur,ClassDef* /*archBind*/) -{ - - QCString bName,n1; - if (ar==0) return; - - if (classEntity==0) - { - //add component inst - n1=cur->type; - goto ferr; - } - - if (classEntity==cd) return; - - bName=classEntity->name(); - // fprintf(stderr,"\naddInstance %s to %s %s %s\n", classEntity->name().data(),cd->name().data(),ar->name().data(),cur->name); - n1=classEntity->name().data(); - - if (!cd->isBaseClass(classEntity, true, 0)) - { - cd->insertBaseClass(classEntity,n1,Public,Normal,0); - } - else - { - VhdlDocGen::addBaseClass(cd,classEntity); - } - - if (!VhdlDocGen::isSubClass(classEntity,cd,true,0)) - { - classEntity->insertSubClass(cd,Public,Normal,0); - classEntity->setLanguage(SrcLangExt_VHDL); - } - -ferr: - QCString uu=cur->name; - MemberDef *md=new MemberDef( - ar->getDefFileName(), cur->startLine,cur->startColumn, - n1,uu,uu, 0, - Public, Normal, cur->stat,Member, - MemberType_Variable, - 0, - 0); - - if (ar->getOutputFileBase()) - { - TagInfo tg; - tg.anchor = 0; - tg.fileName = ar->getOutputFileBase(); - tg.tagName = 0; - md->setTagInfo(&tg); - } - - //fprintf(stderr,"\n%s%s%s\n",md->name().data(),cur->brief.data(),cur->doc.data()); - - md->setLanguage(SrcLangExt_VHDL); - md->setMemberSpecifiers(VhdlDocGen::INSTANTIATION); - md->setBriefDescription(cur->brief,cur->briefFile,cur->briefLine); - md->setBodySegment(cur->startLine,-1) ; - md->setDocumentation(cur->doc.data(),cur->docFile.data(),cur->docLine); - FileDef *fd=ar->getFileDef(); - md->setBodyDef(fd); - - - QCString info="Info: Elaborating entity "+n1; - fd=ar->getFileDef(); - info+=" for hierarchy "; - QRegExp epr("[|]"); - QCString label=cur->type+":"+cur->write+":"+cur->name; - label.replace(epr,":"); - info+=label; - fprintf(stderr,"\n[%s:%d:%s]\n",fd->fileName().data(),cur->startLine,info.data()); - - - ar->insertMember(md); - -} - - -void VhdlDocGen::writeRecorUnit(QCString & largs,OutputList& ol ,const MemberDef *mdef) -{ - QStringList ql=QStringList::split("#",largs,FALSE); - uint len=ql.count(); - for(uint i=0;i<len;i++) - { - QCString n=ql[i].utf8(); - VhdlDocGen::formatString(n,ol,mdef); - if ((len-i)>1) ol.lineBreak(); - } -} - - -void VhdlDocGen::writeRecUnitDocu( - const MemberDef *md, - OutputList& ol, - QCString largs) -{ - - QStringList ql=QStringList::split("#",largs,FALSE); - uint len=ql.count(); - ol.startParameterList(TRUE); - bool first=TRUE; - for(uint i=0;i<len;i++) - { - QCString n=ql[i].utf8(); - ol.startParameterType(first,""); - ol.endParameterType(); - ol.startParameterName(TRUE); - VhdlDocGen::formatString(n,ol,md); - if ((len-i)>1) - { - ol.endParameterName(FALSE,FALSE,FALSE); - } - else - { - ol.endParameterName(TRUE,FALSE,TRUE); - } - - first=FALSE; - } -}//# - - - -bool VhdlDocGen::isSubClass(ClassDef* cd,ClassDef *scd, bool followInstances,int level) -{ - bool found=FALSE; - //printf("isBaseClass(cd=%s) looking for %s\n",name().data(),bcd->name().data()); - if (level>255) - { - err("Possible recursive class relation while inside %s and looking for %s\n",qPrint(cd->name()),qPrint(scd->name())); - abort(); - return FALSE; - } - - if (cd->subClasses()) - { - BaseClassListIterator bcli(*cd->subClasses()); - for ( ; bcli.current() && !found ; ++bcli) - { - ClassDef *ccd=bcli.current()->classDef; - if (!followInstances && ccd->templateMaster()) ccd=ccd->templateMaster(); - //printf("isSubClass() subclass %s\n",ccd->name().data()); - if (ccd==scd) - { - found=TRUE; - } - else - { - if (level <256) - { - found=ccd->isBaseClass(scd,followInstances,level+1); - } - } - } - } - return found; -} - -void VhdlDocGen::addBaseClass(ClassDef* cd,ClassDef *ent) -{ - if (cd->baseClasses()) - { - BaseClassListIterator bcli(*cd->baseClasses()); - for ( ; bcli.current() ; ++bcli) - { - ClassDef *ccd=bcli.current()->classDef; - if (ccd==ent) - { - QCString n = bcli.current()->usedName; - int i = n.find('('); - if(i<0) - { - bcli.current()->usedName.append("(2)"); - return; - } - static QRegExp reg("[0-9]+"); - QCString s=n.left(i); - QCString r=n.right(n.length()-i); - QCString t=r; - VhdlDocGen::deleteAllChars(r,')'); - VhdlDocGen::deleteAllChars(r,'('); - r.setNum(r.toInt()+1); - t.replace(reg,r.data()); - s.append(t.data()); - bcli.current()->usedName=s; - bcli.current()->templSpecifiers=t; - } - } - } -} - - -static QList<MemberDef> mdList; - -static MemberDef* findMemFlow(const MemberDef* mdef) -{ - for(uint j=0;j<mdList.count();j++) - { - MemberDef* md=(MemberDef*)mdList.at(j); - if (md->name()==mdef->name() && md->getStartBodyLine()==mdef->getStartBodyLine()) - return md; - } - return 0; -} - -void VhdlDocGen::createFlowChart(const MemberDef *mdef) -{ - if (mdef==0) return; - - QCString codeFragment; - MemberDef* mm=0; - if((mm=findMemFlow(mdef))!=0) - { - // don't create the same flowchart twice - VhdlDocGen::setFlowMember(mm); - return; - } - else - { - mdList.append(mdef); - } - - //fprintf(stderr,"\n create flow mem %s %p\n",mdef->name().data(),mdef); - - int actualStart= mdef->getStartBodyLine(); - int actualEnd=mdef->getEndBodyLine(); - FileDef* fd=mdef->getFileDef(); - bool b=readCodeFragment( fd->absFilePath().data(), actualStart,actualEnd,codeFragment); - if (!b) return; - - VHDLLanguageScanner *pIntf =(VHDLLanguageScanner*) Doxygen::parserManager->getParser(".vhd"); - VhdlDocGen::setFlowMember(mdef); - Entry root; - QStrList filesInSameTu; - pIntf->startTranslationUnit(""); - pIntf->parseInput("",codeFragment.data(),&root,FALSE,filesInSameTu); - pIntf->finishTranslationUnit(); -} - -bool VhdlDocGen::isConstraint(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::UCF_CONST; } -bool VhdlDocGen::isConfig(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::CONFIG; } -bool VhdlDocGen::isAlias(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::ALIAS; } -bool VhdlDocGen::isLibrary(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::LIBRARY; } -bool VhdlDocGen::isGeneric(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::GENERIC; } -bool VhdlDocGen::isPort(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::PORT; } -bool VhdlDocGen::isComponent(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::COMPONENT; } -bool VhdlDocGen::isPackage(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::USE; } -bool VhdlDocGen::isEntity(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::ENTITY; } -bool VhdlDocGen::isConstant(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::CONSTANT; } -bool VhdlDocGen::isVType(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::TYPE; } -bool VhdlDocGen::isSubType(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::SUBTYPE; } -bool VhdlDocGen::isVhdlFunction(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::FUNCTION; } -bool VhdlDocGen::isProcess(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::PROCESS; } -bool VhdlDocGen::isSignal(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::SIGNAL; } -bool VhdlDocGen::isAttribute(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::ATTRIBUTE; } -bool VhdlDocGen::isSignals(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::SIGNAL; } -bool VhdlDocGen::isProcedure(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::PROCEDURE; } -bool VhdlDocGen::isRecord(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::RECORD; } -bool VhdlDocGen::isArchitecture(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::ARCHITECTURE; } -bool VhdlDocGen::isUnit(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::UNITS; } -bool VhdlDocGen::isPackageBody(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::PACKAGE_BODY; } -bool VhdlDocGen::isVariable(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::SHAREDVARIABLE; } -bool VhdlDocGen::isFile(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::VFILE; } -bool VhdlDocGen::isGroup(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::GROUP; } -bool VhdlDocGen::isCompInst(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::INSTANTIATION; } -bool VhdlDocGen::isMisc(const MemberDef *mdef) -{ return mdef->getMemberSpecifiers()==VhdlDocGen::MISCELLANEOUS; } - - - -//############################## Flowcharts ################################################# - -#define STARTL (FlowChart::WHILE_NO | FlowChart::IF_NO | \ - FlowChart::FOR_NO | FlowChart::CASE_NO | \ - FlowChart::LOOP_NO | WHEN_NO) -#define DECLN (FlowChart::WHEN_NO | \ - FlowChart::ELSIF_NO | FlowChart::IF_NO | \ - FlowChart::FOR_NO | FlowChart::WHILE_NO | \ - FlowChart::CASE_NO | FlowChart::LOOP_NO ) -#define STARTFIN (FlowChart::START_NO | FlowChart::END_NO) -#define LOOP (FlowChart::FOR_NO | FlowChart::WHILE_NO | \ - FlowChart::LOOP_NO ) -#define ENDCL (FlowChart::END_CASE | FlowChart::END_LOOP) -#define EEND (FlowChart::ENDIF_NO | FlowChart::ELSE_NO ) -#define IFF (FlowChart::ELSIF_NO | FlowChart::IF_NO) -#define EXITNEXT (FlowChart::EXIT_NO | FlowChart::NEXT_NO ) -#define EMPTY (EEND | FlowChart::ELSIF_NO) -#define EE (FlowChart::ELSE_NO | FlowChart::ELSIF_NO) -#define EMPTNODE (ENDCL | EEND | FlowChart::ELSIF_NO) -#define FLOWLEN (flowList.count()-1) - -static int ifcounter=0; -static int nodeCounter=0; - -static struct -{ - // link colors - const char *textNodeLink; - const char *yesNodeLink; - const char *noNodeLink; - - // node colors - const char* comment; - const char* decisionNode; - const char* varNode; - const char *startEndNode; - const char* textNode; -} flowCol = -{ "green", // textNodeLink - "red", // yesNodeLink - "black", // noNodeLink - "khaki", // comment - "0.7 0.3 1.0", // decisionNode - "lightyellow", // varNode - "white", // startEndNode - "lightcyan" // textNode -}; - -QList<FlowChart> FlowChart::flowList; - -#ifdef DEBUGFLOW -static QMap<QCString,int> keyMap; -#endif - -void alignText(QCString & q) -{ - if (q.length()<=80) return; - - if (q.length()>200) - { - q.resize(200); - } - - q.append(" ..."); - - QRegExp reg("[\\s|]"); - QCString str(q.data()); - QCString temp; - - while (str.length()>80) - { - int j=str.findRev(reg,80); - if (j<=0) - { - temp+=str; - q=temp; - return; - } - else - { - QCString qcs=str.left(j); - temp+=qcs+"\\"; - temp+="n"; - str.remove(0,j); - } - }//while - - q=temp+str; -// #endif -} - -void FlowChart::printNode(const FlowChart* flo) -{ - if (flo==0) return; - QCString ui="-"; - QCString q,t; - QRegExp ep("[\t\n\r]"); - - ui.fill('-',255); - - if (flo->type & STARTL) - { - if (flo->stamp>0) - { - q=ui.left(2*flo->stamp); - } - else - { - q=" "; - } - QCString nn=flo->exp.stripWhiteSpace(); - printf("\nYES: %s%s[%d,%d]",q.data(),nn.data(),flo->stamp,flo->id); - } - else - { - if (flo->type & COMMENT_NO) - { - t=flo->label; - } - else - { - t=flo->text; - } - t=t.replace(ep,""); - if (t.isEmpty()) - { - t=" "; - } - if (flo->stamp>0) - { - q=ui.left(2*flo->stamp); - } - else - { - q=" "; - } - if (flo->type & EMPTNODE) - { - printf("\n NO: %s%s[%d,%d]",q.data(),FlowChart::getNodeType(flo->type),flo->stamp,flo->id); - } - else if (flo->type & COMMENT_NO) - { - printf("\n NO: %s%s[%d,%d]",t.data(),FlowChart::getNodeType(flo->type),flo->stamp,flo->id); - } - else - { - printf("\n NO: %s%s[%d,%d]",q.data(),t.data(),flo->stamp,flo->id); - } - } -} - -void FlowChart::printFlowTree() -{ - uint size=flowList.count(); - for (uint j=0;j<size;j++) - { - printNode(flowList.at(j)); - } -} - -void FlowChart::colTextNodes() -{ - QCString text; - FlowChart *flno; - bool found=FALSE; - for (uint j=0;j<flowList.count();j++) - { - FlowChart *flo=flowList.at(j); - if (flo->type&TEXT_NO) - { - text+=flo->text+'\n'; - if (!found) - { - flno=flo; - } - if (found) - { - flno->text+=flo->text; - flowList.remove(flo); - if (j>0) j=j-1; - } - found=TRUE; - } - else - found=FALSE; - } - - // find if..endif without text - // if..elseif without text - for (uint j=0;j<flowList.count()-1;j++) - { - FlowChart *flo=flowList.at(j); - int kind=flo->type; - if ( (kind & IFF) || (flo->type & ELSE_NO)) - { - FlowChart *ftemp=flowList.at(j+1); - if (ftemp->type & EMPTY) - { - FlowChart *fNew = new FlowChart(TEXT_NO,"empty ",0); - fNew->stamp=flo->stamp; - flowList.insert(j+1,fNew); - } - } - } - -}// colTextNode - -QCString FlowChart::getNodeName(int n) -{ - QCString node; - node.setNum(n); - return node.prepend("node"); -} - -void FlowChart::delFlowList() -{ - ifcounter=0; - nodeCounter=0; - uint size=flowList.count(); - - for (uint j=0;j <size ;j++) - { - FlowChart *fll=flowList.at(j); - delete fll; - } - flowList.clear(); -} - -void FlowChart::alignCommentNode(FTextStream &t,QCString com) -{ - uint max=0; - QCString s; - QStringList ql=QStringList::split("\n",com); - for (uint j=0;j<ql.count();j++) - { - s=(QCString)ql[j].utf8(); - if (max<s.length()) max=s.length(); - } - - s=ql.last().utf8(); - int diff=max-s.length(); - - QCString n(1); - if (diff>0) - { - n.fill(' ',2*diff); - n.append("."); - s+=n; - ql.remove(ql.last()); - ql.append(s); - } - - for (uint j=0;j<ql.count();j++) - { - s=(QCString)ql[j].utf8(); - if (j<ql.count()-1) - { - s+="\n"; - } - FlowChart::codify(t,s.data()); - } -} - - -void FlowChart::buildCommentNodes(FTextStream & t) -{ - uint size=flowList.count(); - bool begin=false; - - for (uint j=0;j < size-1 ;j++) - { - FlowChart *fll=flowList.at(j); - if (fll->type & COMMENT_NO) - { - FlowChart* to=flowList.at(j+1); - if (to->type & COMMENT_NO) - { - fll->label+="\n"; - QCString temp=fll->label+to->label; - to->label=temp; - flowList.remove(j); - size--; - if (j>0) j--; - } - } - }// for - - for (uint j=0;j <flowList.count() ;j++) - { - FlowChart *fll=flowList.at(j); - - if (fll->type & BEGIN_NO) - { - begin = true; - continue; - } - - if (fll->type & COMMENT_NO) - { - FlowChart* to; - if (!begin) - { - // comment between function/process .. begin is linked to start node - to=flowList.at(0); - } - else - { - if (j>0 && flowList.at(j-1)->line==fll->line) - to=flowList.at(j-1); - else - to=flowList.at(j+1); - } - t << getNodeName(fll->id); - t << "[shape=none, label=<\n"; - t << "<TABLE BORDER=\"0\" CELLBORDER=\"1\" CELLSPACING=\"0\" CELLPADDING=\"2\" >\n "; - t << "<TR><TD BGCOLOR=\""; - t << flowCol.comment; - t << "\" > "; - - FlowChart::alignCommentNode(t,fll->label); - t << " </TD></TR></TABLE>>];"; - writeEdge(t,fll->id,to->id,2); - } - }// for - - // delete comment nodes; - size=flowList.count(); - for (uint j=0;j < size;j++) - { - FlowChart *fll=flowList.at(j); - if (fll->type & (COMMENT_NO | BEGIN_NO)) - { - flowList.remove(j); - delete fll; - fll=0; - size--; - if (j>0) j--; - } - }// for; -} - -void FlowChart::codify(FTextStream &t,const char *str) -{ - if (str) - { - const char *p=str; - char c; - while (*p) - { - c=*p++; - switch(c) - { - case '<': t << "<"; break; - case '>': t << ">"; break; - case '&': t << "&"; break; - case '\'': t << "'"; break; - case '"': t << """; break; - case '\n': t <<"<BR ALIGN=\"LEFT\"/>"; break; - default: t << c; break; - } - } - } -}//codify - -FlowChart::~FlowChart() -{ -} - -FlowChart::FlowChart(int typ,const char * t,const char* ex,const char* lab) -{ - stamp=ifcounter; - - if (typ & STARTL) - { - ifcounter++; - } - - text=t; - exp=ex; - type=typ; - label=lab; - - if (typ & (ELSE_NO | ELSIF_NO)) - { - stamp--; - } - - if (typ & (START_NO | END_NO | VARIABLE_NO)) - { - stamp=0; - } - - id=nodeCounter++; -} - -void FlowChart::addFlowChart(int type,const char* text,const char* exp, const char *label) -{ - static QRegExp reg("[;]"); - static QRegExp reg1("[\"]"); - - if (!VhdlDocGen::getFlowMember()) return; - - QCString typeString(text); - QCString expression(exp); - - - if (text) - { - typeString=typeString.replace(reg,"\n"); - } - - if (exp) - { - expression=expression.replace(reg1,"\\\""); - } - - FlowChart *fl=new FlowChart(type,typeString.data(),expression.data(),label); - - fl->line=getVhdlCont()->yyLineNr; - - if (type & (START_NO | VARIABLE_NO)) - { - flowList.prepend(fl); - } - else - { - flowList.append(fl); - } - -} - -void FlowChart::moveToPrevLevel() -{ - if (!VhdlDocGen::getFlowMember()) return; - ifcounter--; -} - - -QCString FlowChart::convertNameToFileName() -{ - static QRegExp exp ("[^][a-z_A-Z0-9]"); - QCString temp,qcs; - const MemberDef* md=VhdlDocGen::getFlowMember(); - - temp.sprintf("%p",md); - qcs=md->name(); - - if (qcs.find(exp,0)>=0) - { - qcs.prepend("Z"); - qcs=qcs.replace(exp,"_"); - } - - return qcs+temp; -} - -const char* FlowChart::getNodeType(int c) -{ - switch(c) - { - case IF_NO: return "if "; - case ELSIF_NO: return "elsif "; - case ELSE_NO: return "else "; - case CASE_NO: return "case "; - case WHEN_NO: return "when "; - case EXIT_NO: return "exit "; - case END_NO: return "end "; - case TEXT_NO: return "text "; - case START_NO: return "start "; - case ENDIF_NO: return "endif "; - case FOR_NO: return "for "; - case WHILE_NO: return "while "; - case END_LOOP: return "end_loop "; - case END_CASE: return "end_case "; - case VARIABLE_NO: return "variable_decl "; - case RETURN_NO: return "return "; - case LOOP_NO: return "infinte loop "; - case NEXT_NO: return "next "; - case COMMENT_NO: return "comment "; - case EMPTY_NO: return "empty "; - case BEGIN_NO: return "<begin> "; - default: return "--failure--"; - } -} - -void FlowChart::createSVG() -{ - QCString qcs("/"); - QCString ov = Config_getString("HTML_OUTPUT"); - - qcs+=FlowChart::convertNameToFileName()+".svg"; - - //const MemberDef *m=VhdlDocGen::getFlowMember(); - //if (m) - // fprintf(stderr,"\n creating flowchart : %s %s in file %s \n",VhdlDocGen::trTypeString(m->getMemberSpecifiers()),m->name().data(),m->getFileDef()->name().data()); - - QCString dir=" -o "+ov+qcs; - ov+="/flow_design.dot"; - - QCString vlargs="-Tsvg "+ov+dir ; - QCString dotExe = Config_getString("DOT_PATH")+"dot"; - - if (portable_system(dotExe,vlargs)!=0) - { - err("could not create dot file"); - } -} - -void FlowChart::startDot(FTextStream &t) -{ - t << " digraph G { \n"; - t << "rankdir=TB \n"; - t << "concentrate=true\n"; - t << "stylesheet=\"doxygen.css\"\n"; -} - -void FlowChart::endDot(FTextStream &t) -{ - t << " } \n"; -} - -void FlowChart::writeFlowChart() -{ - // assert(VhdlDocGen::flowMember); - - QCString ov = Config_getString("HTML_OUTPUT"); - QCString fileName = ov+"/flow_design.dot"; - QFile f(fileName); - FTextStream t(&f); - - if (!f.open(IO_WriteOnly)) - { - err("Cannot open file %s for writing\n",fileName.data()); - return; - } - - colTextNodes(); - -#ifdef DEBUGFLOW - printFlowTree(); -#endif - - startDot(t); - buildCommentNodes(t); - - uint size=flowList.count(); - - for (uint j=0;j <size ;j++) - { - FlowChart *fll=flowList.at(j); - writeShape(t,fll); - } - writeFlowLinks(t); - - FlowChart::endDot(t); - delFlowList(); - f.close(); - FlowChart::createSVG(); -}// writeFlowChart - -void FlowChart::writeShape(FTextStream &t,const FlowChart* fl) -{ - if (fl->type & EEND) return; - QCString var; - if (fl->type & LOOP) - { - var=" loop"; - } - else if (fl->type & IFF) - { - var=" then"; - } - else - { - var=""; - } - - t<<getNodeName(fl->id).data(); - QCString q=getNodeType(fl->type); - -#ifdef DEBUGFLOW - QCString qq(getNodeName(fl->id).data()); - keyMap.insert(qq,fl->id); -#endif - - bool dec=(fl->type & DECLN); - bool exit=(fl->type & EXITNEXT); - if (exit && !fl->exp.isEmpty()) - { - dec=TRUE; - } - if (dec) - { - QCString exp=fl->exp; - alignText(exp); - - t << " [shape=diamond,style=filled,color=\""; - t << flowCol.decisionNode; - t << "\",label=\" "; - QCString kl; - if (exit) kl=fl->text+" "; - - if (fl->label) - { - kl+=fl->label+":"+exp+var; - } - else - { - kl+=exp+var; - } - - FlowChart::alignCommentNode(t,kl); - t << "\"]\n"; - } - else if (fl->type & ENDCL) - { - QCString val=fl->text; - t << " [shape=ellipse ,label=\""+val+"\"]\n"; - } - else if (fl->type & STARTFIN) - { - QCString val=fl->text; - t << "[shape=box , style=rounded label=<\n"; - t << "<TABLE BORDER=\"0\" CELLBORDER=\"0\" CELLSPACING=\"0\" CELLPADDING=\"0\" >\n "; - t << "<TR><TD BGCOLOR=\""; - t<< flowCol.startEndNode; - t<< "\"> "; - FlowChart::alignCommentNode(t,val); - t << " </TD></TR></TABLE>>];"; - } - else - { - if (fl->text.isEmpty()) return; - bool var=(fl->type & FlowChart::VARIABLE_NO); - QCString repl("<BR ALIGN=\"LEFT\"/>"); - QCString q=fl->text; - - if (exit) - { - q+=" "+fl->label; - } - - int z=q.findRev("\n"); - - if (z==(int)q.length()-1) - { - q=q.remove(z,2); - } - t << "[shape=none margin=0.1, label=<\n"; - t << "<TABLE BORDER=\"0\" CELLBORDER=\"1\" CELLSPACING=\"0\" CELLPADDING=\"2\" >\n "; - if (var) - { - t << "<TR><TD BGCOLOR=\"" << flowCol.varNode << "\" > "; - } - else - { - t << "<TR><TD BGCOLOR=\"" << flowCol.textNode << "\" > "; - } - FlowChart::alignCommentNode(t,q); - t << " </TD></TR></TABLE>>];"; - } -} + return FALSE; +}// writeDoc -void FlowChart::writeEdge(FTextStream &t,const FlowChart* fl_from,const FlowChart* fl_to,int i) -{ - bool b=fl_from->type & STARTL; - bool c=fl_to->type & STARTL; - -#ifdef DEBUGFLOW - QCString s1(getNodeName(fl_from->id).data()); - QCString s2(getNodeName(fl_to->id).data()); - QMap<QCString, int>::Iterator it = keyMap.find(s1); - QMap<QCString, int>::Iterator it1 = keyMap.find(s2); - // checks if the link is connected to a valid node - assert(it.key()); - assert(it1.key()); -#endif - - writeEdge(t,fl_from->id,fl_to->id,i,b,c); -} +/* do not insert the same component twice */ -void FlowChart::writeEdge(FTextStream &t,int fl_from,int fl_to,int i,bool bFrom,bool bTo) +bool VhdlDocGen::foundInsertedComponent(const QCString & name,Entry* root) { - QCString label,col; - - if (i==0) - { - col=flowCol.yesNodeLink; - label="yes"; - } - else if (i==1) + QListIterator<BaseInfo> bii(*root->extends); + BaseInfo *bi=0; + for (bii.toFirst();(bi=bii.current());++bii) { - col=flowCol.noNodeLink; - label="no"; - } - else - { - col=flowCol.textNodeLink; - label=""; - } - - t << "edge [color=\""+col+"\",label=\""+label+"\"]\n"; - t << getNodeName(fl_from).data(); - if (bFrom) t << ":s"; - t << "->"; - t << getNodeName(fl_to).data(); - if (bTo) t << ":n"; - t << "\n"; -} - -void FlowChart::alignFuncProc( QCString & q,const ArgumentList* al,bool isFunc) -{ - if (al==0) return; - - ArgumentListIterator ali(*al); - int index=ali.count(); - if (index==0) return; - - int len=q.length()+VhdlDocGen::getFlowMember()->name().length(); - QCString prev,temp; - prev.fill(' ',len+1); - - Argument *arg; - q+="\n"; - for (;(arg=ali.current());++ali) - { - QCString attl=arg->defval+" "; - attl+=arg->name+" "; - - if (!isFunc) + if (bi->name==name) { - attl+=arg->attrib+" "; + return TRUE; // } - else - { - attl+=" in "; - } - attl+=arg->type; - if (--index) attl+=",\n"; else attl+="\n"; - - attl.prepend(prev.data()); - temp+=attl; } - q+=temp; -} + return FALSE; +}// found component -int FlowChart::findNextLoop(int index,int stamp) -{ - for (uint j=index+1;j<flowList.count();j++) - { - FlowChart *flo=flowList.at(j); - if (flo->stamp==stamp) - { - continue; - } - if (flo->type&END_LOOP) - { - return j; - } - } - return flowList.count()-1; -} +/*! writes a link if the string is linkable else a formatted string */ -int FlowChart::findPrevLoop(int index,int stamp,bool endif) +void VhdlDocGen::writeStringLink(const MemberDef *mdef,QCString mem, OutputList& ol) { - for (uint j=index;j>0;j--) + if (mdef) { - FlowChart *flo=flowList.at(j); - if (flo->type & LOOP) + ClassDef *cd=mdef->getClassDef(); + if (cd) { - if (flo->stamp==stamp && endif) - { - return j; - } - else + QCString n=cd->name(); + MemberDef* memdef=VhdlDocGen::findMember(n,mem); + if (memdef && memdef->isLinkable()) { - if (flo->stamp<stamp) - { - return j; - } + ol.startBold(); + writeLink(memdef,ol); + ol.endBold(); + ol.docify(" "); + return; } } } - return flowList.count()-1; -} + VhdlDocGen::startFonts(mem,"vhdlchar",ol); +}// found component -int FlowChart::findLabel(int index,QCString &label) +void VhdlDocGen::writeCodeFragment( MemberDef *mdef,OutputList& ol) { - for (uint j=index;j>0;j--) - { - FlowChart *flo=flowList.at(j); - if ((flo->type & LOOP) && !flo->label.isEmpty() && qstricmp(flo->label,label)==0) - { - return j; - } - } - err("could not find label: ",label.data()); - return 0; -} + // Definition d=(Definition)mdef; + // QCString fdd=mdef->getDefFileExtension(); + // QCString scope=mdef->getScopeString(); + QCString codeFragment=mdef->documentation(); + //FileDef *fd=mdef->getFileDef(); -int FlowChart::findNode(int index,int stamp,int type) -{ - for (uint j=index+1;j<flowList.count();j++) - { - FlowChart *flo=flowList.at(j); - if (flo->type==type && flo->stamp==stamp) - { - return j; - } - } - return 0; -}// findNode + //int start=mdef->getStartBodyLine(); + //int end=mdef->getEndBodyLine(); + QStringList qsl=QStringList::split("\n",codeFragment); -int FlowChart::getNextNode(int index,int stamp) -{ - for (uint j=index+1;j<flowList.count();j++) + writeLink(mdef,ol); + ol.docify(" "); + ol.insertMemberAlign(); + int len = qsl.count(); + int j; + for (j=0;j<len;j++) { - FlowChart *flo=flowList.at(j); - int kind=flo->type; - int s=flo->stamp; - if (s>stamp) - { - continue; - } - if (kind & ENDIF_NO) - { - if (s<stamp && stamp>0) - { - stamp--; - continue; - } - } - if (kind & (ELSE_NO | ELSIF_NO)) - { - if (s<stamp && stamp>0) - { - stamp--; - } - j=findNode(j,stamp,ENDIF_NO); - continue; - } - if (kind & WHEN_NO) + QCString q=qsl[j].utf8(); + VhdlDocGen::writeFormatString(q,ol,mdef); + ol.lineBreak(); + if (j==2) // only the first three lines are shown { - if (s<stamp && stamp>0) - { - stamp--; - } - return findNode(j,stamp-1,END_CASE); + q="..."; + VhdlDocGen::writeFormatString(q,ol,mdef); + break; } - return j; } - return FLOWLEN; } -int FlowChart::getNextIfLink(const FlowChart* fl,uint index) +void VhdlDocGen::writeSource(MemberDef *mdef,OutputList& ol,QCString & cname) { - int stamp=fl->stamp; - uint start = index+1; - int endifNode = findNode(start,stamp,ENDIF_NO); - int elseifNode = findNode(start,stamp,ELSIF_NO); - int elseNode = findNode(start,stamp,ELSE_NO); - - assert(endifNode>-1); + // Definition d=(Definition)mdef; + QCString fdd=mdef->getDefFileExtension(); + QCString scope=mdef->getScopeString(); + QCString codeFragment=mdef->documentation(); + FileDef *fd=mdef->getFileDef(); + int start=mdef->getStartBodyLine(); + int end=mdef->getEndBodyLine(); + QStringList qsl=QStringList::split("\n",codeFragment); - if (elseifNode>0 && elseifNode<endifNode) - { - return elseifNode; - } + ParserInterface *pIntf = Doxygen::parserManager->getParser(fdd.data()); + pIntf->resetCodeParserState(); - if (elseNode>0 && elseNode<endifNode) - { - return elseNode+1; - } + ol.startParagraph(); + ol.startCodeFragment(); + pIntf->parseCode(ol, // codeOutIntf + scope, // scope + codeFragment, // input + SrcLangExt_VHDL, // lang + FALSE, // isExample + 0, // exampleName + fd, // fileDef + start, // startLine + end, // endLine + TRUE, // inlineFragment + mdef, // memberDef + FALSE // show line numbers + ); + ol.endCodeFragment(); + ol.endParagraph(); - stamp=flowList.at(endifNode)->stamp; - return getNextNode(endifNode,stamp); + mdef->writeSourceDef(ol,cname); + mdef->writeSourceRefs(ol,cname); + mdef->writeSourceReffedBy(ol,cname); } -void FlowChart::writeFlowLinks(FTextStream &t) -{ - uint size=flowList.count(); - if (size<2) return; - - // write start link - writeEdge(t,flowList.at(0),flowList.at(1),2); - - for (uint j=0;j<size;j++) - { - FlowChart *fll=flowList.at(j); - int kind=fll->type; - int stamp=fll->stamp; - if (kind & EEND) - { - continue; - } - - if (kind & IFF) - { - writeEdge(t,fll,flowList.at(j+1),0); - int z=getNextIfLink(fll,j); - // assert(z>-1); - writeEdge(t,fll,flowList.at(z),1); - } - else if (kind & LOOP_NO) - { - writeEdge(t,fll,flowList.at(j+1),2); - continue; - } - else if (kind & (CASE_NO | FOR_NO | WHILE_NO)) - { - if (kind & CASE_NO) - { - writeEdge(t,fll,flowList.at(j+1),2); - continue; - } - else - { - writeEdge(t,fll,flowList.at(j+1),0); - } - - kind=END_LOOP; - int z=findNode(j+1,fll->stamp,kind); - z=getNextNode(z,flowList.at(z)->stamp); - - // assert(z>-1); - writeEdge(t,fll,flowList.at(z),1); - continue; - } - else if (kind & (TEXT_NO | VARIABLE_NO)) - { - int z=getNextNode(j,stamp); - writeEdge(t,fll,flowList.at(z),2); - } - else if (kind & WHEN_NO) - { - // default value - if (qstricmp(fll->text.simplifyWhiteSpace().data(),"others")==0) - { - writeEdge(t,fll,flowList.at(j+1),2); - continue; - } - - - writeEdge(t,fll,flowList.at(j+1),0); - int u=findNode(j,stamp,WHEN_NO); - int v=findNode(j,stamp-1,END_CASE); - - if (u>0 && u<v) - { - writeEdge(t,fll,flowList.at(u),1); - } - else - { - writeEdge(t,fll,flowList.at(v),1); - } - } - else if (kind & END_CASE) - { - int z=FlowChart::getNextNode(j,fll->stamp); - writeEdge(t,fll,flowList.at(z),2); - } - else if (kind & END_LOOP) - { - int z=findPrevLoop(j,fll->stamp,true); - writeEdge(t,fll,flowList.at(z),2); - } - else if (kind & RETURN_NO) - { - writeEdge(t,fll,FlowChart::flowList.at(size-1),2); - } - else if (kind & (EXIT_NO | NEXT_NO)) - { - int z; - bool b = kind==NEXT_NO; - if (fll->exp) - { - writeEdge(t,fll,flowList.at(j+1),1); - } - if (!fll->label.isEmpty()) - { - z=findLabel(j,fll->label); - if (b) - { - writeEdge(t,fll,flowList.at(z),0); - } - else - { - z=findNode(z,flowList.at(z)->stamp,END_LOOP); - z=getNextNode(z,flowList.at(z)->stamp); - writeEdge(t,fll,flowList.at(z),0); - } - continue; - } - else - { - if (b) - { - z=findPrevLoop(j,fll->stamp); - writeEdge(t,fll,flowList.at(z),0); - continue; - } - else - { - z =findNextLoop(j,fll->stamp-1); - } - z=getNextNode(z,flowList.at(z)->stamp); - } - writeEdge(t,fll,flowList.at(z),0); - } - } //for -} //writeFlowLinks - diff --git a/src/vhdldocgen.h b/src/vhdldocgen.h index 45ceb06..5b09bae 100644 --- a/src/vhdldocgen.h +++ b/src/vhdldocgen.h @@ -1,10 +1,12 @@ /****************************************************************************** * + * + * * Copyright (C) 1997-2014 by Dimitri van Heesch. * * Permission to use, copy, modify, and distribute this software and its - * documentation under the terms of the GNU General Public License is hereby - * granted. No representations are made about the suitability of this software + * documentation under the terms of the GNU General Public License is hereby + * granted. No representations are made about the suitability of this software * for any purpose. It is provided "as is" without express or implied warranty. * See the GNU General Public License for more details. * @@ -16,31 +18,27 @@ #ifndef VHDLDOCGEN_H #define VHDLDOCGEN_H -/** - * This class implements functions for parsing and generating +/** + * This class implements functions for parsing and generating * vhdl documents */ #include <qdict.h> +#include <qlist.h> #include <qcstring.h> -#include "layout.h" -#include "arguments.h" -#include "entry.h" +#include "memberlist.h" + +class QStringList; class Entry; +class ClassSDict; +class FileStorage; +class EntryNav; class ClassDef; -class MemberList; class MemberDef; -class FTextStream; -class OutputList; -class Definition; -class GroupDef; -class FileDef; -class NamespaceDef; struct Argument; -/** Class for generating documentation specific for VHDL */ -class VhdlDocGen +class VhdlDocGen { public: @@ -51,7 +49,6 @@ class VhdlDocGen ARCHITECTURECLASS, // Overlays: Private PACKAGECLASS // Overlays: Package }; - enum VhdlKeyWords { LIBRARY=1, @@ -71,11 +68,12 @@ class VhdlDocGen USE, PROCESS, PORT, - UNITS, + DOCUMENT, //18 0x12 + UNITS, GENERIC, - INSTANTIATION, + COMPONENT_INST, GROUP, - VFILE, + VFILE, SHAREDVARIABLE, CONFIG, ALIAS, @@ -86,16 +84,18 @@ class VhdlDocGen VhdlDocGen(); virtual ~VhdlDocGen(); static void init(); - static QCString convertFileNameToClassName(QCString name); - // --- used by vhdlscanner.l ----------- - - static bool isSubClass(ClassDef* cd,ClassDef *scd, bool followInstances,int level); + // --- used by vhdlscanner.l ----------- static QCString getIndexWord(const char* ,int index); + static bool foundInsertedComponent(const QCString& name,Entry* root); static bool deleteCharRev(QCString &s,char c); + static bool isFunctionProto(QCString& ss); + static Entry* findFunction(Entry* func); static void deleteAllChars(QCString &s,char c); + static bool getSigName(QList<QCString>& ql, const char* str,QCString& buffer); + static bool getSigTypeName(QList<QCString>& ql,const char* str,QCString& buffer); static void parseFuncProto(const char* text, - QList<Argument>& , + QList<Argument>& , QCString& name, QCString& ret, bool doc=false); @@ -104,9 +104,15 @@ class VhdlDocGen static void computeVhdlComponentRelations(); static QCString* findKeyWord(const QCString& word); + static void addFuncDoc(EntryNav* root); + + //static void MapArchitecturesToEntity(Entry* cur_root); + + //static void MapComponentToEntity(const ClassSDict*); + static ClassDef* findComponent(int type); static ClassDef* getPackageName(const QCString& name); - static MemberDef* findMember(const QCString& className, + static MemberDef* findMember(const QCString& className, const QCString& memName); static void findAllPackages(const QCString& className, QDict<QCString>&); @@ -114,44 +120,73 @@ class VhdlDocGen const QCString& key, MemberListType type); static ClassDef *getClass(const char *name); + static Entry* findFunction(Entry* root,Entry* func); static MemberDef* findFunction(const QList<Argument> &ql, const QCString& name, const QCString& package, bool type); + static bool compareString(const QCString& s1, + const QCString& s2); static QCString getClassTitle(const ClassDef*); static void writeInlineClassLink(const ClassDef*, OutputList &ol); - static bool isConstraint(const MemberDef *mdef); - static bool isConfig(const MemberDef *mdef); - static bool isAlias(const MemberDef *mdef); - static bool isLibrary(const MemberDef *mdef); - static bool isGeneric(const MemberDef *mdef); - static bool isPort(const MemberDef *mdef); - static bool isComponent(const MemberDef *mdef); - static bool isPackage(const MemberDef *mdef); - static bool isEntity(const MemberDef *mdef); - static bool isConstant(const MemberDef *mdef); - static bool isVType(const MemberDef *mdef); - static bool isSubType(const MemberDef *mdef); - static bool isVhdlFunction(const MemberDef *mdef); - static bool isProcess(const MemberDef *mdef); - static bool isSignal(const MemberDef *mdef); - static bool isAttribute(const MemberDef *mdef); - static bool isSignals(const MemberDef *mdef); - static bool isProcedure(const MemberDef *mdef); - static bool isRecord(const MemberDef *mdef); - static bool isArchitecture(const MemberDef *mdef); - static bool isUnit(const MemberDef *mdef); - static bool isPackageBody(const MemberDef *mdef); - static bool isVariable(const MemberDef *mdef); - static bool isFile(const MemberDef *mdef); - static bool isGroup(const MemberDef *mdef); - static bool isCompInst(const MemberDef *mdef); - static bool isMisc(const MemberDef *mdef); + //static void writeVhdlComponentList(OutputList &ol,int type); + static bool isMisc(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::MISCELLANEOUS; } + static bool isConfig(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::CONFIG; } + static bool isAlias(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::ALIAS; } + static bool isLibrary(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::LIBRARY; } + static bool isGeneric(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::GENERIC; } + static bool isPort(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::PORT; } + static bool isComponent(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::COMPONENT; } + static bool isPackage(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::USE; } + static bool isEntity(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::ENTITY; } + static bool isConstant(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::CONSTANT; } + static bool isVType(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::TYPE; } + static bool isSubType(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::SUBTYPE; } + static bool isVhdlFunction(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::FUNCTION; } + static bool isProcess(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::PROCESS; } + static bool isSignal(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::SIGNAL; } + static bool isAttribute(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::ATTRIBUTE; } + static bool isSignals(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::SIGNAL; } + static bool isProcedure(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::PROCEDURE; } + static bool isRecord(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::RECORD; } + static bool isArchitecture(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::ARCHITECTURE; } + static bool isUnit(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::UNITS; } + static bool isPackageBody(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::PACKAGE_BODY; } + static bool isVariable(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::SHAREDVARIABLE; } + static bool isFile(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::VFILE; } + static bool isGroup(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::GROUP; } + static bool isCompInst(const MemberDef *mdef) + { return mdef->getMemberSpecifiers()==VhdlDocGen::COMPONENT_INST; } //----------------------------------------------------- // translatable items - + static QCString trTypeString(uint64 type); static QCString trVhdlType(uint64 type,bool sing=true); @@ -176,10 +211,17 @@ class VhdlDocGen // trFunctions static QCString trFunctionAndProc(); + //----------------------------------------------------- static void prepareComment(QCString&); - static void formatString(const QCString&,OutputList& ol,const MemberDef*); + static QCString getpackname(const char* text, + const char* word, + const char* patter); + static void parseProcessProto(const char* text, + QCString&, + QStringList&); + static void formatString(QCString&,OutputList& ol,const MemberDef*); static void writeFormatString(const QCString&,OutputList& ol,const MemberDef*); static void writeFunctionProto(OutputList& ol,const ArgumentList *al,const MemberDef*); @@ -188,6 +230,10 @@ class VhdlDocGen static bool writeFuncProcDocu(const MemberDef *mdef, OutputList& ol,const ArgumentList* al,bool type=false); static void writeRecordProto(const MemberDef *mdef, OutputList& ol,const ArgumentList *al); + static QCString convertArgumentListToString(const ArgumentList* al,bool f); + static QCString getProcessNumber(); + static QCString getRecordNumber(); + static bool writeVHDLTypeDocumentation(const MemberDef* mdef, const Definition* d, OutputList &ol); static void writeVhdlDeclarations(MemberList*,OutputList&,GroupDef*,ClassDef*,FileDef*,NamespaceDef*); @@ -203,144 +249,28 @@ class VhdlDocGen ClassDef *cd,NamespaceDef *nd,FileDef *fd,GroupDef *gd, const char *title,const char *subtitle,bool showEnumValues,int type); - static bool writeClassType(ClassDef *&,OutputList &ol ,QCString & cname); - - static QCString convertArgumentListToString(const ArgumentList* al,bool f); - static QCString getProcessNumber(); - static QCString getRecordNumber(); - static QCString getClassName(const ClassDef*); + static bool writeClassType(ClassDef *,OutputList &ol ,QCString & cname); + static void adjustRecordMember(MemberDef *mdef); + static bool writeDoc(EntryNav* rootNav); + + static void writeLink(const MemberDef* mdef,OutputList &ol); + static void adjustMemberName(QCString& nn); + static bool membersHaveSpecificType(MemberList *ml,uint64 type); + static void startFonts(const QCString& q, const char *keyword,OutputList& ol); static bool isNumber(const QCString& s); static QCString getProtectionName(int prot); - - static void parseUCF(const char* input,Entry* entity,QCString f,bool vendor); - static bool findConstraintFile( LayoutNavEntry *lne); - - static ClassDef* findArchitecture(const ClassDef *cd); - static ClassDef* findArchitecture(QCString identifier, QCString entity_name); - - - static void writeSource(MemberDef *mdef,OutputList& ol,QCString & cname); - static void writeAlphbeticalClass(OutputList& ol,const ClassDef* cd,const QCString &); - - static QCString parseForConfig(QCString & entity,QCString & arch); - static QCString parseForBinding(QCString & entity,QCString & arch); - static void addBaseClass(ClassDef* cd,ClassDef *ent); - static ClassDef* findVhdlClass(const char *className ); - - static void writeOverview(OutputList &ol); - static void writeOverview(); - - // flowcharts - static void createFlowChart(const MemberDef*); - //static void addFlowImage(const FTextStream &,const QCString &); - - static void setFlowMember( const MemberDef *flowMember); - static const MemberDef *getFlowMember(); - - static bool isVhdlClass (const Entry *cu) - { - return cu->spec==VhdlDocGen::ENTITY || - cu->spec==VhdlDocGen::PACKAGE || - cu->spec==VhdlDocGen::ARCHITECTURE || - cu->spec==VhdlDocGen::PACKAGE_BODY; - } - - + static void writeSource(MemberDef *mdef,OutputList& ol,QCString &); + static void writeRecorUnit(QCString & largs,OutputList& ol ,const MemberDef *mdef); private: - static void findAllArchitectures(QList<QCString>& ql,const ClassDef *cd); + static void getFuncParams(QList<Argument>&, const char* str); static bool compareArgList(ArgumentList*,ArgumentList*); static void writeVhdlLink(const ClassDef* cdd ,OutputList& ol,QCString& type,QCString& name,QCString& beh); + static void findAllArchitectures(QList<QCString>& ql,const ClassDef *cd); static void writeStringLink(const MemberDef *mdef,QCString mem,OutputList& ol); - static void writeRecUnitDocu( const MemberDef *md, OutputList& ol,QCString largs); - static void writeRecorUnit(QCString & largs,OutputList& ol ,const MemberDef *mdef); -}; - -//------------------------------------------------------------------------------------------------------------------- -//-------------- VHDL Flowcharts ------------------------------------------------------------------------------- -//------------------------------------------------------------------------------------------------------------------- - - -//#define DEBUGFLOW - -class FlowChart -{ - public: - enum nodeTypes { - IF_NO = 1<<1, - ELSIF_NO = 1<<2, - ELSE_NO = 1<<3, - CASE_NO = 1<<4, - WHEN_NO = 1<<5, - EXIT_NO = 1<<6, - END_NO = 1<<7, - TEXT_NO = 1<<8, - START_NO = 1<<9, - ENDIF_NO = 1<<10, - FOR_NO = 1<<11, - WHILE_NO = 1<<12, - END_LOOP = 1<<13, - END_CASE = 1<<14, - VARIABLE_NO = 1<<15, - RETURN_NO = 1<<16, - LOOP_NO = 1<<17, - NEXT_NO = 1<<18, - EMPTY_NO = 1<<19, - COMMENT_NO = 1<<20, - BEGIN_NO = 1<<21 - }; + static void writeCodeFragment(MemberDef *mdef,OutputList& ol); - //---------- create svg ------------------------------------------------------------- - static void createSVG(); - static void startDot(FTextStream &t); - static void endDot(FTextStream &t); - static void codify(FTextStream &t,const char *str); - static void writeShape(FTextStream &t,const FlowChart* fl); - static void writeEdge(FTextStream &t,int fl_from,int fl_to,int i,bool bFrom=FALSE,bool bTo=FALSE); - static void writeEdge(FTextStream &t,const FlowChart* fl_from,const FlowChart* fl_to,int i); - static void writeFlowLinks(FTextStream &t); - - static QCString getNodeName(int n); - static void colTextNodes(); - - static int getNextTextLink(const FlowChart* fl,uint index); - static int getNextIfLink(const FlowChart*,uint); - static int getNextNode(int,int); - static int findNode(int index,int stamp,int type); - static int findNode(int index,int type); - static int findNextLoop(int j,int stamp); - static int findPrevLoop(int j,int stamp,bool endif=FALSE); - static int findLabel(int j,QCString &); - static void delFlowList(); - static const char* getNodeType(int c); - - static void addFlowChart(int type,const char* text,const char* exp,const char * label=NULL); - static void moveToPrevLevel(); - static int getTimeStamp(); - static void writeFlowChart(); - static void alignFuncProc(QCString & q,const ArgumentList* al,bool isFunc); - static QCString convertNameToFileName(); - static void printNode(const FlowChart* n); - static void printFlowTree(); - static void buildCommentNodes(FTextStream &t); - static void alignCommentNode(FTextStream &t,QCString com); - - static QList<FlowChart> flowList; - - FlowChart(int typ,const char* t,const char* ex,const char* label=0); - ~FlowChart(); - -private: - int id; - int stamp; - int type; - - int line; - - QCString label; - QCString text; - QCString exp; }; #endif diff --git a/src/vhdlparser.y b/src/vhdlparser.y deleted file mode 100644 index 247ac8a..0000000 --- a/src/vhdlparser.y +++ /dev/null @@ -1,2641 +0,0 @@ -/****************************************************************************** - * - * Copyright (C) 1997-2014 by Dimitri van Heesch. - * - * Permission to use, copy, modify, and distribute this software and its - * documentation under the terms of the GNU General Public License is hereby - * granted. No representations are made about the suitability of this software - * for any purpose. It is provided "as is" without express or implied warranty. - * See the GNU General Public License for more details. - * - * Documents produced by Doxygen are derivative works derived from the - * input used in their production; they are not affected by this license. - * - */ - -/********************************************************************************************* - * The original was a VHDL parser description to be used with GMD Compiler - * Tool Box - * written from: - * Jan den Ouden, Jaap Hofstede - * Department of Computer Science (INF/SPA) - * University of Twente - * PB 217, 7500 AE ENSCHEDE, The Netherlands - * Tel: +31 53 893788 - * Email: hofstede@cs.utwente.nl - * avail at: ftp.cs.utwente.nl in pub/src/VHDL/Grammar - * - * author of YACC transformation: - * Thomas Dettmer - * Dortmund University - * Dept. of Computer Scienc, LS1 - * PB 500 500 - * D-44221 Dortmund (Germany) - * Phone: +49-231-755-6464 - * e-mail: dettmer@ls1.informatik.uni-dortmund.de - ***************************************************************** - * - * This file is intended not to be used for commercial purposes - * without permission of the University of Twente and permission - * of the University of Dortmund - * - * NOTE THAT THERE IS NO WARRANTY FOR CORRECTNES, COMPLETENESS, SUPPORT - * OR ANYTHING ELSE. - * - *******************************************************/ -/****************************************************************************** - * modified for doxygen by M. Kreis - * extended to VHDL 93/2008 - ******************************************************************************/ - - -%{ -#include <stdio.h> -#include <qcstring.h> -#include <qstringlist.h> -#include "config.h" - -#ifndef YYSTYPE -typedef int YYSTYPE; -#endif - -struct YYMM -{ - int itype; - QCString qstr; -}; - - - - -// define struct instead of union -#define YYSTYPE YYMM - -#include "membergroup.h" -#include "vhdldocgen.h" -#include "doxygen.h" -#include "searchindex.h" -#include "vhdlscanner.h" -#include "commentscan.h" -#include "entry.h" -#include "arguments.h" -#include "memberdef.h" -#include "vhdldocgen.h" - -//-----------------------------variables --------------------------------------------------------------------------- - - - - - -static VhdlContainer s_str; - -static QList<Entry>instFiles; -static QList<Entry>libUse; - - -static int yyLineNr; -static Entry* lastCompound; -static Entry* currentCompound; -static Entry* lastEntity; -static Entry* current; -static Entry* tempEntry; -static Entry* current_root; -static QCString compSpec; -static QCString currName; -static int levelCounter; -static QCString confName; -static QCString genLabels; -static QCString lab; -static QCString forL; -static QList<VhdlConfNode> configL; - - -static int currP=0; - -enum { GEN_SEC=0x1, PARAM_SEC,CONTEXT_SEC,PROTECTED_SEC } ; - -static int param_sec = 0; -static int parse_sec=0; - - -//---------------------------- functions -------------------------------------------------------------------------------- - -int vhdlscannerYYlex (); -void vhdlscannerYYerror (char const *); - -static void addVhdlType(const QCString &name,int startLine, - int section,uint64 spec, - const char* args,const char* type, - Protection prot=Public); -static void addCompInst(char *n, char* instName,char* comp,int line); - -static void newEntry(); -static void initEntry(Entry *e); - - -static void pushLabel(QCString &,QCString&); -static QCString popLabel(QCString&); -static void addConfigureNode(const char* a,const char*b, - bool isRoot,bool isLeave,bool inlineConf=FALSE); -//static bool addLibUseClause(const QCString &type); -static bool isFuncProcProced(); -static void initEntry(Entry *e); -static void addProto(const char *s1,const char *s2,const char *s3, - const char *s4,const char *s5,const char *s6); -static void createFunction(const QCString &impure,uint64 spec, - const QCString &fname); - -static void createFlow(); - -void newVhdlEntry() -{ - newEntry(); -} - -Entry* getCurrentVhdlEntry() -{ - return current; -} - -void initVhdlParser() -{ - lastCompound=0; - lastEntity=0; - currentCompound=0; - lastEntity=0; - current_root=s_str.root; - current=new Entry(); - initEntry(current); - libUse.clear(); -} - -QList<Entry> & getVhdlInstList() -{ - return instFiles; -} - -QList<Entry> & getLibUse() -{ - return libUse; -} - -%} - -%token -t_ABSTRLIST -t_CHARLIST -t_DIGIT -t_STRING -t_LETTER -t_ACCESS -t_AFTER -t_ALIAS -t_ALL -t_AND -t_ARCHITECTURE -t_ARRAY -t_ASSERT -t_ATTRIBUTE -t_BEGIN -t_BLOCK -t_BODY -t_BUFFER -t_BUS -t_CASE -t_COMPONENT -t_CONFIGURATION -t_CONSTANT -t_DISCONNECT -t_DOWNTO -t_ELSE -t_ELSIF -t_END -t_ENTITY -t_EXIT -t_FILE -t_FOR -t_FUNCTION -t_GENERATE -t_GENERIC -t_GUARDED -t_IF -t_IN -t_INOUT -t_IS -t_LABEL -t_LIBRARY -t_LINKAGE -t_LOOP -t_MAP -t_NAND -t_NEW -t_NEXT -t_NOR -t_NULL -t_OF -t_ON -t_OPEN -t_OR -t_OTHERS -t_OUT -t_PACKAGE -t_PORT -t_PROCEDURE -t_PROCESS -t_RANGE -t_RECORD -t_REGISTER -t_REPORT -t_RETURN -t_SELECT -t_SEVERITY -t_SIGNAL -t_SUBTYPE -t_THEN -t_TO -t_TRANSPORT -t_TYPE -t_UNITS -t_UNTIL -t_USE -t_VARIABLE -t_WAIT -t_WHEN -t_WHILE -t_WITH -t_XOR - -/* new keywords */ -t_IMPURE -t_PURE -t_GROUP -t_POSTPONED -t_SHARED -t_XNOR -t_SLL -t_SRA -t_SLA -t_SRL -t_ROR -t_ROL -t_UNAFFECTED -/*============== VHDL 2008 keywords ======================= */ - -t_ASSUME_GUARANTEE -t_ASSUME -t_CONTEXT -t_COVER -t_DEFAULT -t_FAIRNESS -t_FORCE -t_INERTIAL -t_LITERAL -t_PARAMETER -t_PROTECTED -t_PROPERTY -t_REJECT -t_RELEASE -t_RESTRICT -t_RESTRICT_GUARANTEE -t_SEQUENCE -t_STRONG -t_VMODE -t_VPROP -t_VUNIT - - -/*============== VHDL binary operators 2008 ======================= */ - -t_SLSL -t_SRSR -t_QQ -t_QGT -t_QLT -t_QG -t_QL -t_QEQU -t_QNEQU - -%nonassoc t_EQSym t_NESym t_LTSym t_LESym t_GTSym t_GESym t_QNEQU t_QEQU t_QL t_QG t_QLT t_QGT -%left t_Plus t_Minus t_Ampersand -%left MED_PRECEDENCE -%left t_Star t_Slash t_MOD t_REM -%nonassoc t_DoubleStar t_ABS t_NOT MAX_PRECEDENCE - -/* misc syms */ -/*t_Space */ - -%token -t_Apostrophe -t_LeftParen -t_RightParen -t_Comma -t_VarAsgn -t_Colon -t_Semicolon -t_Arrow -t_Box -t_Bar -t_Dot -t_Q -t_At -t_Neg -t_LEFTBR -t_RIGHTBR -t_ToolDir - -%type<qstr> designator literal enumeration_literal physical_literal physical_literal_no_default physical_literal_1 -%type<qstr> lib_clause use_clause sel_list entity_decl entity_start entity_decl_2 entity_decl_1 arch_body arch_start arch_body_1 -%type<qstr> config_decl config_start config_decl_2 config_decl_1 config_decl_3 package_decl package_start package_body pack_body_start package_body_2 package_body_1 common_decltve_item -%type<qstr> config_decltve_item subprog_decl subprog_body interf_list interf_element interf_element_4 interf_element_3 interf_element_2 interf_element_1 mode -%type<qstr> association_list association_list_1 association_list_2 gen_association_list gen_association_list_1 gen_association_list_2 association_element gen_association_element formal_part actual_part mark expr and_relation relation primary name name2 sel_name suffix ifts_name -%type<qstr> attribute_name aggregate element_association_list2 qualified_expr element_association choices choices_1 choices_2 choice type_decl type_decl_1 type_definition enumeration_type_definition enumeration_type_definition_1 enumeration_type_definition_2 physical_type_definition physical_type_definition_1 physical_type_definition_2 base_unit_decl secondary_unit_decl unconstrained_array_definition unconstrained_array_definition_1 unconstrained_array_definition_2 index_subtype_definition constrained_array_definition record_type_definition record_type_definition_1 record_type_definition_2 element_decl -%type<qstr> access_type_definition file_type_definition subtype_decl subtype_indic subtype_indic_1 subtype_indic1 subtype_indic1_1 range_constraint index_constraint index_constraint_1 index_constraint_2 discrete_range discrete_range1 range_spec direction constant_decl constant_decl_1 signal_decl signal_decl_2 signal_decl_1 variable_decl variable_decl_1 object_class signal_kind alias_decl file_decl file_decl_1 attribute_decl attribute_spec entity_spec entity_name_list entity_name_list_1 -%type<qstr> entity_name_list_2 entity_class block_stat -%type<qstr> generate_stat generate_stat_1 procs_stat procs_stat1 procs_stat1_1 sensitivity_list sensitivity_list_1 sensitivity_list_2 -%type<qstr> procedure_call_stat comp_decl comp_decl_2 comp_decl_1 block_config block_config_2 block_config_3 block_config_1 block_config_4 block_spec config_item comp_config comp_config_2 comp_config_1 config_spec binding_indic comp_spec -%type<qstr> inst_list entity_aspect idf_list procs_stat1_6 -%type<qstr> t_Identifier t_StringLit t_BitStringLit t_AbstractLit t_CharacterLit tbox group_name record_type_simple_name -%type<qstr> entity_class_entry_list entity_class_entry group_constituent_list group_constituent group_declaration group_template_declaration -%type<qstr> procs_stat1_5 comp_1 mark_comp dot_name fi_dec multiplying_operator factor term adding_op -%type<qstr> simple_exp alias_spec sigma signature1 mark_stats mark_stats_1 signature -%type<qstr> protected_type_body protected_type_declaration alias_name_stat vcomp_stat comp_spec_stat procs_decltve_item -%type<qstr> sig_stat external_name absolute_pathname relative_pathname package_path_name external_pathname pathname_element_list neg_list pathname_element - -%type<qstr> func_name return_is param func_prec iproc ifunc interface_subprogram_decl interface_package_decl package_instantiation_decl -%type<qstr> subprogram_instantiation_decl procs_stat1_4 -%type<qstr> context_ref libustcont_stats libustcont_stat context_decl entity_decltve_item case_stat -%type<qstr> exit_stat if_stat loop_stat next_stat null_stat return_stat signal_assign_stat -%type<qstr> variable_assign_stat wait_stat report_statement assertion_stat_2 assertion_stat_1 - -%type<qstr> binding_indic_2 binding_indic_1 shift_op block_decltve_item disconnection_spec seq_stats_1 seq_stats_2 seq_stats -%type<qstr> signal_list signal_list_1 signal_list_2 seq_stat assertion_stat choice_stat choice_stat_1 -%type<qstr> case_stat_1 case_stat_2 case_stat_alternative exit_stat_1 exit_stat_2 if_stat_2 if_stat_3 if_stat_1 loop_stat_2 loop_stat_1 loop_stat_3 -%type<qstr> next_stat_1 next_stat_2 return_stat_1 lable variable_assign_stat_1 -%type<qstr> wait_stat_1 wait_stat_2 wait_stat_3 target delay_mechanism -%type<qstr> if_generation_scheme if_scheme if_scheme_1 if_scheme_2 if_scheme_3 iteration_scheme for_scheme while_scheme concurrent_stats -%type<qstr> concurrent_stats_1 concurrent_stats_2 concurrent_stat block_stat_5 block_stat_4 block_stat_3 block_stat_2 block_stat_1 block_stat_0 -%type<qstr> generate_statement_body generation_scheme concurrent_assertion_stat concurrent_procedure_call concurrent_signal_assign_stat -%type<qstr> block_stat_6 block_stat_7 block_stat_8 condal_signal_assign sel_signal_assign opts condal_wavefrms wavefrm wavefrm_element -%type<qstr> wavefrm_1 wavefrm_2 wavefrm_element_1 wavefrm_element_2 opts_1 opts_2 sel_wavefrms -%type<qstr> sel_wavefrms_1 sel_wavefrms_2 gen_stat1 block_declarative_part end_stats inout_stat -%type<qstr> selected_signal_assignment comp_inst_stat - %type<qstr> conditional_signal_assignment selected_variable_assignment conditional_variable_assignment - %type<qstr> subprog_decltve_item subprog_body_3 subprog_body_1 procs_stat1_2 gen_assoc - -%debug - -// for debugging set yydebug=1 -%initial-action { yydebug=0; } - -%expect 3 - -// minimum bison version -//%required "2.2" - - - -%% -start: design_file - - -design_file : design_unit_list - /* parse function/process/procedure for vhdlflow */ - | procs_stat - | subprog_body - -design_unit_list: design_unit - | design_unit_list design_unit - ; - -designator : t_Identifier { $$=$1; } - | t_StringLit { $$=$1; } - ; - -literal : t_AbstractLit { $$=$1; } - | t_CharacterLit { $$=$1; } - | t_BitStringLit { $$=$1; } - | physical_literal_no_default { $$=$1; } - | t_NULL { $$="null"; } - ; - -enumeration_literal : t_CharacterLit { $$=$1; } - | t_Identifier { $$=$1; } - -physical_literal : physical_literal_1 t_Identifier { $$=$1+" "+$2; } - -physical_literal_1 : /* empty */ { $$=""; } - | t_AbstractLit { $$=$1; } - -physical_literal_no_default : t_AbstractLit t_Identifier { $$=$1+" "+$2; } - -idf_list : t_Identifier { $$=$1; } - | idf_list t_Comma t_Identifier { $$=$1+","+$3; } - ; - -/*------------------------------------------ --- Desing Unit ---------------------------------------------*/ - -design_unit : context_list lib_unit - -context_list : /* empty */ - | context_list context_item - -lib_unit : entity_decl - | config_decl - | package_decl - | arch_body - | package_body - | context_decl - | package_instantiation_decl - ; - -context_item : lib_clause - | use_clause - ; - -lib_clause : t_LIBRARY idf_list t_Semicolon - { - if ( parse_sec==0 && Config_getBool("SHOW_INCLUDE_FILES") ) - { - addVhdlType($2,getParsedLine(t_LIBRARY),Entry::VARIABLE_SEC,VhdlDocGen::LIBRARY,$2.data(),"_library_"); - } - $$="library "+$2; - } - -use_clause : t_USE sel_list t_Semicolon - { - QStringList ql1=QStringList::split(",",$2,FALSE); - for (uint j=0;j<ql1.count();j++) - { - //QStringList ql=QStringList::split(".",ql1[j],FALSE); - QCString it=ql1[j].utf8(); - if ( parse_sec==0 && Config_getBool("SHOW_INCLUDE_FILES") ) - { - addVhdlType(it,getParsedLine(t_USE),Entry::VARIABLE_SEC,VhdlDocGen::USE,it.data(),"_use_"); - } - } - $$="use "+$2; - } - -sel_list : sel_name { $$=$1; } - | sel_list t_Comma sel_name { $$=$1+","+$3; } - ; -/*------------------------------------------ --- Library Units ---------------------------------------------*/ - -entity_decl : entity_start error comp_end_dec t_Semicolon - -entity_decl : entity_start entity_decl_1 entity_decl_2 - entity_decl_3 entity_decl_4 comp_end_dec t_Semicolon - -entity_start: t_ENTITY t_Identifier t_IS - { - $$=$2; - lastEntity=current; - lastCompound=0; - getParsedLine(t_ENTITY); - addVhdlType($$,getParsedLine(t_ENTITY),Entry::CLASS_SEC,VhdlDocGen::ENTITY,0,0,Public); - } - ; - -entity_decl_5 : /* empty */ - | t_Identifier - ; -entity_decl_4 : /* empty */ - | t_BEGIN concurrent_stats - ; -entity_decl_3 : /* empty */ - | entity_decl_3 entity_decl_6 - ; - -entity_decl_6 : entity_decltve_item - -entity_decl_2 : /* empty */ { $$=""; } - | t_PORT { currP=VhdlDocGen::PORT; } interf_list t_Semicolon { currP=0; } - ; -entity_decl_1 : /* empty */ { $$=""; } - | t_GENERIC { currP=VhdlDocGen::GENERIC;parse_sec=GEN_SEC; } interf_list t_Semicolon{ currP=0;parse_sec=0; } - | t_GENERIC error t_Semicolon{ currP=0; } - ; - - -arch_body : arch_start arch_body_1 t_BEGIN concurrent_stats t_END arch_body_2 t_Semicolon {lastCompound=0;} -arch_body : arch_start error t_END arch_body_2 t_Semicolon {lastCompound=0;} - -arch_start : t_ARCHITECTURE t_Identifier t_OF t_Identifier t_IS - { - $$=$4+"::"+$2; - genLabels.resize(0); - pushLabel(genLabels,$2); - lastCompound=current; - addVhdlType($$,getParsedLine(t_ARCHITECTURE),Entry::CLASS_SEC,VhdlDocGen::ARCHITECTURE,0,0,Private); - } -arch_body_2 : /* empty */ -arch_body_2 : t_Identifier -arch_body_2 : t_ARCHITECTURE t_Identifier -arch_body_2 : t_ARCHITECTURE - -arch_body_1 : /* empty */ { $$=""; } -arch_body_1 : arch_body_1 arch_body_3 - -arch_body_3 : block_decltve_item - -config_decl : config_start error t_END config_decl_2 t_Semicolon { genLabels.resize(0); } -config_decl : config_start config_decl_1 block_config t_END config_decl_2 t_Semicolon { genLabels.resize(0); } - { - QCString k=$3; - QCString k2=$2; - confName=""; - } - - -config_start : t_CONFIGURATION t_Identifier t_OF t_Identifier t_IS - { - forL.resize(0); - confName=$2+"::"+$4; - addVhdlType($2.data(),getParsedLine(t_CONFIGURATION),Entry::VARIABLE_SEC,VhdlDocGen::CONFIG,"configuration",$4.data()); - } - -config_decl_2 : /* empty */ { $$=""; } -config_decl_2 : t_Identifier - { - QCString l=$1; - $$=$1; - } -config_decl_2 : t_CONFIGURATION { $$="configuration"; } -config_decl_2 : t_CONFIGURATION t_Identifier { $$=$2; } -config_decl_1 : /* empty */ { $$=""; } -config_decl_1 : config_decl_1 config_decl_3 { $$=$1+" "+$2; } -config_decl_3 : config_decltve_item { $$=$1; } - -package_decl : package_start error t_END package_decl_2 t_Semicolon -package_decl : package_start package_decl_1 t_END package_decl_2 t_Semicolon -package_start : t_PACKAGE t_Identifier t_IS - { - lastCompound=current; - Entry *clone=new Entry(*current); - clone->section=Entry::NAMESPACE_SEC; - clone->spec=VhdlDocGen::PACKAGE; - clone->name=$2; - clone->startLine=s_str.iLine; - clone->bodyLine=s_str.iLine; - clone->protection=Package; - current_root->addSubEntry(clone); - addVhdlType($2,s_str.iLine,Entry::CLASS_SEC,VhdlDocGen::PACKAGE,0,0,Package); - } - -package_decl_2 : /* empty */ -package_decl_2 : t_Identifier { lastCompound=0; } -package_decl_2 : t_PACKAGE t_Identifier { lastCompound=0; } -package_decl_2 : t_PACKAGE { lastCompound=0; } - -package_decl_1 : /* empty */ -package_decl_1 : package_decl_22 -package_decl_1 : package_decl_1 package_decl_3 -package_decl_3 : package_decltve_item - -package_decl_22: gen_interface_list t_Semicolon -package_decl_22: gen_interface_list -package_decl_22: gen_interface_list gen_assoc_list -package_decl_22: gen_interface_list gen_assoc_list t_Semicolon - -package_body : pack_body_start error t_END package_body_2 t_Semicolon {lastCompound=0;} -package_body : pack_body_start package_body_1 t_END package_body_2 t_Semicolon {lastCompound=0;} -pack_body_start : t_PACKAGE t_BODY t_Identifier t_IS - { - $$=$3; - lastCompound=current; - $$.prepend("_"); - addVhdlType($$,getParsedLine(t_PACKAGE) ,Entry::CLASS_SEC,VhdlDocGen::PACKAGE_BODY,0,0,Protected); - } -package_body_2 : /* empty */ { $$="";lastCompound=0; } -package_body_2 : t_Identifier { lastCompound=0; } -package_body_2 : t_PACKAGE t_BODY { lastCompound=0; } -package_body_2 : t_PACKAGE t_BODY t_Identifier { lastCompound=0; } - -package_body_1 : /* empty */ { $$=""; } -package_body_1 : package_body_1 package_body_3 -package_body_3 : package_body_decltve_item - - -/*------------------------------------------ --- Declarative Item ---------------------------------------------*/ - -common_decltve_item_1: package_decl -common_decltve_item_1: package_instantiation_decl -common_decltve_item_1: package_body -common_decltve_item_1: subprogram_instantiation_decl - - -common_decltve_item: type_decl{ $$=$1; } -common_decltve_item: subtype_decl{ $$=$1; } -common_decltve_item: constant_decl{ $$=$1; } -common_decltve_item: file_decl{ $$=$1; } -common_decltve_item: alias_decl{ $$=$1; } -common_decltve_item: subprog_decl{ $$=$1; } -common_decltve_item: use_clause { $$=$1; } - -entity_decltve_item: common_decltve_item { $$=$1; } -entity_decltve_item: subprog_body { $$=$1; } -entity_decltve_item: attribute_decl { $$=$1; } -entity_decltve_item: attribute_spec { $$=$1; } -entity_decltve_item: disconnection_spec { $$=$1; } -entity_decltve_item: signal_decl { $$=$1; } -entity_decltve_item: variable_decl { $$=$1; } -entity_decltve_item: group_template_declaration { $$=$1; } -entity_decltve_item: group_declaration { $$=$1; } -entity_decltve_item: common_decltve_item_1 { $$=""; } - - -block_decltve_item: common_decltve_item -block_decltve_item: subprog_body -block_decltve_item: comp_decl -block_decltve_item: attribute_decl -block_decltve_item: attribute_spec -block_decltve_item: config_spec -block_decltve_item: disconnection_spec -block_decltve_item: signal_decl -block_decltve_item: variable_decl -block_decltve_item: group_template_declaration -block_decltve_item: group_declaration -block_decltve_item: common_decltve_item_1 { $$=""; } -block_decltve_item: tool_directive { $$=""; } - -block_declarative_part: block_decltve_item - | block_declarative_part block_decltve_item - - -package_decltve_item: common_decltve_item -package_decltve_item: comp_decl -package_decltve_item: attribute_decl -package_decltve_item: attribute_spec -package_decltve_item: disconnection_spec -package_decltve_item: signal_decl -package_decltve_item: variable_decl -package_decltve_item: group_template_declaration -package_decltve_item: group_declaration -package_decltve_item: package_decl -package_decltve_item: package_instantiation_decl -package_decltve_item: subprogram_instantiation_decl - -package_body_decltve_item: common_decltve_item -package_body_decltve_item: subprog_body -package_body_decltve_item: variable_decl -package_body_decltve_item: group_template_declaration -package_body_decltve_item: group_declaration -package_body_decltve_item: attribute_decl -package_body_decltve_item: attribute_spec -package_body_decltve_item: common_decltve_item_1 - -subprog_decltve_item: common_decltve_item { $$=$1; } -subprog_decltve_item: subprog_body { $$=""; } -subprog_decltve_item: attribute_decl { $$=$1; } -subprog_decltve_item: attribute_spec { $$=$1; } -subprog_decltve_item: variable_decl { $$=$1; } -subprog_decltve_item: group_template_declaration -subprog_decltve_item: group_declaration { $$=""; } -subprog_decltve_item: common_decltve_item_1 { $$=""; } - -procs_decltve_item: subprog_decltve_item { $$=$1; } - -config_decltve_item: attribute_spec { $$=$1; } -config_decltve_item: use_clause { $$=$1; } -config_decltve_item: group_declaration { $$=$1; } -config_decltve_item: t_USE t_VUNIT idf_list t_Semicolon { $$=$3; } - -/*------------------------------------------ --- Subprograms ---------------------------------------------*/ -func_prec: t_PURE { $$="pure"; } -func_prec: t_IMPURE { $$="impure"; } - -subprog_decl: subprog_spec t_Semicolon { currP=0; } - -subprog_spec: t_PROCEDURE t_Identifier - { - currP=VhdlDocGen::PROCEDURE; - createFunction($2,currP,0); - tempEntry=current; - } - subprog_spec_1 { newEntry(); } -subprog_spec: func_prec t_FUNCTION designator - { - currP=VhdlDocGen::FUNCTION; - createFunction($1,currP,$3.data()); - } - subprog_spec_2 t_RETURN mark - { - tempEntry=current; - current->type=$7; - newEntry(); - } - -subprog_spec : t_FUNCTION designator - { - currP=VhdlDocGen::FUNCTION; - createFunction(0,currP,$2.data()); - } - subprog_spec_2 t_RETURN mark - { - tempEntry=current; - current->type=$6; - newEntry(); - - } - -subprog_spec_22: gen_interface_list -subprog_spec_22: gen_interface_list gen_assoc_list - -subprog_spec_33: t_PARAMETER - { param_sec=PARAM_SEC; } - interf_list - { param_sec= 0; } -subprog_spec_33: { param_sec=PARAM_SEC; } - interf_list - { param_sec= 0; } - -subprog_spec_2: /* empty */ -subprog_spec_2: subprog_spec_22 subprog_spec_33 -subprog_spec_2: subprog_spec_33 -subprog_spec_2: subprog_spec_22 - -subprog_spec_1: subprog_spec_2 - -subprog_body: subprog_spec t_IS subprog_body_1 - { - if ($3.data()) - { - FlowChart::addFlowChart(FlowChart::VARIABLE_NO,$3,0); - } - FlowChart::addFlowChart(FlowChart::BEGIN_NO,"BEGIN",0); - } - t_BEGIN seq_stats t_END subprog_body_2 t_Semicolon - { - tempEntry->endBodyLine=s_str.yyLineNr; - createFlow(); - currP=0; - } -subprog_body: subprog_spec t_IS error t_END subprog_body_2 t_Semicolon - { - currP=0; - } -subprog_body_2: /* empty */ -subprog_body_2: designator -subprog_body_2: t_FUNCTION -subprog_body_2: t_PROCEDURE -subprog_body_2: t_PROCEDURE t_Identifier -subprog_body_2: t_FUNCTION t_Identifier -subprog_body_2: t_FUNCTION t_STRING - -subprog_body_1: /* empty */ { $$=""; } -//subprog_body_1 : subprogram_instantiation_decl -subprog_body_1: subprog_body_1 subprog_body_3 { $$=$1+$2; } - -subprog_body_3: subprog_decltve_item { $$=$1; } - -/*-------------------------------------------------- --- Interface Lists and Associaton Lists -----------------------------------------------------*/ - -interf_list: t_LeftParen interf_element interf_list_1 t_RightParen { $$=""; } -interf_list: t_LeftParen error t_RightParen { $$=""; } -interf_list_1: /* empty */ -interf_list_1: interf_list_1 interf_list_2 -interf_list_2: t_Semicolon interf_element - -interf_element: interface_package_decl - { - // adding generic : [ package foo is new bar] - if (parse_sec==GEN_SEC) - { - addVhdlType(current->name.data(),getParsedLine(t_PACKAGE),Entry::VARIABLE_SEC,VhdlDocGen::GENERIC,$1.data(),0); - } - } -interf_element: interface_subprogram_decl - { - if (parse_sec==GEN_SEC) - { - int a=getParsedLine(t_FUNCTION); - int b=getParsedLine(t_PROCEDURE); - - if (a>b) b=a; - - addVhdlType(current->name.data(),b,Entry::VARIABLE_SEC,VhdlDocGen::GENERIC,$1.data(),0); - } - } -interf_element: interf_element_1 t_Identifier - { - if (parse_sec==GEN_SEC) - { - addVhdlType($2,s_str.iLine,Entry::VARIABLE_SEC,currP,$1.data(),0); - } - } -interf_element: interf_element_1 idf_list t_Colon interf_element_2 subtype_indic interf_element_3 interf_element_4 - { - $$=$2+":"+$4+$5+$6+$7; - if (currP!=VhdlDocGen::COMPONENT) - { - if (currP==VhdlDocGen::FUNCTION || currP==VhdlDocGen::PROCEDURE) - { - addProto($1.data(),$2.data(),$4.data(),$5.data(),$6.data(),$7.data()); - } - else - { - QCString i=$5+$6+$7; - if (currP==VhdlDocGen::GENERIC) - addVhdlType($2,s_str.iLine,Entry::VARIABLE_SEC,currP,i.data(),$4.data()); - else if(parse_sec != GEN_SEC) - addVhdlType($2,s_str.iLine,Entry::VARIABLE_SEC,currP,i.data(),$4.data()); - } - // fprintf(stderr,"\n\n <<port %s >>\n",$$.data()); - } // if component - } -interf_element_4: /* empty :=*/ { $$=""; } -interf_element_4: t_VarAsgn expr { $$=":="+$2; } -interf_element_3: /* empty */ { $$=""; } -interf_element_3: t_BUFFER { $$="buffer"; } -interf_element_3: t_BUS { $$="bus"; } -interf_element_2: /* empty */ { $$=""; } -interf_element_2: mode { $$=$1; } -interf_element_1: /* empty */ { $$=""; } -interf_element_1: object_class { $$=$1; } - -mode: t_IN { $$="in"; } -mode: t_OUT { $$="out"; } -mode: t_INOUT { $$="inout"; } -mode: t_BUFFER { $$="buffer"; } -mode: t_LINKAGE { $$="link"; } - -association_list: t_LeftParen association_element association_list_1 t_RightParen { $$="("+$2+")"; } -association_list_1: /* empty */ { $$=""; } -association_list_1: association_list_1 association_list_2 { $$=$1+" "+$2; } -association_list_2: t_Comma association_element { $$=", "+$2; } -// VHDL '93 range_constraint ::= range range -gen_association_list : gen_assoc gen_assoc { $$=$1+$2;} - -gen_association_list : gen_assoc { $$=$1; } - -gen_assoc: t_LeftParen gen_association_element gen_association_list_1 t_RightParen - { - QCString str="("+$2+$3; - str.append(")"); - $$=str; - } - -gen_association_list: t_LeftParen error t_RightParen { $$=""; } -gen_association_list: t_LeftParen t_OPEN t_RightParen { $$=" ( open ) "; } - -gen_association_list_1: /* empty */ { $$=""; } -gen_association_list_1: gen_association_list_1 gen_association_list_2 { $$=$1+" "+$2; } -gen_association_list_2: t_Comma gen_association_element { $$=","+$2; } - -association_element: formal_part t_Arrow actual_part { $$=$1+"=>"+$3; } -association_element: actual_part { $$=$1; } -association_element: t_Box { $$="<>"; } -association_element: t_DEFAULT { $$="default"; } - -/* changed ;gen_association_element : association_element */ -gen_association_element: expr { $$=$1; } -gen_association_element: choice t_Arrow expr { $$=$1+"=>"+$3; } -gen_association_element: discrete_range1 { $$=$1 ; } - -formal_part: name { $$=$1; } - -actual_part: expr { $$=$1; } -actual_part: t_OPEN { $$="open"; } -actual_part: t_INERTIAL expr { $$="inertial"; } - -/*-------------------------------------------------- --- Names and Expressions -----------------------------------------------------*/ - -expr: and_relation { $$=$1; } -expr: relation { $$=$1; } - -shift_op: t_SLL { $$="sll"; } - | t_SRA { $$="sra"; } - | t_SLA { $$="sla"; } - | t_SRL { $$="srl"; } - | t_ROR { $$="ror"; } - | t_ROL { $$="rol"; } - ; -and_relation: relation shift_op relation { $$= $1+$2+$3; } -and_relation: relation t_AND relation { $$= $1+" and "+$3; } -and_relation: relation t_XOR relation { $$= $1+" xor "+$3; } -and_relation: relation t_OR relation { $$= $1+" or "+$3; } -and_relation: relation t_NOR relation { $$= $1+" nor "+$3; } -and_relation: relation t_XNOR relation { $$= $1+"xnor"+$3; } -and_relation: relation t_NAND relation { $$= $1+"nand"+$3; } -and_relation: and_relation t_NAND relation { $$= $1+"nand"+$3; } -and_relation: and_relation t_NOR relation{ $$= $1+"nor"+$3; } -and_relation: and_relation t_XNOR relation { $$= $1+"nand"+$3; } -and_relation: and_relation t_AND relation { $$= $1+" and "+$3; } -and_relation: and_relation t_OR relation { $$= $1+" or "+$3; } -and_relation: and_relation t_XOR relation { $$= $1+" xor "+$3; } - -/* ;relation : unary_operator primary */ - -relation: t_QQ primary { $$=" ?? "+$2; } -relation: primary { $$=$1; } -relation: t_Plus primary %prec MED_PRECEDENCE { $$="+"+$2; } -relation: t_Minus primary %prec MED_PRECEDENCE { $$="-"+$2; } -relation: t_ABS primary { $$="abs"+$2; } -relation: t_NOT primary { $$="not "+$2; } -relation: primary t_DoubleStar primary { $$=$1+" ** "+$3; } -relation: t_Minus primary t_DoubleStar primary { $$=$2+" ** "+$4; } - -/* relation : relation binary_operator primary */ - -relation: relation t_MOD relation { $$=$1+" mod "+$3; } -relation: relation t_REM relation { $$=$1+" rem "+$3; } -relation: relation t_Ampersand relation { $$=$1+" & "+$3; } -relation: relation t_Star relation { $$=$1+" * "+$3; } -relation: relation t_Plus relation { $$=$1+" + "+$3; } -relation: relation t_Minus relation { $$=$1+" - "+$3; } -relation: relation t_LESym relation { $$=$1+" <= "+$3; } -relation: relation t_GESym relation { $$=$1+" >= "+$3; } -relation: relation t_LTSym relation { $$=$1+" < "+$3; } -relation: relation t_GTSym relation { $$=$1+" > "+$3; } -relation: relation t_EQSym relation { $$=$1+" = "+$3; } -relation: relation t_NESym relation { $$=$1+" != "+$3; } -relation: relation t_Slash relation { $$=$1+" / "+$3; } -relation: relation t_QNEQU relation { $$=$1+" ?/= "+$3; } -relation: relation t_QEQU relation { $$=$1+" ?= "+$3; } -relation: relation t_QL relation { $$=$1+" ?< "+$3; } -relation: relation t_QG relation { $$=$1+" ?> "+$3; } -relation: relation t_QLT relation { $$=$1+" ?<= "+$3; } -relation: relation t_QGT relation { $$=$1+" ?>= "+$3; } - -simple_exp: t_Minus term { $$ = "-"+$2; } - | t_Plus term { $$ = "+"+$2; } - | term { $$ = $1; } - | simple_exp - adding_op term { $$ = $1+" "+$2+" "+$3; } - -adding_op: t_Ampersand { $$ = "&"; } - | t_Minus { $$ = "-"; } - | t_Plus { $$ = "+"; } - ; - -term: factor { $$=$1; } - | factor multiplying_operator factor { $$ = $1+" "+$2+" "+$3; } - ; - -multiplying_operator: t_Star { $$ = "*"; } - | t_REM { $$ = "rem"; } - | t_MOD { $$ = "mod"; } - | t_Slash { $$ = "/"; } - -factor: primary { $$=$1; } - | t_ABS primary { $$="abs "+$2; } - | t_NOT primary { $$="not "+$2; } - | primary t_DoubleStar primary { $$ = $1+" ** "+$3; } - -primary: name { $$=$1; } -primary: literal { $$=$1; } -primary: aggregate { $$=$1; } -primary: qualified_expr { $$=$1; } -primary: allocator { $$=""; } -primary: t_LeftParen expr t_RightParen { $$="("+$2+")"; } - -name: mark { $$=$1; } -name: name2 { $$=$1; } -name: external_name { $$=$1; } -name2: t_StringLit { $$=$1; } -name2: attribute_name { $$=$1; } -name2: ifts_name { $$=$1; } - -mark: t_Identifier { $$=$1; } -mark: sel_name { $$=$1; } - -sel_name: name t_Dot suffix { $$=$1+"."+$3; } - -suffix: designator { $$=$1; } -suffix: t_CharacterLit { $$=$1; } -suffix: t_ALL { $$="all"; } - -ifts_name: mark gen_association_list { $$=$1+" "+$2; } -ifts_name: name2 gen_association_list { $$=$1+" "+$2; } - -sigma: t_Apostrophe { $$="'"; } -//sigma : t_LEFTBR signature1 t_RIGHTBR t_Apostrophe { $$="("+$2;;$$.append(")");$$.append("'"); } - -attribute_name: mark sigma t_Identifier { $$=$1+"' "+$3; } -attribute_name: attribute_name t_LeftParen expr t_RightParen -attribute_name: name2 sigma t_Identifier { $$=$1+" '"+$3; } -attribute_name: mark sigma t_RANGE { $$=$1+"' range "; } -attribute_name: name2 sigma t_RANGE { $$=$1+"' range "; } - -aggregate : element_association_list2 t_RightParen { $$=$1+" ) "; } -aggregate : t_LeftParen choices t_Arrow expr t_RightParen { $$="( "+$2+ "=>"+$4+" ) "; } - -element_association_list2 : t_LeftParen element_association t_Comma element_association { $$=" ( "+$2+","+$4; } -element_association_list2 : element_association_list2 t_Comma element_association { $$=$1+","+$3; } - -qualified_expr : mark t_Apostrophe t_LeftParen expr t_RightParen { $$=$1+"'("+$4+" ) "; } -qualified_expr : mark t_Apostrophe aggregate { $$=$1+"'"+$3; } - -allocator: t_NEW mark mark allocator_1 -allocator: t_NEW mark allocator_2 -allocator: t_NEW qualified_expr -allocator_2: /* empty */ -allocator_2: gen_association_list -allocator_1: /* empty */ -allocator_1: gen_association_list - - -/*-------------------------------------------------- --- Element Association and Choices -----------------------------------------------------*/ - -element_association: choices t_Arrow expr { $$=$1+"=> "+$3; } -element_association: expr { $$=$1; } - -choices: choice choices_1 { $$=$1+" "+$2; } -choices_1: /* empty */ { $$=""; } -choices_1: choices_1 choices_2 { $$=$1+" "+$2; } -choices_2: t_Bar choice { $$=" | "+$2; } - -choice: expr { $$=$1; } -choice: discrete_range1 { $$=$1; } -choice: t_OTHERS { $$="others"; } - -/*-------------------------------------------------- --- Type Declarations -----------------------------------------------------*/ -type_decl: t_TYPE t_Identifier error t_Semicolon { $$=""; } -type_decl: t_TYPE t_Identifier type_decl_1 t_Semicolon - { - addVhdlType($2,getParsedLine(t_TYPE),Entry::VARIABLE_SEC,VhdlDocGen::TYPE,0,$3.data()); - $$="type "; - $$+=$2+$3+";"; - } -type_decl: t_TYPE error t_Semicolon { $$=""; } - -type_decl_1: /* empty */ { $$=""; } -type_decl_1: t_IS type_definition { $$=" "+$2; } - -type_definition: enumeration_type_definition { $$=$1; } -type_definition: range_constraint { $$=$1; } -type_definition: physical_type_definition { $$=$1; } -type_definition: unconstrained_array_definition { $$=$1; } -type_definition: constrained_array_definition { $$=$1; } -type_definition: record_type_definition { $$=$1; } -type_definition: access_type_definition { $$=$1; } -type_definition: file_type_definition { $$=$1; } -type_definition: protected_type_declaration { $$=$1; } -type_definition: protected_type_body { $$=$1; } - - -enumeration_type_definition: t_LeftParen enumeration_literal enumeration_type_definition_1 t_RightParen { $$="( "+$2+" "+$3+" )"; } -enumeration_type_definition_1: { $$=""; } -enumeration_type_definition_1: enumeration_type_definition_1 enumeration_type_definition_2 { $$=$1+" "+$2; } -enumeration_type_definition_2: t_Comma enumeration_literal { $$=","+$2; } - -physical_type_definition : range_constraint t_UNITS base_unit_decl - physical_type_definition_1 t_END unit_stat - { - $$=$1; - current->args=$3+"#"+$4; - current->args.prepend("units"); - current->spec=VhdlDocGen::UNITS; - } - -unit_stat: t_UNITS t_Identifier -unit_stat: t_UNITS - -physical_type_definition_1: /* empty */ { $$=""; } -physical_type_definition_1: physical_type_definition_1 physical_type_definition_2 { $$=$1+" "+$2; } -physical_type_definition_2: secondary_unit_decl { $$=$1+"#"; } - -base_unit_decl: t_Identifier t_Semicolon { $$=$1; } - -secondary_unit_decl: t_Identifier t_EQSym physical_literal t_Semicolon { $$=$1+"="+$3; } - -unconstrained_array_definition: t_ARRAY t_LeftParen - index_subtype_definition unconstrained_array_definition_1 t_RightParen t_OF - subtype_indic - { - QCString sr1=" array ( "+$3+" "+$4; - QCString sr2=" ) of "+$7; - $$=sr1+sr2; - } - -unconstrained_array_definition_1: { $$=""; } -unconstrained_array_definition_1: unconstrained_array_definition_1 unconstrained_array_definition_2 { $$=$1+" "+$2; } -unconstrained_array_definition_2: t_Comma index_subtype_definition { $$=", "+$2; } - -index_subtype_definition: mark t_RANGE t_Box { $$=$1+" range<> "; } - -constrained_array_definition: t_ARRAY index_constraint t_OF subtype_indic { $$=" array "+$2+" of "+$4; } - -record_type_simple_name:/*empty*/ { $$=""; } - | t_Identifier { $$=$1; } - -record_type_definition: t_RECORD element_decl record_type_definition_1 t_END - t_RECORD record_type_simple_name - { - QRegExp reg("[\\s]"); - QCString oo=$2+" "+$3; - current->spec=VhdlDocGen::RECORD; - current->args=oo; - current->args.replace(reg,"%"); - current->args.prepend("record"); - $$=$2+" "+$3; - } - -record_type_definition_1: /*empty*/ { $$=""; } -record_type_definition_1: record_type_definition_1 record_type_definition_2 - { - $$=$1+" "+$2; - } -record_type_definition_2: element_decl { $$=$1; } - -element_decl: idf_list t_Colon subtype_indic t_Semicolon { $$=$1+":"+$3+"#"; } - -access_type_definition: t_ACCESS subtype_indic { $$="access "+$2; } - -file_type_definition: t_FILE t_OF mark { $$="file of "+$3; } - -/*-------------------------------------------------- --- Subtypes and Constraints -----------------------------------------------------*/ - -subtype_decl: t_SUBTYPE t_Identifier t_IS subtype_indic t_Semicolon - { - addVhdlType($2,getParsedLine(t_SUBTYPE),Entry::VARIABLE_SEC,VhdlDocGen::SUBTYPE,0,$4.data()); - } -subtype_decl: t_SUBTYPE error t_Semicolon { $$=""; } -subtype_indic: mark subtype_indic_1 { $$=$1+" "+$2; } -subtype_indic: subtype_indic1 { $$=$1; } -subtype_indic_1: /* empty */ { $$=""; } -subtype_indic_1: gen_association_list { $$=$1; } - -subtype_indic1: mark mark range_constraint { $$=$1+" "+$2+" "+$3; } -subtype_indic1: mark range_constraint { $$=$1+" "+$2; } -subtype_indic1: mark mark subtype_indic1_1 { $$=$1+" "+$2+" "+$3; } -subtype_indic1_1: /* empty */ { $$=""; } -subtype_indic1_1: gen_association_list { $$=$1; } - -range_constraint: t_RANGE range_spec { $$="range "+$2; } -//range_constraint : array_constraint - -index_constraint: t_LeftParen discrete_range - index_constraint_1 - t_RightParen { $$="("+$2+" "+$3+")"; } -index_constraint_1: /* empty */ { $$=""; } -index_constraint_1: index_constraint_1 - index_constraint_2 { $$=$1+" "+$2; } -index_constraint_2: t_Comma discrete_range { $$=","+$2; } - -discrete_range: subtype_indic { $$=$1; } -discrete_range: range_spec { $$=$1; } - -discrete_range1 : subtype_indic1 { $$=$1; } -discrete_range1 : expr direction expr { $$=$1+" "+$2+" "+$3; } - -range_spec : attribute_name { $$=$1; } -range_spec : simple_exp direction simple_exp { $$=$1+" "+$2+" "+$3; } - -direction : t_TO { $$=" to "; } -direction : t_DOWNTO { $$=" downto "; } - -/*-------------------------------------------------- --- Objects, Aliases, Files, Disconnections -----------------------------------------------------*/ - -constant_decl: t_CONSTANT idf_list t_Colon subtype_indic constant_decl_1 t_Semicolon - { - QCString it=$4+" "+$5; - // fprintf(stderr,"\n currP %d \n",currP); - addVhdlType($2,getParsedLine(t_CONSTANT),Entry::VARIABLE_SEC,VhdlDocGen::CONSTANT,0,it.data()); - $$="constant "+$2; - $$+=": "; - $$+=it+";"; - } -constant_decl_1: /* empty */ { $$=""; } -constant_decl_1: t_VarAsgn expr { $$=":="+$2; } - -signal_decl: t_SIGNAL idf_list t_Colon subtype_indic signal_decl_1 signal_decl_2 t_Semicolon - { - QCString s=$4+" "+$6; - addVhdlType($2,getParsedLine(t_SIGNAL),Entry::VARIABLE_SEC,VhdlDocGen::SIGNAL,0,s.data()); - } -signal_decl_2: /* empty */ { $$=""; } -signal_decl_2: t_VarAsgn expr { $$=":="+$2; } -signal_decl_1: /* empty */ { $$=""; } -signal_decl_1: signal_kind { $$=$1; } - -variable_decl: t_VARIABLE idf_list t_Colon subtype_indic variable_decl_1 t_Semicolon - { - $$=$2+":"+$4+" "+$5+";"; - $$.prepend("variable: "); - } -variable_decl: t_SHARED t_VARIABLE idf_list t_Colon subtype_indic variable_decl_1 t_Semicolon - { - $$=$5+" "+$6; - addVhdlType($3,getParsedLine(t_VARIABLE),Entry::VARIABLE_SEC,VhdlDocGen::SHAREDVARIABLE,0,$$.data()); - } -variable_decl_1: /* empty */ { $$=""; } -variable_decl_1: t_VarAsgn expr { $$=":="+$2; } - -object_class: t_CONSTANT { $$="constant"; } -object_class: t_SIGNAL { $$="signal"; } -object_class: t_VARIABLE { $$="variable"; } -object_class: t_SHARED t_VARIABLE { $$="shared"; } -object_class: t_FILE { $$="file"; } -object_class: t_TYPE { $$="type"; } - -signal_kind: t_BUS { $$="bus"; } -signal_kind: t_REGISTER { $$="register"; } - -alias_decl: t_ALIAS alias_name_stat alias_spec t_IS name signature t_Semicolon - { - QCString s=$3+" is "+$5+$6; - addVhdlType($2,getParsedLine(t_ALIAS),Entry::VARIABLE_SEC,VhdlDocGen::ALIAS,0,s.data()); - $$="alias "+$2; - $$+=": "; - $$+=s+";"; - } -alias_decl: t_ALIAS alias_name_stat alias_spec t_IS error t_Semicolon { $$=""; } - -alias_name_stat: t_Identifier { $$=$1; } -alias_name_stat: t_StringLit { $$=$1; } - -alias_spec :/*empty*/ { $$=""; } - | t_Colon subtype_indic { $$=$2; } - ; - -file_decl: t_FILE idf_list t_Colon subtype_indic t_IS file_decl_1 expr t_Semicolon - { - addVhdlType($2,getParsedLine(t_FILE),Entry::VARIABLE_SEC,VhdlDocGen::VFILE,0,$4.data()); - } - -file_decl: t_FILE idf_list t_Colon t_Identifier fi_dec t_Semicolon - { - QCString s=$4+" "+$5; - addVhdlType($2,getParsedLine(t_FILE),Entry::VARIABLE_SEC,VhdlDocGen::VFILE,0,s.data()); - } - -fi_dec: /*empty*/ { $$=""; } - | t_OPEN expr t_IS expr { $$="open "+$2+" is "+s_str.qstr; } - - -file_decl_1: /* empty */ { $$=""; } -file_decl_1: mode { $$=$1; } - -disconnection_spec: t_DISCONNECT signal_list t_Colon mark t_AFTER expr t_Semicolon - { $$="disconnect "+$2+":"+$4+" after "+$6; } - -signal_list: name signal_list_1 { $$=$1+$2; } -signal_list: t_OTHERS { $$="others"; } -signal_list: t_ALL { $$="all"; } -signal_list_1: /* empty */ { $$=""; } -signal_list_1: signal_list_1 signal_list_2 { $$=$1+$2; } -signal_list_2: t_Comma name { $$=" , "+$2; } - -/*-------------------------------------------------- --- Attribute Declarations and Specifications -----------------------------------------------------*/ - -attribute_decl: t_ATTRIBUTE t_Identifier t_Colon mark t_Semicolon - { - addVhdlType($2,getParsedLine(t_ATTRIBUTE),Entry::VARIABLE_SEC,VhdlDocGen::ATTRIBUTE,0,$4.data()); - $$= "attribute "+$2+ " : "+$4; - } - -attribute_spec: t_ATTRIBUTE t_Identifier t_OF entity_spec t_IS expr t_Semicolon - { - QCString att=$4+" is "+$6; - addVhdlType($2,getParsedLine(t_ATTRIBUTE),Entry::VARIABLE_SEC,VhdlDocGen::ATTRIBUTE,0,att.data()); - $$="attribute "+att+";"; - } - -entity_spec : entity_name_list signature t_Colon entity_class { $$=$1+$2+":"+$4; } - -entity_name_list: designator entity_name_list_1 { $$=$1+" "+$2; } -entity_name_list: t_OTHERS { $$="others"; } -entity_name_list: t_ALL { $$="all"; } -entity_name_list_1: /* empty */ { $$=""; } -entity_name_list_1: entity_name_list_1 entity_name_list_2 { $$=$1+" "+$2; } -entity_name_list_2: t_Comma designator { $$=","+$2; } - -entity_class: t_ENTITY { $$="entity"; } -entity_class: t_ARCHITECTURE { $$="architecture"; } -entity_class: t_PACKAGE { $$="package"; } -entity_class: t_CONFIGURATION { $$="configuration"; } -entity_class: t_COMPONENT { $$="component"; } -entity_class: t_LABEL { $$="label"; } -entity_class: t_TYPE { $$="type"; } -entity_class: t_SUBTYPE { $$="subtype"; } -entity_class: t_PROCEDURE { $$="procedure"; } -entity_class: t_FUNCTION { $$="function"; } -entity_class: t_SIGNAL { $$="signal"; } -entity_class: t_VARIABLE { $$="variable"; } -entity_class: t_CONSTANT { $$="constant"; } -entity_class: t_GROUP { $$="group"; } -entity_class: t_FILE { $$="file"; } -entity_class: t_UNITS { $$="units"; } -entity_class: t_LITERAL { $$="literal"; } -entity_class: t_SEQUENCE { $$="sequence"; } -entity_class: t_PROPERTY { $$="property"; } - - -/*-------------------------------------------------- --- Schemes ---------------------------------------------------------------------------*/ - -if_generation_scheme: if_scheme { $$=$1; } - -if_scheme: t_IF expr t_GENERATE generate_statement_body if_scheme_1 if_scheme_2 { $$=""; } -if_scheme: t_IF lable expr t_GENERATE generate_statement_body if_scheme_1 if_scheme_2 { $$=""; } - -if_scheme_2: /* empty */ { $$=""; } -if_scheme_2: t_ELSE t_GENERATE generate_statement_body { $$="else generate "+$3; } -if_scheme_2: t_ELSE lable t_GENERATE generate_statement_body { $$="else "+$2+" generate "+$4; } -if_scheme_1: /* empty */ { $$=""; } -if_scheme_1: if_scheme_1 if_scheme_3 { $$=$1+$2; } -if_scheme_3: t_ELSIF expr t_GENERATE generate_statement_body { $$="elsif "+$2+" generate "+$4; } -if_scheme_3: t_ELSIF lable expr t_GENERATE generate_statement_body { $$="elsif "+$2+$3+" generate "+$5; } - -generation_scheme: for_scheme { $$=$1; } - -iteration_scheme: for_scheme { $$=$1; } -iteration_scheme: while_scheme { $$=$1; } - -for_scheme: t_FOR t_Identifier t_IN discrete_range - { - if (!lab.isEmpty()) - { - $$=lab+" :for "+$2+" in "+$4; - } - else - { - $$=" for "+$2+" in "+$4; - } - FlowChart::addFlowChart(FlowChart::FOR_NO,0,$$,lab.data()); - lab.resize(0); - } -for_scheme: t_FOR lable t_Identifier t_IN discrete_range - { - $$=lab+" for "+$2+$3+" in "+$5; - FlowChart::addFlowChart(FlowChart::FOR_NO,0,$$,lab.data()); - lab=""; - } - -while_scheme: t_WHILE expr { - $$=" while "+$2; - FlowChart::addFlowChart(FlowChart::WHILE_NO,0,$$,lab.data()); - lab=""; - } - -/*-------------------------------------------------- --- Concurrent Statements -----------------------------------------------------*/ - -concurrent_stats: concurrent_stats_1 { $$=$1; } -concurrent_stats_1: /* empty */ { $$=""; } -concurrent_stats_1: concurrent_stats_1 concurrent_stats_2 { $$=$1+$2; } -concurrent_stats_2: concurrent_stat { $$=$1; } - -concurrent_stat : block_stat { $$=$1; } - | concurrent_assertion_stat { $$=$1; } - | concurrent_procedure_call { $$=$1; } - | concurrent_signal_assign_stat { $$=$1; } - | comp_inst_stat { - QCString li=$1; - $$=$1; - } - | generate_stat { $$=$1; } - | procs_stat - -block_stat: t_Identifier t_Colon t_BLOCK { pushLabel(genLabels,$1); } block_stat_0 block_stat_1 block_stat_2 - block_stat_3 block_stat_4 t_BEGIN concurrent_stats t_END t_BLOCK block_stat_5 - t_Semicolon - { - $$=$1+":block"; //+$4+$5+$6+$7+$8+"begin "+$10+" block "+$13; - genLabels=popLabel(genLabels); - } -block_stat_5: /* empty */ { $$=""; } -block_stat_5: t_Identifier { $$=$1; } -block_stat_4: /* empty */ { $$=""; } -block_stat_4: block_stat_4 block_stat_6 { $$=$1+$2; } -block_stat_6: block_decltve_item { $$=$1; } -block_stat_3: /* empty */ { $$=""; } -block_stat_3: t_PORT interf_list t_Semicolon block_stat_7 { $$="port "+$2+";"+$4; } -//block_sta_7: /* empty */ { $$=""; } -block_stat_7: t_PORT t_MAP association_list t_Semicolon { $$="port map "+$3; } -block_stat_2: /* empty */ { $$=""; } -block_stat_2: t_GENERIC interf_list t_Semicolon block_stat_8 { $$="generic "+$2+";"+$4; } -block_stat_8: /* empty */ { $$=""; } -block_stat_8: t_GENERIC t_MAP association_list t_Semicolon { $$="generic map "+$3; } -block_stat_1: /* empty */ { $$=""; } -block_stat_1: t_LeftParen expr t_RightParen block_stat_0 { $$="("+$2+")"+$4; } -block_stat_0: /* empty */ { $$=""; } -block_stat_0: t_IS { $$=" is "; } - -dot_name: t_Identifier { $$=$1; } - | dot_name t_Dot t_Identifier { $$=$1+"."+$3; } - ; - -mark_comp: dot_name comp_1 { $$=$1+" "+$2; } -mark_comp: dot_name { $$=$1; } - -comp_1: t_LeftParen t_Identifier t_RightParen { $$="("+$2+")"; } - -vcomp_stat: t_CONFIGURATION { $$="configuration";yyLineNr=s_str.iLine; } -vcomp_stat: t_ENTITY { $$="entity";yyLineNr=s_str.iLine; } -vcomp_stat: t_COMPONENT { $$="component";yyLineNr=s_str.iLine; } - -comp_inst_stat: t_Identifier t_Colon name { yyLineNr=s_str.iLine; } t_GENERIC t_MAP association_list comp_inst_stat_1 t_Semicolon - { - addCompInst($1.lower().data(),$3.lower().data(),0,yyLineNr);$$=""; - } -comp_inst_stat: t_Identifier t_Colon name { yyLineNr=s_str.iLine; } t_PORT t_MAP association_list t_Semicolon - { - addCompInst($1.lower().data(),$3.lower().data(),0,yyLineNr);$$="222"; - } - -comp_inst_stat: t_Identifier t_Colon vcomp_stat mark_comp t_PORT t_MAP association_list t_Semicolon - { - addCompInst($1.lower().data(),$4.lower().data(),$3.data(),yyLineNr);$$=""; - } -comp_inst_stat: t_Identifier t_Colon vcomp_stat mark_comp t_GENERIC t_MAP association_list comp_inst_stat_1 t_Semicolon - { - addCompInst($1.lower().data(),$4.lower().data(),$3.lower().data(),yyLineNr);$$=""; - } -comp_inst_stat_1: /* empty { $$=""; } */ -comp_inst_stat_1: t_PORT t_MAP association_list // { $$="port map"+$3; } - -concurrent_assertion_stat: t_Identifier t_Colon assertion_stat { $$=$1+":"+$3; } -concurrent_assertion_stat: assertion_stat { $$=$1; } - -concurrent_assertion_stat: t_Identifier t_Colon t_POSTPONED assertion_stat { $$=$1+":"+"postponed "+$4; } -concurrent_assertion_stat: t_POSTPONED assertion_stat { $$="postponed "+$2; } - -concurrent_procedure_call: t_Identifier t_Colon procedure_call_stat { $$=$1+":"+$3; } -concurrent_procedure_call: procedure_call_stat { $$=$1; } - -concurrent_procedure_call: t_Identifier t_Colon t_POSTPONED procedure_call_stat { $$=$1+":"+"postponed "+$4; } -concurrent_procedure_call: t_POSTPONED procedure_call_stat { $$="postponed "+$2; } - -concurrent_signal_assign_stat: t_Identifier t_Colon condal_signal_assign { $$=$1+":"+$3; } -concurrent_signal_assign_stat: condal_signal_assign { $$=$1; } - -concurrent_signal_assign_stat: t_Identifier t_Colon t_POSTPONED condal_signal_assign { $$=$1+":"+"postponed "+$4; } -concurrent_signal_assign_stat: t_POSTPONED condal_signal_assign { $$="postponed "+$2; } - -concurrent_signal_assign_stat: t_Identifier t_Colon t_POSTPONED sel_signal_assign { $$=$1+":"+"postponed "+$4; } -concurrent_signal_assign_stat: t_POSTPONED sel_signal_assign { $$="postponed "+$2; } - -concurrent_signal_assign_stat: t_Identifier t_Colon sel_signal_assign { $$=$1+":"+$3; } -concurrent_signal_assign_stat: sel_signal_assign { $$=$1; } - -condal_signal_assign: target t_LESym opts condal_wavefrms t_Semicolon { $$=$1+"<="+$3+$4; } - -condal_wavefrms: wavefrm { $$=$1; } -condal_wavefrms: wavefrm t_WHEN expr { $$=$1+" when "+$3; } -condal_wavefrms: wavefrm t_WHEN expr t_ELSE condal_wavefrms { $$=$1+" when "+$3+"else"+$5; } - -wavefrm: wavefrm_element wavefrm_1 { $$=$1+$2; } -wavefrm: t_UNAFFECTED { $$="unaffected"; } -wavefrm_1: /* empty */ { $$=""; } -wavefrm_1: wavefrm_1 wavefrm_2 { $$=$1+$2; } -wavefrm_2: t_Comma wavefrm_element { $$=","+$2; } - -wavefrm_element: expr wavefrm_element_1 { $$=$1+$2; } -wavefrm_element_1: /* empty */ { $$=""; } -wavefrm_element_1: t_AFTER expr { $$="after "+$2; } -wavefrm_element_1: t_NULL wavefrm_element_2 { $$=" null "+$2; } -wavefrm_element_1: t_NULL { $$=" null "; } -wavefrm_element_2: t_AFTER expr { $$="after "+$2; } - -target: name { $$=$1; } -target: aggregate { $$=$1; } - -opts: opts_1 opts_2 { $$=$1+$2; } - -opts_2: /* empty */ { $$=""; } -opts_2: t_TRANSPORT { $$="transport "; } -opts_2: t_REJECT expr t_INERTIAL { $$="transport"+$2+" intertial "; } -opts_2: t_INERTIAL { $$=" intertial "; } - -opts_1: /* empty */ { $$=""; } -opts_1: t_GUARDED { $$=" guarded "; } - -sel_signal_assign: t_WITH expr t_SELECT target t_LESym opts sel_wavefrms t_Semicolon - { $$="with "+$2+" select "+$4+"<="+$6+$7; } - -sel_wavefrms: sel_wavefrms_1 wavefrm t_WHEN choices { $$=$1+$2; } -sel_wavefrms_1: /* empty */ { $$=""; } -sel_wavefrms_1: sel_wavefrms_1 sel_wavefrms_2 { $$=$1+$2; } -sel_wavefrms_2: wavefrm t_WHEN choices t_Comma { $$=$1+" when "+$3; } - -gen_stat1: /* empty */ { $$=""; } - | block_declarative_part t_BEGIN { $$=$1+" begin "; } - | t_BEGIN { $$="begin "; } - - // problem with double end - // end; - // end generate; - -generate_statement_body: gen_stat1 concurrent_stats - -generate_stat : t_Identifier t_Colon - { pushLabel(genLabels,$1); } - generation_scheme t_GENERATE - gen_stat1 concurrent_stats opstat - -// stems from VHDL 2008 generate_statement_body -opstat: end_stats t_END generate_stat_1 t_Semicolon { genLabels=popLabel(genLabels); } -opstat: t_END generate_stat_1 t_Semicolon {genLabels=popLabel(genLabels); } - -generate_stat: t_Identifier t_Colon - { pushLabel(genLabels,$1); } - if_generation_scheme opstat // t_END generate_stat_1 t_Semicolon { genLabels=popLabel(genLabels); } -generate_stat: t_Identifier t_Colon case_scheme - -generate_stat_1: t_GENERATE { $$=""; } -generate_stat_1: t_GENERATE t_Identifier { $$=$2; } - -//end_stats : -end_stats: t_END t_Semicolon { $$="end"; } -end_stats: t_END t_Identifier t_Semicolon { $$="end "+$2; } - -procs_stat: t_Identifier t_Colon procs_stat1 - { - current->name=$1; - tempEntry=current; - current->endBodyLine=s_str.yyLineNr; - newEntry(); - currName=$1; - } - -procs_stat: procs_stat1 - { - current->name=VhdlDocGen::getProcessNumber(); - current->endBodyLine=s_str.yyLineNr; - tempEntry=current; - newEntry(); - } - -procs_stat1: procs_stat1_5 - { - currP=VhdlDocGen::PROCESS; - current->startLine=s_str.yyLineNr; - current->bodyLine=s_str.yyLineNr; - } - t_PROCESS procs_stat1_1 procs_stat1_2 - { - if ($5.data()) - FlowChart::addFlowChart(FlowChart::VARIABLE_NO,$5.data(),0); - FlowChart::addFlowChart(FlowChart::BEGIN_NO,"BEGIN",0); - } - t_BEGIN seq_stats t_END - - procs_stat1_3 t_Semicolon - { - $5.stripPrefix($4.data()); - tempEntry=current; - currP=0; - createFunction(currName,VhdlDocGen::PROCESS,$4.data()); - createFlow(); - currName=""; - } -procs_stat1: error t_END procs_stat1_3 t_Semicolon { currP=0; } - -procs_stat1_3: /* empty */ -procs_stat1_3: procs_stat1_5 t_PROCESS procs_stat1_6 - -procs_stat1_5: /* empty */ { $$=""; } -procs_stat1_5: t_POSTPONED { $$="postponed"; } - -procs_stat1_6: /* empty */ { $$=""; } -procs_stat1_6: t_Identifier { $$=$1; } - -procs_stat1_2: /* empty */ { $$=""; } -procs_stat1_2: t_IS { $$=""; } -procs_stat1_2: procs_stat1_2 procs_stat1_4 { $$+=$2; } -procs_stat1_4: procs_decltve_item { $$=$1; } -procs_stat1_1: /* empty */ { $$=""; } -procs_stat1_1: t_LeftParen t_ALL t_RightParen { $$="all"; } -procs_stat1_1: t_LeftParen sensitivity_list t_RightParen { $$=$2; } - -sensitivity_list: name sensitivity_list_1 { $$=$1+" "+$2; } -sensitivity_list_1: /* empty */ { $$=""; } -sensitivity_list_1: sensitivity_list_1 sensitivity_list_2 { $$=$1+" "+$2; } -sensitivity_list_2: t_Comma name { $$=","+$2; } - -/*-------------------------------------------------- --- Sequential Statements -----------------------------------------------------*/ - -seq_stats: seq_stats_1 { $$=$1; } -seq_stats_1: /* empty */ { $$=""; } -seq_stats_1: seq_stats_1 seq_stats_2 { $$=$1+$2; } -seq_stats_2: seq_stat { $$=$1; } -seq_stat: assertion_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: lable assertion_stat { $$=$1+$2; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: case_stat { $$=$1; } -seq_stat: exit_stat { $$=$1; } -seq_stat: if_stat { $$=""; } -seq_stat: loop_stat { $$=$1; } -seq_stat: next_stat { $$=$1; } -seq_stat: null_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: procedure_call_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: return_stat { $$=$1; FlowChart::addFlowChart(FlowChart::RETURN_NO,$$.data(),0); } -seq_stat: lable signal_assign_stat { $$=$1+$2; } -seq_stat: signal_assign_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: variable_assign_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: wait_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: lable wait_stat { $$=$1+$2; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } -seq_stat: report_statement { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); } - -report_statement: loop_stat_1 t_REPORT expr assertion_stat_2 t_Semicolon { $$=$1+"report "+$3+$4+";"; } - -assertion_stat: t_ASSERT expr assertion_stat_1 assertion_stat_2 t_Semicolon { $$="assert "+$2+$3+$4+";"; } -assertion_stat_2: /* empty */ { $$=""; } -assertion_stat_2 : t_SEVERITY expr { $$=" serverity "+$2; } -assertion_stat_1 : /* empty */ { $$=""; } -assertion_stat_1 : t_REPORT expr { $$=" report "+$2; } - -choice_stat : /* empty */ { $$=""; } -choice_stat : t_Q { $$="?"; } - -choice_stat_1: /* empty */ { $$=""; } -choice_stat_1 : t_Q { $$="?"; } -choice_stat_1 : t_Identifier { $$=$1; } - - -case_stat : t_CASE choice_stat expr - { - QCString ca="case "+$2+$3; - FlowChart::addFlowChart(FlowChart::CASE_NO,0,ca); - } - t_IS case_stat_alternative case_stat_1 t_END t_CASE choice_stat_1 t_Semicolon - { - FlowChart::moveToPrevLevel(); - FlowChart::addFlowChart(FlowChart::END_CASE,"end case",0); - } - - -case_stat : lable t_CASE choice_stat expr - { - QCString ca="case "+$3+$4; - FlowChart::addFlowChart(FlowChart::CASE_NO,0,ca); - } - t_IS case_stat_alternative case_stat_1 t_END t_CASE choice_stat_1 t_Semicolon - { - FlowChart::moveToPrevLevel(); - - FlowChart::addFlowChart(FlowChart::END_CASE,0,0); - } - -case_stat : t_CASE error t_END t_CASE choice_stat_1 t_Semicolon { $$=""; } -case_stat_1 : /* empty */ { $$=""; } -case_stat_1 : case_stat_1 case_stat_2 { $$=$1+$2; } -case_stat_2 : case_stat_alternative { $$=$1; } -case_stat_alternative : t_WHEN choices t_Arrow - { - QCString t="when "; - t+=$2+"=> "; - FlowChart::addFlowChart(FlowChart::WHEN_NO,$2.data(),t); - } - seq_stats { $$=""; FlowChart::moveToPrevLevel(); } - -if_stat: t_IF expr t_THEN - { - $2.prepend("if "); - FlowChart::addFlowChart(FlowChart::IF_NO,0,$2); - } - seq_stats - - if_stat_1 if_stat_2 t_END t_IF t_Semicolon - { - FlowChart::moveToPrevLevel(); - FlowChart::addFlowChart(FlowChart::ENDIF_NO,0,0); - } - -if_stat_2 : /* empty */ { $$=""; } -if_stat_2 : t_ELSE - { - FlowChart::addFlowChart(FlowChart::ELSE_NO,0,0); - } - seq_stats { $$=""; } - - - - -if_stat_1 : /* empty */ { $$=""; } -if_stat_1 : if_stat_1 if_stat_3 { $$=$1+$2; } -if_stat_3 : t_ELSIF expr t_THEN - { - $2.prepend("elsif "); - FlowChart::addFlowChart(FlowChart::ELSIF_NO,0,$2.data()); - } seq_stats { $$=""; } - -loop_stat: loop_stat_1 loop_stat_2 t_LOOP seq_stats t_END t_LOOP loop_stat_3 t_Semicolon - { - $$=$1+$2+" loop "+$4+" end loop" +$7; - QCString endLoop="end loop" + $7; - FlowChart::moveToPrevLevel(); - FlowChart::addFlowChart(FlowChart::END_LOOP,endLoop.data(),0); - } - -loop_stat_3: /* empty */ { $$=""; } -loop_stat_3: t_Identifier { $$=$1; } -loop_stat_2: /* empty */ { $$=""; - FlowChart::addFlowChart(FlowChart::LOOP_NO,0,"infinite loop"); - } -loop_stat_2: iteration_scheme -loop_stat_1: /* empty */ { $$=""; } -loop_stat_1: t_Identifier t_Colon { $$=$1+":";lab=$1; } - -exit_stat : loop_stat_1 t_EXIT exit_stat_1 exit_stat_2 t_Semicolon - { - FlowChart::addFlowChart(FlowChart::EXIT_NO,"exit",$4.data(),$3.data()); - lab.resize(0); - } -exit_stat_2 : /* empty */ { $$=""; } -exit_stat_2 : t_WHEN expr { $$="when "+$2; } -exit_stat_1 : /* empty */ { $$=""; } -exit_stat_1 : t_Identifier { $$=$1;lab=$$; } - - -next_stat: loop_stat_1 t_NEXT next_stat_1 next_stat_2 t_Semicolon - { - FlowChart::addFlowChart(FlowChart::NEXT_NO,"next ",$4.data(),$3.data()); - lab.resize(0); - } - -next_stat_2: /* empty */ { $$=""; } -next_stat_2: t_WHEN expr { $$="when "+$2; } -next_stat_1: /* empty */ { $$=""; } -next_stat_1: t_Identifier { $$=$1;lab=$$; } - -null_stat: t_NULL t_Semicolon { $$="null"; $$+=";"; } - -procedure_call_stat: name t_Semicolon - { - $$=$1+";"; - } - -return_stat: t_RETURN return_stat_1 t_Semicolon { $$="return "+$2+";" ; } -return_stat_1: /* empty */ { $$=""; } -return_stat_1: expr { $$=$1; } - -signal_assign_stat: target t_LESym wavefrm t_Semicolon { $$=$1+" <="+$3+";" ; } - | target t_LESym delay_mechanism wavefrm t_Semicolon { $$=$1+ "<= "+$3+$4 +";"; } - | target t_LESym t_FORCE inout_stat expr t_Semicolon { $$=$1+ "<= "+ " force "+$4+";" ; } - | target t_LESym t_RELEASE inout_stat t_Semicolon { $$=$1+ "<= "+" release "+$4 +";"; } - | selected_signal_assignment { $$=$1; } - | conditional_signal_assignment { $$=$1; } - ; - -variable_assign_stat: variable_assign_stat_1 t_Semicolon { $$=$1+";"; } - | conditional_variable_assignment { $$=$1; } - | lable selected_variable_assignment { $$=$1; } - | selected_variable_assignment { $$=$1; } - -lable: t_Identifier t_Colon { $$=$1+":"; } -variable_assign_stat_1: target t_VarAsgn expr { $$=$1+":="+$3; } -variable_assign_stat_1: lable target t_VarAsgn expr { $$=$1+$2+":="+$4; } - -wait_stat: t_WAIT wait_stat_1 wait_stat_2 wait_stat_3 t_Semicolon - { - $$="wait "+$2+$3+$4+";"; - } - -wait_stat_3: /* empty */ { $$=""; } -wait_stat_3: t_FOR expr { $$="for "+$2; } -wait_stat_2: /* empty */ { $$=""; } -wait_stat_2: t_UNTIL expr { $$=" until "+$2; } -wait_stat_1: /* empty */ { $$=""; } -wait_stat_1: t_ON sensitivity_list { $$=" on "+$2; } - - -/*-------------------------------------------------- --- Components and Configurations -----------------------------------------------------*/ -comp_end_dec : t_END { lastEntity=0; lastCompound=0; genLabels.resize(0); } - | t_END t_COMPONENT entity_decl_5 - | t_END t_ARCHITECTURE entity_decl_5 { lastCompound=0; genLabels.resize(0); } - | t_END t_ENTITY entity_decl_5 { lastEntity=0;lastCompound=0; genLabels.resize(0); } - | t_END t_Identifier { lastEntity=0; lastCompound=0; genLabels.resize(0); } - -iss :/*empty*/ { currP=VhdlDocGen::COMPONENT; } - | t_IS { currP=VhdlDocGen::COMPONENT; } - -comp_decl: t_COMPONENT t_Identifier iss comp_decl_1 comp_decl_2 comp_end_dec t_Semicolon - { - addVhdlType($2,getParsedLine(t_COMPONENT),Entry::VARIABLE_SEC,VhdlDocGen::COMPONENT,0,0); - currP=0; - } -comp_decl_2: /* empty */ { $$=""; } -comp_decl_2: t_PORT interf_list t_Semicolon { $$=$2; } -comp_decl_1: /* empty */ { $$=""; } -comp_decl_1: t_GENERIC interf_list t_Semicolon { $$=$2; } - -block_config: t_FOR block_spec block_config_1 block_config_2 { levelCounter--; } t_END t_FOR t_Semicolon - { - } - -block_config: t_FOR error t_END t_FOR t_Semicolon { $$=""; } -block_config_2: /* empty */ { $$=""; } -block_config_2: block_config_2 block_config_3 { $$=$1+" "; } -block_config_3: config_item { $$=$1; } -block_config_1: /* empty */ { $$=""; } -block_config_1: block_config_1 block_config_4 { $$=$1; } -block_config_4: use_clause { $$=$1; } - -block_spec: name - { - $$=$1; - if (levelCounter==0) - addConfigureNode($1.data(),NULL,TRUE,FALSE); - else - addConfigureNode($1.data(),NULL,FALSE,FALSE); - levelCounter++; - } - -config_item: block_config { $$=$1; } -config_item: comp_config { $$=$1; } - -comp_config: t_FOR comp_spec comp_config_1 comp_config_2 t_END t_FOR t_Semicolon - { - $$=$2+" "+$3+" "+$4; - } -comp_config_2: /* empty */ { $$=""; } -comp_config_2: block_config { $$=$1; } -comp_config_1: /*empty*/ { $$=""; } - -comp_config_1: binding_indic_1 binding_indic_2 t_Semicolon -{ - $$=""; -} -comp_config_1: t_USE t_VUNIT idf_list t_Semicolon { $$=""; } -comp_config_1: t_USE binding_indic t_Semicolon - { - addConfigureNode(compSpec.data(),$2.data(),FALSE,TRUE); - } - -config_spec: t_FOR comp_spec comp_spec_stat t_Semicolon - { - addConfigureNode($2.data(),$3.data(),TRUE,FALSE,TRUE); - } -config_spec: t_FOR comp_spec comp_spec_stat t_Semicolon t_END t_FOR t_Semicolon - { - addConfigureNode($2.data(),$3.data(),TRUE,FALSE,TRUE); - } - -comp_spec_stat: t_USE binding_indic { - $$=$2; - } -comp_spec_stat: t_USE t_VUNIT idf_list t_Semicolon -{ - $$=""; -} -comp_spec_stat: binding_indic_1 binding_indic_2 - { - $$=""; - } - -comp_spec: inst_list t_Colon expr - { - $$=$1+":"+$3; - compSpec=$$; - } - -inst_list: idf_list { $$=$1; } -inst_list: t_ALL { $$="all"; } -inst_list: t_OTHERS { $$="others"; } - -binding_indic : entity_aspect binding_indic_1 binding_indic_2 { $$=$1; } - -binding_indic_2: { $$=""; } -binding_indic_2: t_PORT t_MAP association_list { $$="port map "+$3; } - -binding_indic_1: { $$=""; } -binding_indic_1: t_GENERIC t_MAP association_list { $$="generic map "+$3; } - - -entity_aspect: t_ENTITY name { $$="entity "+$2; } -entity_aspect: t_CONFIGURATION mark { $$="configuration "+ $2; } -entity_aspect: t_OPEN { $$="open "; } - ; - -group_constituent: t_Identifier { $$=$1; } - | t_CharacterLit { $$=$1; } - ; - -group_constituent_list: group_constituent { $$=$1; } - | group_constituent_list t_Comma group_constituent { $$=$1+","+$3; } - ; - -group_declaration : t_GROUP t_Identifier t_Colon group_name t_LeftParen group_constituent_list t_RightParen t_Semicolon - { - // $$=$2+":"+$4+$6; - $$="("+$4+$6+")"; - addVhdlType($2,getParsedLine(t_GROUP),Entry::VARIABLE_SEC,VhdlDocGen::GROUP,$$.data(),0); - } - -group_template_declaration : t_GROUP t_Identifier t_IS t_LeftParen entity_class_entry_list t_RightParen t_Semicolon - { - $$=$2+":"+$5; - addVhdlType($2,getParsedLine(t_GROUP),Entry::VARIABLE_SEC,VhdlDocGen::GROUP,$5.data(),0); - } - -group_template_declaration: t_GROUP t_Identifier t_IS t_LeftParen error t_Semicolon t_RightParen{ $$=""; } - - -entity_class_entry : entity_class tbox { $$=$1+$2; } - -tbox : /* empty */ { $$=""; } -tbox : t_Box { $$="<>"; } - -entity_class_entry_list: entity_class_entry { $$=$1; } - | entity_class_entry_list - t_Comma entity_class_entry { $$=$1+","+$3; } - ; - -group_name: t_Identifier { $$=$1; } -group_name: t_StringLit { $$=$1; } - -t_Identifier: t_LETTER - { - $$=s_str.qstr; - } - -t_BitStringLit: t_DIGIT - { - $$=s_str.qstr; - } - -t_StringLit: t_STRING - { - $$=s_str.qstr; - } - -t_AbstractLit: t_ABSTRLIST - { - $$=s_str.qstr; - } - -t_CharacterLit: t_CHARLIST - { - $$=s_str.qstr; - } - - -/*-------------------------------------------------- --- VHDL 2002 extensions --- to do: must be added ------------------------------------------------------*/ -protected_type_declaration:t_PROTECTED protected_stats t_END protected_stat_1 { $$=""; } -protected_type_declaration:t_PROTECTED error t_END protected_stat_1 { $$=""; } - -protected_stats: /* empty */ -protected_stats: protected_stats protected_stat_decl_1 -protected_stat_decl_1: protected_type_declaration_item -protected_stat_1: t_PROTECTED -protected_stat_1: t_PROTECTED t_Identifier - -protected_type_declaration_item: use_clause -protected_type_declaration_item: attribute_spec -protected_type_declaration_item: subprog_decl -protected_type_declaration_item: subprogram_instantiation_decl - -protected_type_body: t_PROTECTED t_BODY protected_body_stats t_END protected_body_stat_1 { $$=""; } -protected_type_body: t_PROTECTED t_BODY error t_END protected_body_stat_1 { $$=""; } - -protected_body_stats: /* empty */ -protected_body_stats: protected_body_stats protected_body_stat_decl_1 -protected_body_stat_decl_1: protected_type_body_declaration_item - -protected_body_stat_1: t_PROTECTED t_BODY -protected_body_stat_1: t_PROTECTED t_BODY t_Identifier - -protected_type_body_declaration_item: subprog_decltve_item // same as subprog - -/*-------------------------------------------------- --- VHDL 2008 extensions --- to do: must be added ------------------------------------------------------*/ -context_ref: t_CONTEXT sel_list t_Semicolon { $$="context "+$2; } - -context_decl: t_CONTEXT t_Identifier t_IS { parse_sec=CONTEXT_SEC; } libustcont_stats t_END context_stat_1 t_Semicolon - { - parse_sec=0; - QCString v=$5; - addVhdlType($2,getParsedLine(t_LIBRARY),Entry::VARIABLE_SEC,VhdlDocGen::LIBRARY,"context",$5.data()); - } -context_decl: t_CONTEXT t_Identifier t_IS t_END context_stat_1 t_Semicolon - { - addVhdlType($2,getParsedLine(t_LIBRARY),Entry::VARIABLE_SEC,VhdlDocGen::LIBRARY,"context",0); - } - -context_stat_1: t_CONTEXT -context_stat_1: t_CONTEXT t_Identifier - -libustcont_stats: libustcont_stat { $$ = $1; } -libustcont_stats: libustcont_stats libustcont_stat { $$ = $1+"#"+$2; } - -libustcont_stat: use_clause { $$ = $1; } -libustcont_stat: lib_clause { $$ = $1; } -libustcont_stat: context_ref { $$ = $1; } - -package_instantiation_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name signature t_Semicolon - { - $$=" is new "+$5+$6; - //Entry * pp=lastCompound; - //Entry * pps=lastEntity ; - //assert(false); - addVhdlType($2,getParsedLine(t_PACKAGE),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"package",$$.data()); - } -package_instantiation_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name signature gen_assoc_list t_Semicolon - { - $$=" is new "+$5+$6; - addVhdlType($2,getParsedLine(t_PACKAGE),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"package",$$.data()); - } -package_instantiation_decl: t_PACKAGE error t_Identifier t_IS t_NEW t_Semicolon { $$=""; } - -subprogram_instantiation_decl: t_FUNCTION t_Identifier t_IS t_NEW dot_name signature t_Semicolon - { - $$= " is new "+$5+$6; - addVhdlType($2,getParsedLine(t_FUNCTION),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"function ",$$.data()); - } -subprogram_instantiation_decl: t_FUNCTION t_Identifier t_IS t_NEW dot_name signature gen_assoc_list t_Semicolon - { - $$=" is new "+$5+$6; - addVhdlType($2,getParsedLine(t_FUNCTION),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"function ",$$.data()); - } -subprogram_instantiation_decl: t_FUNCTION t_Identifier t_IS t_NEW error t_Semicolon { $$=""; } - -signature:/*empty*/ { $$=""; } -signature: t_LEFTBR signature1 - t_RIGHTBR { $$="["+$2+" ]"; } -signature: t_LEFTBR t_RIGHTBR { $$="[ ]"; } - -signature1: t_RETURN mark { $$="return "+$2; } -signature1: mark_stats { $$=$1; } -signature1: mark_stats t_RETURN mark { $$=$1+" return "+$3; } - -mark_stats: mark { $$=$1; } -mark_stats: mark_stats mark_stats_1 { $$=$1+" "+$2; } -mark_stats_1: t_Comma mark { $$=" , "+$2; } - -case_scheme: t_CASE expr t_GENERATE when_stats ttend t_END t_GENERATE generate_stat_1 t_Semicolon -case_scheme: t_CASE expr t_GENERATE when_stats t_END t_GENERATE generate_stat_1 t_Semicolon -case_scheme: t_CASE error t_GENERATE error t_END t_GENERATE generate_stat_1 t_Semicolon - -when_stats_1: t_WHEN lable choices t_Arrow generate_statement_body -when_stats_1: t_WHEN choices t_Arrow generate_statement_body -when_stats: when_stats when_stats_1 -when_stats: when_stats_1 - -ttend: t_END t_Semicolon -ttend: t_END t_Identifier t_Semicolon - -conditional_signal_assignment: conditional_waveform_assignment { $$=""; } -conditional_signal_assignment: conditional_force_assignment { $$=""; } - -conditional_waveform_assignment: target t_LESym wavefrm_element t_WHEN expr else_wave_list t_Semicolon -conditional_waveform_assignment: target t_LESym delay_mechanism wavefrm_element t_WHEN expr else_wave_list t_Semicolon -conditional_waveform_assignment: target t_LESym wavefrm_element t_WHEN expr t_Semicolon -conditional_waveform_assignment: target t_LESym delay_mechanism wavefrm_element t_WHEN expr t_Semicolon -conditional_waveform_assignment: target t_LESym error t_Semicolon - -else_wave_list: t_ELSE expr t_WHEN expr -else_wave_list: t_ELSE expr - -conditional_force_assignment: target t_LESym t_FORCE inout_stat expr t_WHEN expr else_stat t_Semicolon -conditional_force_assignment: target t_LESym t_FORCE inout_stat expr t_WHEN expr t_Semicolon - -selected_signal_assignment : selected_waveform_assignment { $$=""; } -selected_signal_assignment : selected_force_assignment { $$=""; } - -selected_waveform_assignment: t_WITH expr t_SELECT choice_stat - target t_LESym delay_stat sel_wave_list - -delay_stat: -delay_stat: delay_mechanism - -sel_wave_list: wavefrm_element t_WHEN choices t_Comma sel_wave_list -sel_wave_list: sel_wave_list_1 - -sel_wave_list_1: wavefrm_element t_WHEN choices t_Semicolon - -selected_force_assignment: t_WITH expr t_SELECT choice_stat target t_LESym t_FORCE - inout_stat sel_var_list - -inout_stat: /* empty */ { $$=""; } -inout_stat: t_IN { $$=" in "; } -inout_stat: t_OUT { $$="out"; } - -delay_mechanism : t_TRANSPORT { $$=" transport "; } - | t_REJECT expr t_INERTIAL { $$=" reject "+$2+"inertial "; } - | t_INERTIAL { $$=" inertial "; } - -conditional_variable_assignment : variable_assign_stat_1 t_WHEN expr else_stat t_Semicolon -conditional_variable_assignment : variable_assign_stat_1 t_WHEN expr t_Semicolon - -else_stat: t_ELSE expr t_WHEN expr -else_stat: else_stat t_ELSE expr t_WHEN expr -else_stat: t_ELSE expr - -selected_variable_assignment: t_WITH expr t_SELECT choice_stat select_name t_VarAsgn sel_var_list { $$=""; } - -sel_var_list: expr t_WHEN choices t_Comma sel_var_list -sel_var_list: sel_var_list_1 - -sel_var_list_1: expr t_WHEN choices t_Semicolon - -select_name: name - | aggregate - -interface_subprogram_decl: iproc { $$ = $1; } - | ifunc { $$=$1; } - ; -iproc: t_PROCEDURE t_Identifier param { $$ = "procedure "+$2+$3; current->name=$2; } - -ifunc: t_FUNCTION func_name param t_RETURN mark return_is - { - QCString s=$6; - if (!s.isEmpty()) - { - s.prepend(" is "); - } - $$=" function "+$2+$3+$5+s; - current->name=$2; - } -ifunc: func_prec t_FUNCTION func_name param t_RETURN mark return_is - { - QCString s=$7; - if (!s.isEmpty()) - { - s.prepend(" is "); - } - $$=$1+" function "+$3+$4+" return "+$6+s; - current->name=$3; - } - -func_name: t_Identifier { $$=$1; } - | t_StringLit { $$=$1; } // "?<" - ; - -return_is: /* empty */ { $$=""; } - | t_IS t_Identifier { $$=$2; } - | t_IS t_Box { $$="<>"; } - -param: /* empty */ { $$=""; } -param: t_PARAMETER { $$="parameter "; } -param: t_PARAMETER { parse_sec=PARAM_SEC; } - t_LeftParen interf_element interf_list_1 t_RightParen - { parse_sec=0; } - -param: t_LeftParen interf_element interf_list_1 t_RightParen { $$="("+$2+")"; } - -interface_package_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name - { - $$="package "+$2+" is new "+$5; - current->name=$2; - } -interface_package_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name gen_assoc_list - { - $$="package "+$2+" is new "+$5+"( ... )" ; - current->name=$2; - } - -gen_assoc_list: t_GENERIC t_MAP association_list - -gen_interface_list : t_GENERIC - { - //int u=s_str.iLine; - parse_sec=GEN_SEC; - } - interf_list - { - QCString vo=$3; - parse_sec=0; - } - -external_name: t_SLSL sig_stat external_pathname t_Colon subtype_indic t_SRSR - { - QCString s="<<"+$2; - QCString s1=$3+":"+$5+">>"; - $$=s+s1; - } - -sig_stat: t_CONSTANT { $$="constant "; } -sig_stat: t_SIGNAL { $$="signal "; } -sig_stat: t_VARIABLE { $$="variable "; } - -external_pathname: absolute_pathname { $$=$1; } - | relative_pathname { $$=$1; } - | package_path_name { $$=$1; } - ; - -absolute_pathname: t_Dot pathname_element_list t_Identifier { $$="."+$2+$3; } -absolute_pathname: t_Dot t_Identifier { $$="."+$2; } - -relative_pathname: neg_list pathname_element_list t_Identifier { $$=$1+$2+$3; } -relative_pathname: neg_list t_Identifier { $$=$1+$2; } - -neg_list: t_Neg t_Dot { $$="^."; } -neg_list: neg_list t_Neg t_Dot { $$=$1+"^."; } - -pathname_element: t_Identifier { $$=$1; } - | t_Identifier t_LeftParen expr t_RightParen { $$=$1+"("+$3+")"; } - ; - -pathname_element_list: pathname_element t_Dot { $$=$1+"."; } - | pathname_element_list pathname_element t_Dot { $$=$1+$2+"."; } - -package_path_name: t_At dot_name { $$="@"+$2; } - -tool_directive: t_ToolDir -{ -// fprintf(stderr,"\n tooldir %s",s_str.qstr.data() ); -} - - -%% -extern FILE* yyout; -extern YYSTYPE vhdlscannerYYlval; - -void vhdlscannerYYerror(const char* /*str*/) -{ - // fprintf(stderr,"\n<---error at line %d : [ %s] in file : %s ---->",s_str.yyLineNr,s_str.qstr.data(),s_str.fileName); - // exit(0); -} - -void vhdlParse() -{ - vhdlscannerYYparse(); -} - -struct VhdlContainer* getVhdlCont() -{ - return &s_str; -} - -Entry* getVhdlCompound() -{ - if (lastEntity) return lastEntity; - if (lastCompound) return lastCompound; - return NULL; -} - -QList<VhdlConfNode>& getVhdlConfiguration() { return configL; } - -static void addCompInst(char *n, char* instName, char* comp,int iLine) -{ - - current->spec=VhdlDocGen::INSTANTIATION; - current->section=Entry::VARIABLE_SEC; - current->startLine=iLine; - current->bodyLine=iLine; - current->type=instName; // foo:instname e.g proto or work. proto(ttt) - current->exception=genLabels.lower(); // |arch|label1:label2... - current->name=n; // foo - current->args=lastCompound->name; // architecture name - current->includeName=comp; // component/enity/configuration - int u=genLabels.find("|",1); - if (u>0) - { - current->write=genLabels.right(genLabels.length()-u); - current->read=genLabels.left(u); - } - //printf (" \n genlable: [%s] inst: [%s] name: [%s] %d\n",n,instName,comp,iLine); - - if (lastCompound) - { - current->args=lastCompound->name; - if (true) // !findInstant(current->type)) - { - initEntry(current); - instFiles.append(new Entry(*current)); - } - - Entry *temp=current; // hold current pointer (temp=oldEntry) - current=new Entry; // (oldEntry != current) - delete temp; - } - else - { - newEntry(); - } -} - -static void pushLabel( QCString &label,QCString & val) -{ - label+="|"; - label+=val; -} - -static QCString popLabel(QCString & q) -{ - QCString u=q; - int i=q.findRev("|"); - if (i<0) return ""; - q = q.left(i); - return q; -} - -static void addConfigureNode(const char* a,const char*b, bool,bool isLeaf,bool inlineConf) -{ - VhdlConfNode* co=0; - QCString ent,arch,lab; - QCString l=genLabels; - ent=a; - lab = VhdlDocGen::parseForConfig(ent,arch); - - if (b) - { - ent=b; - lab=VhdlDocGen::parseForBinding(ent,arch); - } - int level=0; - - if(!configL.isEmpty()) - { - VhdlConfNode* vc=configL.getLast(); - level=vc->level; - if (levelCounter==0) - pushLabel(forL,ent); - else if (level<levelCounter) - { - if (!isLeaf) - { - pushLabel(forL,ent); - } - } - else if (level>levelCounter) - { - forL=popLabel(forL); - } - } - else - { - pushLabel(forL,ent); - } - - - if (inlineConf) - { - confName=lastCompound->name; - } - - //fprintf(stderr,"\n[%s %d %d]\n",forL.data(),levelCounter,level); - co=new VhdlConfNode(a,b,confName.lower().data(),forL.lower().data(),isLeaf); - - if (inlineConf) - { - co->isInlineConf=TRUE; - } - - configL.append(co); - -}// addConfigure - -// ------------------------------------------------------------------------------------------------------------ - -static bool isFuncProcProced() -{ - if (currP==VhdlDocGen::FUNCTION || - currP==VhdlDocGen::PROCEDURE || - currP==VhdlDocGen::PROCESS - ) - { - return TRUE; - } - return FALSE; -} - -static void initEntry(Entry *e) -{ - e->fileName = s_str.fileName; - e->lang=SrcLangExt_VHDL; - isVhdlDocPending(); - initGroupInfo(e); -} - -static void addProto(const char *s1,const char *s2,const char *s3, - const char *s4,const char *s5,const char *s6) -{ - (void)s5; // avoid unused warning - static QRegExp reg("[\\s]"); - QCString name=s2; - QStringList ql=QStringList::split(",",name,FALSE); - - for (uint u=0;u<ql.count();u++) - { - Argument *arg=new Argument; - arg->name=ql[u].utf8(); - if (s3) - { - arg->type=s3; - } - arg->type+=" "; - arg->type+=s4; - if (s6) - { - arg->type+=s6; - } - if (parse_sec==GEN_SEC && param_sec==0) - { - arg->defval="gen!"; - } - - if (parse_sec==PARAM_SEC) - { - assert(false); - } - - arg->defval+=s1; - arg->attrib="";//s6; - - current->argList->append(arg); - current->args+=s2; - current->args+=","; - } -} - -static void createFunction(const QCString &impure,uint64 spec, - const QCString &fname) -{ - - current->spec=spec; - current->section=Entry::FUNCTION_SEC; - - if (impure=="impure" || impure=="pure") - { - current->exception=impure; - } - - if (parse_sec==GEN_SEC) - { - current->spec= VhdlDocGen::GENERIC; - current->section=Entry::FUNCTION_SEC; - } - - if (currP==VhdlDocGen::PROCEDURE) - { - current->name=impure; - current->exception=""; - } - else - { - current->name=fname; - } - - if (spec==VhdlDocGen::PROCESS) - { - - current->args=fname; - current->name=impure; - VhdlDocGen::deleteAllChars(current->args,' '); - if (!fname.isEmpty()) - { - QStringList q1=QStringList::split(",",fname); - for (uint ii=0;ii<q1.count();ii++) - { - Argument *arg=new Argument; - arg->name=q1[ii].utf8(); - current->argList->append(arg); - } - } - return; - } - - current->startLine=s_str.iLine; - current->bodyLine=s_str.iLine; - -} - -static void addVhdlType(const QCString &name,int startLine,int section, - uint64 spec,const char* args,const char* type,Protection prot) -{ - static QRegExp reg("[\\s]"); - - if (isFuncProcProced() || VhdlDocGen::getFlowMember()) return; - - if (parse_sec==GEN_SEC) - { - spec= VhdlDocGen::GENERIC; - } - - // more than one name ? - QStringList ql=QStringList::split(",",name,FALSE); - - for (uint u=0;u<ql.count();u++) - { - current->name=ql[u].utf8(); - - - current->startLine=startLine; - current->bodyLine=startLine; - current->section=section; - current->spec=spec; - current->fileName=s_str.fileName; - if (current->args.isEmpty()) - { - current->args=args; -// current->args.replace(reg,"%"); // insert dummy chars because wihte spaces are removed - } - current->type=type; -// current->type.replace(reg,"%"); // insert dummy chars because white spaces are removed - current->protection=prot; - - if (!lastCompound && (section==Entry::VARIABLE_SEC) && (spec == VhdlDocGen::USE || spec == VhdlDocGen::LIBRARY) ) - { - libUse.append(new Entry(*current)); - current->reset(); - } - newEntry(); - } -} - -static void newEntry() -{ - - if (VhdlDocGen::isVhdlClass(current)) - { - current_root->addSubEntry(current); - } - else - { - if (lastCompound) - { - lastCompound->addSubEntry(current); - } - else - { - if (lastEntity) - { - lastEntity->addSubEntry(current); - } - else - { - current_root->addSubEntry(current); - } - } - } - current = new Entry ; - initEntry(current); -} - -void createFlow() -{ - if (!VhdlDocGen::getFlowMember()) - { - return; - } - QCString q,ret; - - if (currP==VhdlDocGen::FUNCTION) - { - q=":function( "; - FlowChart::alignFuncProc(q,tempEntry->argList,true); - q+=")"; - } - else if (currP==VhdlDocGen::PROCEDURE) - { - q=":procedure ("; - FlowChart::alignFuncProc(q,tempEntry->argList,false); - q+=")"; - } - else - { - q=":process( "+tempEntry->args; - q+=")"; - } - - q.prepend(VhdlDocGen::getFlowMember()->name().data()); - - FlowChart::addFlowChart(FlowChart::START_NO,q,0); - - if (currP==VhdlDocGen::FUNCTION) - { - ret="end function "; - } - else if (currP==VhdlDocGen::PROCEDURE) - { - ret="end procedure"; - } - else - { - ret="end process "; - } - - FlowChart::addFlowChart(FlowChart::END_NO,ret,0); - // FlowChart::printFlowList(); - FlowChart::writeFlowChart(); - currP=0; -} - diff --git a/src/vhdlscanner.h b/src/vhdlscanner.h index 9b7c292..9c98087 100644 --- a/src/vhdlscanner.h +++ b/src/vhdlscanner.h @@ -28,8 +28,9 @@ #include <unistd.h> #include <qfile.h> #include <qdict.h> -#include "vhdldocgen.h" + #include "entry.h" +#include "memberlist.h" class Entry; class ClassSDict; @@ -37,10 +38,9 @@ class FileStorage; class ClassDef; class MemberDef; class QStringList; -class MemberList; -/** VHDL parser using state-based lexical scanning. +/** \brief VHDL parser using state-based lexical scanning. * * This is the VHDL language parser for doxygen. */ @@ -50,8 +50,8 @@ class VHDLLanguageScanner : public ParserInterface virtual ~VHDLLanguageScanner() {} void startTranslationUnit(const char *) {} void finishTranslationUnit() {} - void parseInput(const char * fileName, - const char *fileBuf, + void parseInput(const char * fileName, + const char *fileBuf, Entry *root, bool sameTranslationUnit, QStrList &filesInSameTranslationUnit); @@ -75,73 +75,8 @@ class VHDLLanguageScanner : public ParserInterface void parsePrototype(const char *text); }; -/** Container for vhdlscanner */ -struct VhdlContainer -{ - int yyLineNr; // current line no - int iLine; // line no of last t_identifier - QCString qstr; // t_identifier - QCString fileName; // current file - Entry* root; // root -}; - -/** Configuration node for VHDL */ -struct VhdlConfNode -{ - VhdlConfNode(const char* a,const char* b,const char* config,const char* cs,bool leaf) - { - arch=a; // architecture e.g. for iobuffer - arch=arch.lower(); - binding=b; // binding e.g. use entiy work.xxx(bev) - binding=binding.lower(); - confVhdl=config; // configuration foo is bar - compSpec=cs; - isInlineConf=false; // primary configuration? - isLeaf=leaf; - }; - - QCString confVhdl; - QCString arch; - QCString binding; - QCString compSpec; - int level; - bool isLeaf; - bool isInlineConf; - -}; - - - -// returns the current conpound entity,architecture, package,package body -Entry* getVhdlCompound(); - -// return the current parsed entry -Entry* getCurrentVhdlEntry(); - -void newVhdlEntry(); - -void initVhdlParser(); - -struct VhdlContainer* getVhdlCont(); - -// returns the parsed line -// @ param object index of vhdl keyword like t_Identifier t_Entity -int getParsedLine(int object); - void vhdlscanFreeScanner(); -void vhdlParse(); - -// return the list of component instantiations e.g. foo: component bar -QList<Entry> & getVhdlInstList(); - -// returns configuration list -QList<VhdlConfNode>& getVhdlConfiguration(); - -// returns library/used list -QList<Entry> & getLibUse(); - -void isVhdlDocPending(); - +//--------------------------------------------------------------------------------- #endif diff --git a/src/vhdlscanner.l b/src/vhdlscanner.l index a3603c8..d411325 100644 --- a/src/vhdlscanner.l +++ b/src/vhdlscanner.l @@ -1,1001 +1,2052 @@ -/************** VHDL scanner in LEX format ********** - * - * Version 0.2 Wed Aug 11, 1993 - * - * This scanner is derived from a scanner of the ALLIANCE CAD toolset, - * release 1.1. That toolset was written from: - * MASI/CAO-VLSI CAD Team - * Laboratoire MASI/CAO-VLSI - * Tour 55-65, 2eme etage, Porte 13 - * Universite Pierre et Marie Curie (PARIS VI) - * 4, place Jussieu 75252 PARIS Cedex 05, FRANCE - * The ALLIANCE CAD Toolset can be obtained from ftp site : ftp-masi.ibp.fr +/****************************************************************************** * - * This scanner is avail at: ftp.cs.utwente.nl in pub/src/VHDL/Grammar - * A corresponding Yacc grammar is available at the same site + * Copyright (C) 1997-2014 by Dimitri van Heesch. * - * author of this derived scanner version: - * Thomas Dettmer - * Dortmund University - * Dept. of Computer Scienc, LS1 - * PB 500 500 - * D-44221 Dortmund (Germany) - * Phone: +49-231-755-6464 - * e-mail: dettmer@ls1.informatik.uni-dortmund.de + * Permission to use, copy, modify, and distribute this software and its + * documentation under the terms of the GNU General Public License is hereby + * granted. No representations are made about the suitability of this software + * for any purpose. It is provided "as is" without express or implied warranty. + * See the GNU General Public License for more details. * + * Documents produced by Doxygen are derivative works derived from the + * input used in their production; they are not affected by this license. * - **************************************************************** - * - * This file is intended not to be used for commercial purposes - * without permission of the University of Dortmund - * - * NOTE THAT THERE IS NO WARRANTY FOR CORRECTNES, COMPLETENESS, SUPPORT - * OR ANYTHING ELSE. - *******************************************************/ + */ /****************************************************************************** - * modified for doxygen by M. Kreis - * extended to VHDL 93/2008 + * Parser for VHDL subset + * written by M. Kreis + * supports VHDL-87/93 + * does not support VHDL-AMS ******************************************************************************/ %{ -#ifndef YYSTYPE - typedef int YYSTYPE; -#endif -#include <search.h> +// global includes #include <stdio.h> #include <stdlib.h> #include <assert.h> #include <string.h> -#include <ctype.h> +#include <qcstring.h> +#include <qfileinfo.h> +#include <qstringlist.h> -#include <qmap.h> -#include "commentscan.h" -#include "vhdlparser.h" +/* --------------------------------------------------------------- */ + +// local includes #include "vhdlscanner.h" -#include "doxygen.h" -#include "searchindex.h" -#include "scanner.h" +#include "vhdlcode.h" #include "vhdldocgen.h" -#include "util.h" -#include "bufstr.h" #include "message.h" -#include "vhdlcode.h" -#include "entry.h" #include "config.h" +#include "doxygen.h" +#include "util.h" +#include "language.h" +#include "commentscan.h" +#include "index.h" +#include "definition.h" +#include "searchindex.h" +#include "outputlist.h" +#include "arguments.h" +/* --------------------------------------------------------------- */ +#define YY_NEVER_INTERACTIVE 1 #define YY_NO_INPUT 1 -extern void vhdlParse(); // defined in vhdlparser.y +//#define theTranslator_vhdlType theTranslator->trVhdlType +#define theTranslator_vhdlType VhdlDocGen::getVhdlType -static bool g_lexInit = FALSE; +static QStringList qrl; +static int openGroups; static ParserInterface *g_thisParser; -static VhdlContainer* yycont=NULL; -static Entry* current_root; -static Entry gBlock; - -static int yyLineNr =1; -static int g_lastCommentContext; +static const char * inputString; static int inputPosition; -static int startComment; -static QCString inputVhdlString; +static int inputLen; +static int startComment = 0; static QFile inputFile; +static QCString inbuf; +static Entry* global_root = 0; +static Entry* current_root = 0; +static Entry* current = 0; +static Entry* previous = 0; +static Entry* functionEntry = 0; +static Entry* lastEntity = 0; +static Entry* lastCompound = 0; +static int genPort = 0; static QCString yyFileName; -static QList<QCString> qlist; -static QCString lastLetter; - -static bool doxComment=FALSE; // doxygen comment ? -static QCString strComment; -static int iDocLine=-1; -static int* lineIndex=NULL; -static int num_chars; -static int prevToken; +static int iFuncLine = 1; +static bool g_inputFromFile ; +static bool g_lexInit = FALSE; +static int isBody=0; +static int isFunc=0; +static int yyLineNr = 1; +static char * g_buf = 0; +static uint g_bufSize = 0; +static int iTextCounter = 0; +static int iCounter = 0; +static int bropen = 0; +static int scantype = 0; +static int g_lastCommentContext = 0; +static bool docBlockAutoBrief; +static char docBlockTerm; +static int iDocLine = -1; +static Entry gBlock; +static int num_chars; + +//#define YY_A_INTERACTIVE 1 +#define YY_NEVER_INTERACTIVE 1 +//----------------------------------------------------------------------------- +#define YY_USER_ACTION num_chars += yyleng; +static void parserInit(); +static void deleteSpecChars(char* str,char *buf); +static void handleCommentBlock(const QCString &doc,bool brief); +static void newEntry(); +static void initEntry(Entry *e); + static int iCodeLen; -static QMap<QCString, int> keyMap; -static QList<Entry> lineEntry; -static bool checkMultiComment(QCString& qcs,int line); -static void handleCommentBlock(const QCString &doc,bool brief); -static void mapLibPackage(Entry* ce); -static QList<Entry>* getEntryAtLine(const Entry* ce,int line); -static bool addLibUseClause(const QCString &type); -static Entry* oldEntry; -static bool varr=FALSE; -static QCString varName; - -static struct +static void makeInline() { - QCString doc; - bool brief; - bool pending; - int iDocLine; -} str_doc; + int diff=num_chars-iCodeLen; + assert(inputLen>iCodeLen+diff); + QCString par(&inputString[iCodeLen],diff); + int index=par.findRev("\\endcode"); + int tt=par.length()-par.find("\n",index); + QCString qc(&inputString[iCodeLen-tt],diff); + index=qc.findRev("--!"); + if (index<=0) return; + par=qc.left(index); + /* + fprintf(stderr,"\n-------------------------------------------------------------------------------- "); + fprintf(stderr,"\n bytes since %d %d \n %s",num_chars,iCodeLen,par.data()); + fprintf(stderr,"\n-------------------------------------------------------------------------------- "); + */ + gBlock.doc=par; + gBlock.section=Entry::VARIABLE_SEC; + gBlock.spec=VhdlDocGen::MISCELLANEOUS; + gBlock.fileName = yyFileName; + gBlock.endBodyLine=yyLineNr-1; + Entry *temp=new Entry(gBlock); + if (lastCompound) + lastCompound->addSubEntry(temp); + else if (lastEntity) + lastEntity->addSubEntry(temp); + else + { + temp->type="misc"; // global code + current_root->addSubEntry(temp); + } -#define YY_NEVER_INTERACTIVE 1 -#define YY_USER_ACTION num_chars += (int)vhdlscannerYYleng; + gBlock.reset(); -#define MAX_KEYWORD_LEN 20 +}// makeInline -typedef struct +static void addSubEntry(Entry* root, Entry* e) { - char nom[MAX_KEYWORD_LEN]; - int kval; -} el_mc; + if (e==0 || root==0) return; + //if (isPrevDoc) + //{ + // e->brief=prevDocEntry.brief; + // e->briefLine=prevDocEntry.briefLine; + // prevDocEntry.reset(); + // isPrevDoc=FALSE; + //} + root->addSubEntry(e); +} -static el_mc tab_mc []= +static void bufferClear() { - { "abs", t_ABS }, - { "access", t_ACCESS }, - { "after", t_AFTER }, - { "alias", t_ALIAS }, - { "all", t_ALL }, - { "and", t_AND }, - { "architecture", t_ARCHITECTURE }, - { "array", t_ARRAY }, - { "assert", t_ASSERT }, - { "assume", t_ASSUME }, - { "assume_guarantee", t_ASSUME_GUARANTEE }, - { "attribute", t_ATTRIBUTE }, - - { "begin", t_BEGIN }, - { "block", t_BLOCK }, - { "body", t_BODY }, - { "buffer", t_BUFFER }, - { "bus", t_BUS }, - - { "case", t_CASE }, - { "component", t_COMPONENT }, - { "configuration", t_CONFIGURATION }, - { "constant", t_CONSTANT }, - { "context", t_CONTEXT }, - { "cover", t_COVER }, - - { "default", t_DEFAULT }, - { "disconnect", t_DISCONNECT }, - { "downto", t_DOWNTO }, - - { "else", t_ELSE }, - { "elsif", t_ELSIF }, - { "end", t_END }, - { "entity", t_ENTITY }, - { "exit", t_EXIT }, - - { "fairness", t_FAIRNESS }, - { "file", t_FILE }, - { "for", t_FOR }, - { "force", t_FORCE }, - { "function", t_FUNCTION }, - - { "generate", t_GENERATE }, - { "generic", t_GENERIC }, - { "group", t_GROUP }, - { "guarded", t_GUARDED }, - - { "if", t_IF }, - { "impure", t_IMPURE }, - { "in", t_IN }, - { "inertial", t_INERTIAL }, - { "inout", t_INOUT }, - { "is", t_IS }, - - { "label", t_LABEL }, - { "library", t_LIBRARY }, - { "linkage", t_LINKAGE }, - { "literal", t_LITERAL }, - { "loop", t_LOOP }, - - { "map", t_MAP }, - { "mod", t_MOD }, - - { "nand", t_NAND }, - { "new", t_NEW }, - { "next", t_NEXT }, - { "nor", t_NOR }, - { "not", t_NOT }, - { "null", t_NULL }, - - { "of", t_OF }, - { "on", t_ON }, - { "open", t_OPEN }, - { "or", t_OR }, - { "others", t_OTHERS }, - { "out", t_OUT }, - - { "package", t_PACKAGE }, - { "parameter", t_PARAMETER }, - { "port", t_PORT }, - { "postponed", t_POSTPONED }, - { "procedure", t_PROCEDURE }, - { "process", t_PROCESS }, - { "property", t_PROPERTY }, - { "protected", t_PROTECTED }, - { "pure", t_PURE }, - - { "range", t_RANGE }, - { "record", t_RECORD }, - { "register", t_REGISTER }, - { "reject", t_REJECT }, - { "release", t_RELEASE }, - { "restrict", t_RESTRICT }, - { "restrict_guarantee", t_RESTRICT_GUARANTEE }, - { "rem", t_REM }, - { "report", t_REPORT }, - { "rol", t_ROL }, - { "ror", t_ROR }, - { "return", t_RETURN }, - - { "select", t_SELECT }, - { "sequence", t_SEQUENCE }, - { "severity", t_SEVERITY }, - { "signal", t_SIGNAL }, - { "shared", t_SHARED }, - { "sla", t_SLA }, - { "sll", t_SLL }, - { "sra", t_SRA }, - { "srl", t_SRL }, - { "strong", t_STRONG }, - { "subtype", t_SUBTYPE }, - - { "then", t_THEN }, - { "to", t_TO }, - { "transport", t_TRANSPORT }, - { "type", t_TYPE }, - - { "unaffected", t_UNAFFECTED }, - { "units", t_UNITS }, - { "until", t_UNTIL }, - { "use", t_USE }, - - { "variable", t_VARIABLE }, - { "vmode", t_VMODE }, - { "vprop", t_VPROP }, - { "vunit", t_VUNIT }, - - { "wait", t_WAIT }, - { "when", t_WHEN }, - { "while", t_WHILE }, - { "with", t_WITH }, - - { "xor", t_XOR }, - { "xnor", t_XNOR }, - { "zz", -1 } // list end -}; - - -static int find_keyword(char *s) -{ - QCString word(s); - // keyword ? - if (word.length() > MAX_KEYWORD_LEN) - return -1; + int j; + for (j=0;j<iCounter+1;j++) + { + g_buf[j]=0; + } - word=word.lower(); - QMap<QCString, int>::Iterator it = keyMap.find(word); - if (it.key()) - return it.data(); + iCounter=0; +} + +static void addText (char *word, int llen) +{ + if ((uint)(iCounter + llen) > g_bufSize) + { + char *pTmp = (char*)realloc(g_buf,iCounter+llen+2048); + if (pTmp) + { + g_buf = pTmp; + } + else + { + fprintf(stderr,"\n not enough memory for realloc\n"); + return; + } + } + while (llen>0) + { + g_buf[iCounter]=*word++; + iCounter++; + llen--; + } + g_buf[iCounter]='\0'; +} - return -1; +static void getBufText(QCString& qc,int start) +{ + while (start < iCounter) + { + qc+=(g_buf[start]); + start++; + } } -// update current line static void lineCount() { - for (const char* c=vhdlscannerYYtext ; *c ; ++c ) + for ( const char* c = yytext ; *c ; ++c ) { yyLineNr += (*c == '\n') ; } } +static void deleteSpecChars(char* str,char *buf) +{ + while (*str) + { + if ((*str == '\t') || (*str == '\n') || (*str == '\r') || (*str == ' ')) + { + str++; + } + else + { + *buf++ = *str++; + } + } + *buf='\0'; +} -static void startCodeBlock(int index){ - int ll=strComment.length(); - iCodeLen=inputVhdlString.findRev(strComment.data())+ll; - // fprintf(stderr,"\n startin code..%d %d %d\n",iCodeLen,num_chars,ll); - //assert(false); - gBlock.reset(); - int len=strComment.length(); - QCString name=strComment.right(len-index);// - name=VhdlDocGen::getIndexWord(name.data(),1); - if (!name) - gBlock.name="misc"+ VhdlDocGen::getRecordNumber(); +static void getType(Entry* p,char* text) +{ + QCString name(text); + name=name.stripWhiteSpace(); + if (qstricmp(name.data(),"signal" )==0) + { + p->spec=VhdlDocGen::SIGNAL; + } + else if (qstricmp(name.data(),"type" )==0) + { + p->spec=VhdlDocGen::TYPE; + } + else if (qstricmp(name.data(),"subtype" )==0) + { + p->spec=VhdlDocGen::SUBTYPE; + } + else if (qstricmp(name.data(),"constant" )==0) + { + p->spec=VhdlDocGen::CONSTANT; + } + else if (qstricmp(name.data(),"attribute" )==0) + { + p->spec=VhdlDocGen::ATTRIBUTE; + } + else if (qstricmp(name.data(),"function" )==0) + { + p->spec=VhdlDocGen::FUNCTION; + } + else if (qstricmp(name.data(),"procedure" )==0) + { + p->spec=VhdlDocGen::PROCEDURE; + } + else if (qstricmp(name.data(),"units" )==0) + { + p->spec=VhdlDocGen::UNITS; + } + else if (name.contains("shared",false) && name.contains("variable",false)) + { + p->spec=VhdlDocGen::SHAREDVARIABLE; + } + else if (qstricmp(name.data(),"file" )==0) + { + p->spec=VhdlDocGen::VFILE; + } + else if (qstricmp(name.data(),"group" )==0) + { + p->spec=VhdlDocGen::GROUP; + } + else if (qstricmp(name.data(),"alias" )==0) + { + p->spec=VhdlDocGen::ALIAS; + } else - gBlock.name=name; - strComment=strComment.left(index); - gBlock.startLine=yyLineNr+1; - gBlock.bodyLine=yyLineNr+1; - VhdlDocGen::prepareComment(strComment); - gBlock.brief+=strComment; -} -static void makeInlineDoc(int endCode) + { + err("wrong type"); + } + p->section=Entry::VARIABLE_SEC; +} + +//------------------------------------------------------------------------- + +/* + * adds signals found in entities|records|units + */ + +static void addSignals(const char* str,int line, Entry *e,const char *comment=0) { - int len=endCode-iCodeLen; - QCString par=inputVhdlString.mid(iCodeLen,len); - gBlock.doc=par; - gBlock.inbodyDocs=par; - gBlock.section=Entry::VARIABLE_SEC; - gBlock.spec=VhdlDocGen::MISCELLANEOUS; - gBlock.fileName = yyFileName; - gBlock.endBodyLine=yyLineNr-1; - gBlock.lang=SrcLangExt_VHDL; - Entry *temp=new Entry(gBlock); + //printf("===> addSignals (%s) comment='%s'\n",str,comment); + QList<QCString> ql; + QCString bufio; + ql.setAutoDelete(TRUE); + + VhdlDocGen::getSigName(ql,str,bufio); + int count = ql.count(); + + QCString brief = current->brief; + QCString doc = current->doc; + Entry *tmpEntry = current; + current = new Entry; + initEntry(current); + handleCommentBlock(comment,TRUE); + if (!current->brief.isEmpty()) + { + if (doc.isEmpty()) + { + doc = brief; + } + else if (!brief.isEmpty()) + { + doc = brief + "<p>" + doc; + } + brief = current->brief; + } + delete current; + current = tmpEntry; + current->brief.resize(0); + current->doc.resize(0); + + if (genPort!=3) // not a unit + { + for (int k=1;k<count;k++) + { + //printf("adding '%s' '%s'\n",ql.at(0)->data(),ql.at(k)->data()); + Entry *pTemp=new Entry; + initEntry(pTemp); + pTemp->startLine = line; + pTemp->bodyLine = line; + pTemp->name = ql.at(k)->data(); + pTemp->section = Entry::VARIABLE_SEC; + pTemp->brief = brief; + pTemp->doc = doc; + pTemp->mGrpId = current->mGrpId; // copy member group id + QCString stSpec = ql.at(0)->data(); + if (genPort==1) // found port + { + pTemp->spec = VhdlDocGen::PORT; + stSpec.stripPrefix(bufio.data()); + stSpec=stSpec.stripWhiteSpace(); + pTemp->args = stSpec; + pTemp->type = bufio; + addSubEntry(e,pTemp); + } + else if (genPort==2) // found record + { + pTemp->spec = VhdlDocGen::RECORD; + pTemp->type = stSpec; + pTemp->name.prepend(VhdlDocGen::getRecordNumber()); + delete current; + current = new Entry(*pTemp); // make a deep copy of pTemp + newEntry(); // add it to lastCompound and make a new current + delete pTemp; + } + else + { + pTemp->spec = VhdlDocGen::GENERIC; + pTemp->type = stSpec; + addSubEntry(e,pTemp); + } + }// for + } + else // found a unit + { + Entry *pTemp=new Entry; + initEntry(pTemp); + QCString tt(str); + QStringList ql=QStringList::split("=",tt,FALSE); + pTemp->spec = VhdlDocGen::UNITS; + pTemp->section = Entry::VARIABLE_SEC; + pTemp->startLine = line; + pTemp->bodyLine = line; + pTemp->brief = brief; // adds brief description to the unit member + pTemp->doc = doc; // adds doc to the unit member + pTemp->type = ql[1].utf8(); + pTemp->name = ql[0].utf8().stripWhiteSpace(); + pTemp->name.prepend(VhdlDocGen::getRecordNumber()); + delete current; + current = new Entry(*pTemp); // make a deep copy + newEntry(); // add it to lastCompound + delete pTemp; + } +} + +/* + * this function parses a process prototype + * and adds the signal to the process + */ + +static void parseProcessProto() +{ + QStringList ql; + QCString qcs; + bool sem=FALSE; + //Entry* ppEntry=new Entry; + //ppEntry->fileName=yyFileName; + //processEntry=ppEntry; + QCString name; + scantype=0; + getBufText(qcs,0); + if (qcs.contains('(') != qcs.contains(')')) return; + VhdlDocGen::deleteAllChars(qcs,'\n'); + VhdlDocGen::parseProcessProto(qcs,name,ql); + current->section=Entry::FUNCTION_SEC; + //current->stat=TRUE; + current->spec=VhdlDocGen::PROCESS; + current->startLine=iFuncLine; + current->bodyLine=iFuncLine; + current->fileName=yyFileName; + if (!name.isEmpty()) + { + current->name=name.stripWhiteSpace(); + } + else // found an anonymous process, so we add a generated name + { + current->name=VhdlDocGen::getProcessNumber(); + } + + current->args+=" ( "; + if (!ql.isEmpty()) + { + QValueList<QString>::Iterator iter = ql.begin(); + for ( ; iter != ql.end(); ++iter) + { + if (sem) + { + current->args+=','; + } + Argument *arg=new Argument; + arg->name=(*iter).utf8().stripWhiteSpace(); + current->argList->append(arg); + current->args+=(*iter).utf8(); + sem = TRUE; + } + } + current->args+=" ) "; + bufferClear(); +}//parseProcessProto + + +/* + * parses a function|procedure protoype + */ + +static void parseFunctionProto() +{ + QCString name,ret,qcs,temp; + bool sem=FALSE; + QList<Argument> ql; + ql.setAutoDelete(TRUE); + getBufText(qcs,0); + if (qcs.contains('(') != qcs.contains(')')) + return; // function without a prototype + if (qcs.contains("function",FALSE)==0 && qcs.contains("procedure",FALSE)==0) + return; + qcs=qcs.stripWhiteSpace(); + temp=qcs.lower(); + if (temp.stripPrefix("impure")) + { + current->exception="impure"; + qcs=qcs.remove(0,6); + } + else if (temp.stripPrefix("pure")) + { + current->exception="pure"; + qcs=qcs.remove(0,4); + } - Entry* compound=getVhdlCompound(); + VhdlDocGen::parseFuncProto(qcs.data(),ql,name,ret); + //printf("parseFuncProto(%s)=%s,%s\n",qcs.data(),name.data(),ret.data()); + VhdlDocGen::deleteAllChars(name,';'); + current->name=name; + current->startLine=iFuncLine; + current->bodyLine=iFuncLine; - if (compound) + int count = ql.count(); + + current->args+" ( "; + for (int k=0;k<count;k++) { - compound->addSubEntry(temp); + if (sem) + { + current->args+=","; + } + Argument *arg=new Argument; + Argument *hh=(Argument*)ql.at(k); + arg->name=hh->name; + arg->type=hh->type; + arg->defval=hh->defval; + arg->attrib=hh->attrib; + current->argList->append(arg); + current->args+=hh->name; + sem=TRUE; } + current->args+" )"; + + if (!ret.isEmpty()) + current->spec=VhdlDocGen::FUNCTION; else + current->spec=VhdlDocGen::PROCEDURE; + + current->section=Entry::FUNCTION_SEC; + current->type=ret; + //addSubEntry(ee,ppEntry); + if (lastCompound) { - temp->type="misc"; // global code like library ieee... - current_root->addSubEntry(temp); + lastCompound->addSubEntry(current); + current = new Entry; + initEntry(current); } - strComment.resize(0); - gBlock.reset(); + else + { + newEntry(); + } + bufferClear(); +}//parseFunctionProto + +static Entry* getEntryAtLine(const Entry* ce,int line) +{ + EntryListIterator eli(*ce->children()); + Entry *found=0; + Entry *rt; + for (;(rt=eli.current());++eli) + { + if (rt->bodyLine==line) + { + found=rt; + } // if + if (!found) + { + found=getEntryAtLine(rt,line); + } + } + return found; +}// getEntryAtLine +//------------------------------------------------------------------------- -}// makeInlineDoc +static void parserInit() +{ + iCounter=0; + iTextCounter=0; + yyLineNr=1; + current=0; + previous=0; + isFunc=0; + isBody=0; + scantype=0; + lastCompound=0; + lastEntity=0; + bropen=0; + openGroups=0; + iDocLine=-1; + qrl.clear(); + num_chars=0; + + if (!g_lexInit) + { + VhdlDocGen::init(); + } + + g_bufSize=inputFile.size()+1024; + if (g_buf==0) free(g_buf); + g_buf=(char*)(calloc(g_bufSize,sizeof(char))); + + if (g_buf==0) + { + fprintf(stderr,"\n not enough memory"); + return; + } + g_buf[g_bufSize-1]='\0'; +} -static bool isConstraintFile(const QCString &fileName,const QCString &ext) +bool VHDLLanguageScanner::needsPreprocessing(const QCString &) { - return fileName.right(ext.length())==ext; + return FALSE; } -//static void resetScanner(const char* s,MyParserVhdl* parse); -#undef YY_INPUT -#define YY_INPUT(buf,result,max_size) result=vhdlscannerYYread(buf,max_size); +void VHDLLanguageScanner::resetCodeParserState() +{ + +} +#undef YY_INPUT +#define YY_INPUT(buf,result,max_size) result=yyread(buf,max_size); -static int vhdlscannerYYread(char *buf,int max_size) +static int yyread(char *buf,int max_size) { int c=0; - while ( c < max_size && inputVhdlString.at(inputPosition) ) + if (g_inputFromFile) + { + c = inputFile.readBlock(buf,max_size); + if (c==-1) yy_fatal_error("input in flex scanner failed"); + } + else { - *buf = inputVhdlString.at(inputPosition++) ; - c++; buf++; + while ( c < max_size && inputString[inputPosition] ) + { + *buf = inputString[inputPosition++] ; + c++; + buf++; + } } return c; } -%} -upper_case_letter [A-Z] -digit [0-9] -special_character [\#\&\'\(\)\*\+\,\-\.\/\:\;\<\=\>\_\|] -space_character [ \t] -format_effector [\t\v\r\l\f] -end_of_line \n -lower_case_letter [a-z] -other_special_character [\!\$\@\?\[\\\]\^\`\{\}\~] -graphic_character ({basic_graphic_character}|{lower_case_letter}|{other_special_character}) -basic_graphic_character ({upper_case_letter}|{digit}|{special_character}|{space_character}) -letter ({upper_case_letter}|{lower_case_letter}) -letter_or_digit ({letter}|{digit}) -decimal_literal {integer}(\.{integer})?({exponent})? -integer {digit}(_?{digit})* -exponent ([eE][-+]?{integer}) -base {integer} -based_integer {extended_digit}(_?{extended_digit})* -extended_digit ({digit}|[a-fA-F]) +%} -extended_character [\\]{graphic_character}*[\\] -base_specifier {digit}*(B|b|D|O|o|X|x|"UB"|"UO"|"UX"|"SB"|"SO"|"SX") + /* start command character */ + /* -------------- VHDL SECTION -----------------------------------*/ + +B [ \t] +CR [\r\n] +BR [ \t\n\r] +DIGIT [0-9] +LOWER_CASE_LETTER [a-z] +UPPER_CASE_LETTER [A-Z] +LETTER [a-zA-Z_0-9] +SPACE_CHARACTER [ \t] +SPECIAL_CHARACTER [#&'()*+,\-\./:;<=>_|] +OTHER_SPECIAL_CHARACTER [~!$§%?@\[\\\]^{}] +BASIC_GRAPHIC_CHARACTER {UPPER_CASE_LETTER}|{DIGIT}|{SPECIAL_CHARACTER}|{SPACE_CHARACTER} +GRAPHIC_CHARACTER {BASIC_GRAPHIC_CHARACTER}|{LOWER_CASE_LETTER}|{OTHER_SPECIAL_CHARACTER} +EXTENDED_CHARACTER [\\]{GRAPHIC_CHARACTER}*[\\] + +NAME ({LETTER}[a-zA-Z0-9_.]*)|{EXTENDED_CHARACTER} +STRING_LITERAL \"{GRAPHIC_CHARACTER}*\" +FUNCNAME ([a-zA-Z"][*+\-_a-zA-Z0-9"\/=<>]*)|{EXTENDED_CHARACTER} +DIGITS [0-9]+|[0-9]+"."[0-9]+|[0-9]+"#"[0-9_a-fA-F\+\.]+"#" +COMMENT "--"[^\n]* +LABELID [a-z_A-Z][^\;]*";"({B}*{COMMENT})* +PROTO [ (]* +TEXTT "--"[^\/\@\*\#][^\n]* +PROC ("function"|"procedure") +ENDE ({BR}*("end"){BR}*{PROC}*{BR}*[;]{1}) +ENDEFF ("if"|"case"|"loop"|"generate"){BR}*[;] +ENDE3 ({BR}*("end"){BR}*{PROC}*{BR}*{FUNCNAME}{BR}*[;])|{ENDE} +ENDFUNC {B}*"end"{BR}*{PROC}*{BR}*{FUNCNAME}{BR}*[;] +FUNCIMPURE "impure"|"pure" +FUNCPROC ^{B}*{FUNCIMPURE}*{BR}*("function"|"procedure"){B}* +ARCHITECTURE ("architecture"){BR}+{NAME}{BR}*("of") + /* Removed due to bug 538239 + POST "postponed" + PROCESS ({BR}*{FUNCNAME}{B}*[:]{BR}*({POST}{BR}+)?("process"){BR}*{PROTO})|("process"){BR}*("("){BR}*{PROTO}|[^a-zA-Z]("process"){CR}|[^a-zA-Z]("process"){BR}+("is") + */ +PROCESS ({B}*{FUNCNAME}{B}*:{BR}*)?({B}*("postponed"){BR}+)?{B}*("process"){BR}*{PROTO} + +ENDPROCESS ("end"){BR}*("postponed")*("process"){BR}*{FUNCNAME}*{BR}*[;] +LIBUSE ^{B}*("use"|"library"){BR}+ +ENTITY ^{B}*("component"|"entity"|"package"){BR}+ +PBODY ("package"){B}+("body"){BR}+{NAME} +SHARED ("shared"){BR}+("variable") +SIGTYPES ^{B}*({SHARED}|"alias"|"file"|"group"|"subtype"|"type"|"constant"|"attribute"|"signal"|"units"){BR}+ +CONFIG ("configuration"){BR}+{NAME}{BR}*("of"){BR}+{NAME}{BR}+"is" + +ALLTYPESMAP {B}*[_a-zA-ZA_Z0-9.() ]*{B}* +MAPCOMPONENT ({ALLTYPESMAP}{BR}*[:]{BR}*("component"|"configuration")*{ALLTYPESMAP}{BR}*{TEXTT}*{BR}*("port"|"generic"){BR}*("map"){BR}*("("){1}) +MAPCOMPONENT1 ({ALLTYPESMAP}{BR}*[:]{BR}*("entity"){BR}*{ALLTYPESMAP}{BR}*("port"|"generic"){BR}*("map"){BR}*("("){1}) + +BRACEOPEN [(]{1} +BRACECLOSE [)]{1} + +ALLID [^;()\t ] + +/* VHDL 2001 */ +ENDPROTECTED ("end"{BR}+"protected"{BR}+{NAME}{BR}*";")|("end"{BR}+"protected"{BR}*";") +ENDPROTECEDBODY "end"{BR}+"protected"{BR}+"body"{BR}+{NAME} -vhdl2008tooldir `{graphic_character}+ -B [ \t] -BR [ \t\n\r] +%option noyywrap + /* language parsing states */ -%option noyywrap +%x Start %x Comment -%x Vhdl2008Comment -%x EndVhdl2008Comment +%x FindTypeName +%x ParseType +%x ParseRecord +%x ParseUnits +%x ParseProcess +%x ParseFunc +%x FindName +%x FindEntityName +%x FindGenPort +%x FindTypes +%x FindSigName +%x FindFuncName +%x FindBegin + %% -{space_character} { /* nothing */ } -\& { return(t_Ampersand); } -\' { return(t_Apostrophe); } -\( { return(t_LeftParen); } -\) { return(t_RightParen); } -"**" { return(t_DoubleStar); } -\* { return(t_Star); } -\+ { return(t_Plus); } -\, { return(t_Comma); } -\- { return(t_Minus); } -":=" { return(t_VarAsgn); } -\: { return(t_Colon); } -\; { return(t_Semicolon); } -"<=" { return(t_LESym); } -">=" { return(t_GESym); } -\< { return(t_LTSym); } -\> { return(t_GTSym); } -\= { return(t_EQSym); } -\/= { return(t_NESym); } -"=>" { return(t_Arrow); } -"<>" { return(t_Box); } -"<<" { return(t_SLSL); } -">>" { return(t_SRSR); } -"??" { return(t_QQ); } -"?>=" { return(t_QGT); } -"?<=" { return(t_QLT); } -"?>" { return(t_QG); } -"?<" { return(t_QL); } -"?=" { return(t_QEQU); } -"?/=" { return(t_QNEQU); } -\? { return(t_Q); } -\| { return(t_Bar); } -\. { return(t_Dot); } -\/ { return(t_Slash); } -\@ { return(t_At); } -\^ { return(t_Neg); } -\[ { return(t_LEFTBR); } -\] { return(t_RIGHTBR); } - - -{letter}(_?{letter_or_digit})*|{extended_character} { - int itoken=find_keyword(vhdlscannerYYtext); - - // fprintf(stderr,"\n <<<< search tok: %s %d %d>>>\n",vhdlscannerYYtext,itoken,yyLineNr); - - // tokens in vhdlparser.hpp 258..412 - if (itoken>200 && itoken<500 && prevToken!=t_END) - { - // printf("\n <<<< insert tok: %s %d %d>>>\n",vhdlscannerYYtext,itoken,yyLineNr); - lineIndex[itoken]=yyLineNr; - } - - // global members - if (( itoken==t_ARCHITECTURE ) || - ( itoken==t_ENTITY) || - ( itoken==t_PACKAGE ) || - ( itoken==t_LIBRARY ) || - ( itoken==t_USE ) || - ( itoken==t_CONFIGURATION ) || - ( itoken==t_CONTEXT ) ) - { - lineIndex[itoken]=yyLineNr; - } - - prevToken=itoken; - - yycont->qstr=vhdlscannerYYtext; - yycont->yyLineNr=yyLineNr; - if (itoken== -1) - { - yycont->iLine=yyLineNr; - return ( t_LETTER ); - } - else - { - return ( itoken ); - } - } +<Start>{ENDPROTECTED}|{ENDPROTECEDBODY} { + lineCount(); +} -({decimal_literal})|({base}#{based_integer}(\.{based_integer})?#({exponent})?)|({base}:{based_integer}(\.{based_integer})?:({exponent})?) { - yycont->qstr=vhdlscannerYYtext; - return ( t_ABSTRLIST ); - } -'({graphic_character}|\"|\%)' { - QCString q(vhdlscannerYYtext); - yycont->qstr=vhdlscannerYYtext; - - if (q=="'('") // std_logic'('1') ? - { - char c=yy_hold_char; - if (isalpha(c) || isdigit(c)) - { - unput('\''); - unput('('); - return(t_Apostrophe); - } - else - { - return ( t_CHARLIST ); - } - } - return ( t_CHARLIST ); - } -(\"({graphic_character}|(\"\")|\%)*\")|(\%({graphic_character}|(\%\%)|\")*\%) { - yycont->qstr=vhdlscannerYYtext; - yycont->iLine=yyLineNr; - return ( t_STRING ); - } +<Start>{CONFIG} { // found configuration -{base_specifier}(\"{extended_digit}(_?{extended_digit})*\"|\%{extended_digit}(_?{extended_digit})*\%) { - yycont->qstr=vhdlscannerYYtext; - yycont->iLine=yyLineNr; - return ( t_DIGIT ); - } + QCString qcs(vhdlscannerYYtext); + current->name=VhdlDocGen::getIndexWord(qcs,1); + current->type=VhdlDocGen::getIndexWord(qcs,3); + current->startLine=yyLineNr; + current->bodyLine=yyLineNr; + current->section=Entry::VARIABLE_SEC; + current->spec=VhdlDocGen::CONFIG; + current->args="configuration"; + newEntry(); + BEGIN(Start); +} -{vhdl2008tooldir} { - yycont->qstr=vhdlscannerYYtext; - yycont->iLine=yyLineNr; - return(t_ToolDir); - } +<Start>{SIGTYPES} { // found type constant|type|attribute and so on.. + bropen=0; + lineCount(); -\n { - yyLineNr++; - yycont->yyLineNr=yyLineNr; - } + bufferClear(); + //pEntry=current; + getType(current,yytext); + current->bodyLine=yyLineNr; + if (current->spec==VhdlDocGen::UNITS) + { + //addSubEntry(current,pEntry); + current->startLine=yyLineNr; + current->bodyLine=yyLineNr; + newEntry(); // adds the unit to the lastCompound + genPort=3; + BEGIN(ParseRecord); + } + else + { + BEGIN(FindTypeName); + } + } -<*>"--"[^\n]* { - /* comment */ - QCString qcs(vhdlscannerYYtext); - // vhdl comment ? - if (qcs.stripPrefix("--!")) - { - REJECT; - } - else if (qcs.stripPrefix("--#")) - { - if (VhdlDocGen::getFlowMember()) - { - FlowChart::addFlowChart(FlowChart::COMMENT_NO,0,0,qcs.data()); - } - } - } -. { /* unknown characters */ } - - -<*>{B}*"--!"[^{}\n]*[^\n]*\n/{B}*"--!" { // multi line comment - if (iDocLine==-1) iDocLine=yyLineNr; - QCString qc(vhdlscannerYYtext); - int len=qc.contains('\n')+yyLineNr-1; - if (YY_START!=Comment) // Start of the comment block +<Start>{ARCHITECTURE} { //found architecure + lineCount(); + bropen=0; + bufferClear(); + isBody=0; + lastCompound = current; + QCString curName=VhdlDocGen::getIndexWord(yytext,1); + current->section=Entry::CLASS_SEC; //Entry::CLASS_SEC; + current->spec=VhdlDocGen::ARCHITECTURE; + current->protection=Private; + current->name=curName; + current->fileName=yyFileName; + current->startLine=yyLineNr; + current->bodyLine=yyLineNr; + //printf("-> Architecture at line %d\n",yyLineNr); + BEGIN(FindName); +} + + +<Start>{PROCESS} { //found process + lineCount(); + iFuncLine=yyLineNr; + bropen=0; + //printf("--> Process: line=%d\n",yyLineNr); + bufferClear(); + addText(yytext,yyleng); + QCString qcs(yytext); + if (qcs.contains('(')) { - startComment=yyLineNr; - g_lastCommentContext=YY_START; + bropen=1; + scantype=2; + BEGIN(ParseType); + } + else + { + // iFuncLine--; + parseProcessProto(); + BEGIN(ParseProcess); + } +} + +<Start>{LIBUSE}{BR}* { // found library or package + bropen=0; + bufferClear(); + isBody=0; + QCString qcs=QCString(yytext); + // lowerString(qcs); + qcs=qcs.stripWhiteSpace(); + if (qstricmp(qcs.data(),"use")==0) + { + current->spec=VhdlDocGen::USE; + current->type="package"; } - - if(!checkMultiComment(qc,len)) + else { - strComment+=vhdlscannerYYtext; + current->spec=VhdlDocGen::LIBRARY; + current->type="library"; } + current->section=Entry::VARIABLE_SEC; + current->bodyLine=yyLineNr; lineCount(); - BEGIN(Comment); + BEGIN(FindName); } -<Comment>^{B}*"--!"[^\n]* { - if (iDocLine==-1) iDocLine=yyLineNr; - strComment+=vhdlscannerYYtext; - int index=strComment.find("\\code"); - if (index>0) +<Start>{FUNCPROC} { // found a new function|procedure + lineCount(); + iFuncLine=yyLineNr; + bropen=0; + bufferClear(); + isFunc=1; + addText(yytext,yyleng); + BEGIN(FindFuncName); +} + +<Start>{ENTITY} { // found entity|component|package + lineCount(); + //printf("--> Entity at line %d\n",yyLineNr); + + bropen=0; + bufferClear(); + QCString word = QCString(yytext).lower().stripWhiteSpace(); + + if (word=="entity") + { + isBody=0; + scantype=0; + lastCompound=0; + current->section=Entry::CLASS_SEC; + current->spec=VhdlDocGen::ENTITY; + current->protection=Public; + current->bodyLine=yyLineNr; + current->fileName=yyFileName; + lastEntity = current; + } + else if (word=="component") + { + current->section=Entry::VARIABLE_SEC; + // current->stat=TRUE; + current->spec=VhdlDocGen::COMPONENT; + current->bodyLine=yyLineNr; + scantype=1; + } + else if (word=="package") + { + isBody=0; + scantype=0; + lastCompound = current; + current->section=Entry::NAMESPACE_SEC; + current->spec=VhdlDocGen::PACKAGE; + current->protection=Package; //VhdlDocGen::PACKAGE; + current->bodyLine=yyLineNr; + current->fileName=yyFileName; + } + else + err("\n found wrong component at line [%d]",yyLineNr); + + BEGIN(FindEntityName); +} + +<Start>{MAPCOMPONENT}|{MAPCOMPONENT1} { // found component instantiation + + // lineCount(); + QCString type; + QCString tt(yytext); + QRegExp regg("[\\s:.()-]"); + QStringList qsl=QStringList::split(regg,tt,false); + + // consider upper/lower-case letters + QStringList qsltemp=QStringList::split(regg,tt.lower(),false); + int index=qsltemp.findIndex(QCString("entity"))+1; + index+=qsltemp.findIndex(QCString("component"))+1; + index+=qsltemp.findIndex(QCString("configuration"))+1; + int len=qsltemp.count(); + + current->spec=VhdlDocGen::COMPONENT_INST; + current->section=Entry::VARIABLE_SEC; + current->startLine=yyLineNr; + current->bodyLine=yyLineNr; + + if (index!=0 && tt.contains(')')==0) // found component instantiation xxx: configuration/component/entity yyy + { + current->type=qsl[len-3].utf8(); + } + else if (index!=0 && tt.contains(')')) // found component instantiation xxx: entity www.yyy(zzz) { - startCodeBlock(index); - doxComment=TRUE; + current->type=qsl[len-4].utf8(); } + else + { + current->type=qsl[1].utf8(); // found component instantiation xxx:yyy + } + + current->name=qsl[0].utf8(); +#if 0 + if (lastCompound) + { + if (!VhdlDocGen::foundInsertedComponent(current->type,lastCompound)) + { + printf("** %s: new BaseInfo(%s)\n",lastCompound->name.data(),current->type.data()); + BaseInfo *bb=new BaseInfo(current->type,Public,Normal); + lastCompound->extends->append(bb); + } + lastCompound->addSubEntry(current); + current = new Entry; + initEntry(current); + } + else +#endif + { + newEntry(); + } + lineCount(); + +} + +<Start>{CR}* { lineCount(); - BEGIN(Comment); + addText(yytext,yyleng); + BEGIN(Start); } -<Comment>.|\n { - // found end of comment block - - int index =strComment.find("\\code"); - if (index>0) - { - startCodeBlock(index); - } - - VhdlDocGen::prepareComment(strComment); - - - if (index==-1 && !doxComment) - { - handleCommentBlock(strComment,FALSE); - } - strComment.resize(0);; - unput(*vhdlscannerYYtext); - doxComment=FALSE; - BEGIN(g_lastCommentContext); - } - -<*>"--!"[^\n]* { // one line comment - if (iDocLine==-1) iDocLine=yyLineNr; - QCString qcs(vhdlscannerYYtext); +<ParseProcess>[^;()] { + // eat process body + lineCount(); + BEGIN(ParseProcess); +} - bool isEndCode=qcs.contains("\\endcode"); +<ParseProcess,ParseType>{ENDPROCESS} { // find end of process + lineCount(); + current->endBodyLine=yyLineNr; + //printf("Process: start=%d end=%d\n",current->bodyLine,current->endBodyLine); + if (lastCompound) + { + lastCompound->addSubEntry(current); + current = new Entry; + initEntry(current); + } + else + { + newEntry(); + } + BEGIN(Start); +} - int index = qcs.find("\\code"); - if (isEndCode) - { - int end=inputVhdlString.find(qcs.data(),iCodeLen); - makeInlineDoc(end); - } - else if (index > 0 ) - { - // assert(false); - strComment=qcs; - startCodeBlock(index); - strComment.resize(0); - } - //printf("--> handleCommentBlock line %d\n",yyLineNr); - if (!isEndCode && index==-1) - { - int j=qcs.find("--!"); - qcs=qcs.right(qcs.length()-3-j); - - if(!checkMultiComment(qcs,yyLineNr)) - { - handleCommentBlock(qcs,TRUE); - } - }//endcode - } - -<*>"/*" { - strComment+=vhdlscannerYYtext; - if (yy_hold_char=='!') // found comment starting with "/*!" - { - doxComment=TRUE; - } - BEGIN(Vhdl2008Comment); - } +<ParseUnits>{BR}* { + lineCount(); +} + +<ParseUnits>{B}*[a-z_][^\n;]* { // parse record|unit body + lineCount(); + QCString zz(yytext); + addSignals(zz.data(),yyLineNr,current); + BEGIN(ParseUnits); +} + +<FindName>{NAME} { // found entity|architecture|component name + lineCount(); + + QCString qcs(yytext); + qcs=qcs.stripWhiteSpace(); + if (current->spec==VhdlDocGen::USE || current->spec==VhdlDocGen::LIBRARY) + { + int j=qcs.length(); + int i=qcs.find("."); + if (i>0) + qcs=qcs.right(j-i-1); + i=qcs.find("."); + if (i>0) + qcs=qcs.left(i); + /* + -- Consider the case we have more than one entity in one file.Each entity has its own package/library + -- declaration. In this case package yyy will be added [with newEntry()] to architecture aaa !! instead to entity + -- bbb. We must place these constructs to current_root and the function mapLibPackage() will finish the rest. + + -- package xxx; + -- entity aaa + -- .... + -- end entity aaa; + -- architecture aaa + -- ... + -- end architecture aaa; + -- package yyy; + -- entity bbb; + */ + + current->name=qcs; + Entry *copy=new Entry(*current); + current->reset(); + addSubEntry(current_root,copy); // insert into entry list with mapLibPackage() + } + else if (current->spec==VhdlDocGen::ARCHITECTURE) + { + //current->name+=qcs.lower(); + current->name.prepend(qcs+"::"); + + //if (lastEntity) + //{ + // inherit private inheritance relation between entity and architecture + //if (!VhdlDocGen::foundInsertedComponent(current->name,lastEntity)) + //{ + // BaseInfo *bb=new BaseInfo(current->name,Private,Normal); + // lastEntity->extends->append(bb); + //} + //} + + } + else if (current->spec==VhdlDocGen::PACKAGE_BODY) + { + current->name+=qcs; + } + else + { + current->name+=qcs; + } + if (!(current->spec==VhdlDocGen::USE || current->spec==VhdlDocGen::LIBRARY)) + newEntry(); + + BEGIN(Start); +} + +<FindFuncName>{FUNCNAME} { // found name of a process|function|procedure + lineCount(); + + addText(yytext,yyleng); + BEGIN(ParseType); +} + +<FindTypeName>{NAME}{BR}* { + lineCount(); + current->name=QCString(yytext); + BEGIN(ParseType); +} + + +<ParseType>("is"){BR}+("protected"){BR}+("body") {lineCount(); BEGIN(Start); } + +<ParseType>("is"){BR}+("protected"){BR}+ { + lineCount(); + current->section=Entry::VARIABLE_SEC; + current->spec=VhdlDocGen::TYPE; + current->type="protected"; + newEntry(); + BEGIN(Start); +} + + + + +<ParseType>("is"){BR}*("record") { // find record + lineCount(); + if (isFunc) + { + BEGIN(Start); + } + + genPort=2; + current->section=Entry::VARIABLE_SEC; + current->spec=VhdlDocGen::RECORD; + addText(yytext,yyleng); + newEntry(); // adds the record to the last compound + BEGIN(ParseRecord); +} + +<ParseRecord>{BR}* { + lineCount(); + } + +<ParseRecord>("end"){BR}*("record"){BR}*{LETTER}*{BR}*[;]|("end"){BR}*("units"){BR}*[;] { + lineCount(); + genPort=0; + bufferClear(); + BEGIN(Start); +} + +<ParseRecord>[a-z_A-Z0-9][^\n;]*";"({B}*{COMMENT})* { // parse record body + lineCount(); + QCString comment; + QCString zz(yytext); + VhdlDocGen::deleteAllChars(zz,';'); //delete ; in unit construct + if (zz.contains("--!")) + { + QStringList ql=QStringList::split("--!",zz,FALSE); + comment = ql[1].utf8(); + zz = ql[0].utf8(); + } + else if (zz.contains("--")) + { + QStringList ql=QStringList::split("--",zz,FALSE); + zz = ql[0].utf8(); + } + initEntry(current); + addSignals(zz,yyLineNr,current,comment); + addText(yytext,yyleng); + BEGIN(ParseRecord); +} + +<ParseType>{BR}+("is"){BR}+|{BR}+("is"){B}*"--" { // found a new function in an architecture ? + addText(yytext,yyleng); + lineCount(); + QCString ttt; + bool bb=TRUE; + getBufText(ttt,0); + if (ttt.contains("--")) + { + unput('-');unput('-'); + VhdlDocGen::deleteCharRev(ttt,'-'); + VhdlDocGen::deleteCharRev(ttt,'-'); + } + if (ttt.contains('(') != ttt.contains(')')) + { + bb=FALSE; + } + bool ss = VhdlDocGen::isFunctionProto(ttt); + //printf("VhdlDocGen::isFunctionProto(%s)=%d\n",ttt.data(),ss); + if (ss && bb) + { + bufferClear(); + addText(ttt.data(),ttt.length()); + functionEntry=0; + //eFuncBody=new Entry; + ::parseFunctionProto(); + } + bufferClear(); + BEGIN(ParseType); +} -<Vhdl2008Comment>[^*]*[*]+ { - QCString tt(vhdlscannerYYtext); - int len=tt.length(); - yyLineNr+=tt.contains('\n'); - // delete * from comments - // /*! - // * see vim ! - // */ +<ParseType>[^;()\t ] { + lineCount(); + addText(yytext,yyleng); + BEGIN(ParseType); +} - if (yytext[len-1]=='*' && tt.contains('\n')) +<ParseType>{BRACEOPEN} { + lineCount(); + bropen++; + addText(yytext,yyleng); + BEGIN(ParseType); +} + +<ParseType>{BRACECLOSE} { + lineCount(); + bropen--; + addText(yytext,yyleng); + if (bropen==0 && scantype==2) // process + { + ::parseProcessProto(); + BEGIN(ParseProcess); + } // if + else + { + BEGIN(ParseType); + } +} + + +<ParseType>{ENDE}|{ENDFUNC} { // found end of function|process + QRegExp regg("[\\s;]"); + lineCount(); + QCString tt(yytext); + tt=tt.lower(); + QStringList ql=QStringList::split(regg,tt,FALSE); + int index=ql.findIndex(QCString("if"))+1; + index+=ql.findIndex(QCString("case"))+1; + index+=ql.findIndex(QCString("loop"))+1; + index+=ql.findIndex(QCString("generate"))+1; + bufferClear(); + if (index==0) + { + if (isFunc) + { + Entry* pFunc=getEntryAtLine(current_root,iFuncLine); + if (pFunc && pFunc->section==Entry::FUNCTION_SEC) + { + pFunc->endBodyLine=yyLineNr; + } + isFunc=0; + BEGIN(Start); + } + } +} + +<ParseFunc>[^;()] { + // eat process body + lineCount(); + BEGIN(ParseFunc); + } + +<ParseFunc>{ENDE3} { + QRegExp regg("[\\s;]"); + lineCount(); + QCString tt(yytext); + tt=tt.lower(); + QStringList ql=QStringList::split(regg,tt,FALSE); + int index=ql.findIndex(QCString("if"))+1; + index+=ql.findIndex(QCString("case"))+1; + index+=ql.findIndex(QCString("loop"))+1; + index+=ql.findIndex(QCString("generate"))+1; + bufferClear(); + if (index==0 && isFunc) + { + Entry* pFunc=getEntryAtLine(current_root,iFuncLine); + if (pFunc && pFunc->section==Entry::FUNCTION_SEC) + { + pFunc->endBodyLine=yyLineNr; + } + isFunc=0; + BEGIN(Start); + } +} + +<ParseType>";" { + lineCount(); + addText(yytext,yyleng); + if (bropen==0 && !(isFunc==1 && isBody==1) ) + { + if (isFunc) + { + parseFunctionProto(); + bufferClear(); + if (lastCompound && lastCompound->spec==VhdlDocGen::PACKAGE) + { + isFunc=0; + BEGIN(Start); + } + else + { + BEGIN(ParseFunc); + } + }//if + else + { + QCString qcs; + getBufText(qcs,0); + qcs=qcs.stripWhiteSpace(); + current->section=Entry::VARIABLE_SEC; + current->type+=qcs.data(); + + if ((current->spec==VhdlDocGen::SIGNAL || + current->spec==VhdlDocGen::CONSTANT || + current->spec==VhdlDocGen::TYPE || + current->spec==VhdlDocGen::SUBTYPE || + current->spec==VhdlDocGen::SHAREDVARIABLE + ) && + qcs.stripPrefix(",")) + { + QList<QCString> ql; + ql.setAutoDelete(TRUE); + QCString buffer; + if (current->spec==VhdlDocGen::SUBTYPE || + current->spec==VhdlDocGen::TYPE + ) + { + VhdlDocGen::getSigTypeName(ql,qcs.data(),buffer); + } + else + { + VhdlDocGen::getSigName(ql,qcs.data(),buffer); + } + QCString doc = current->doc; + QCString brief = current->brief; + if (ql.count()>0) + { + for (uint j=1;j<ql.count();j++) { - QCString ss=tt; - VhdlDocGen::deleteAllChars(ss,' '); - VhdlDocGen::deleteAllChars(ss,'\t'); - if (ss.data() && ss.at(ss.length()-2)=='\n') + Entry *ppt = new Entry; + initEntry(ppt); + ppt->type += ql.at(0)->data(); + ppt->section = Entry::VARIABLE_SEC; + ppt->spec = current->spec; + ppt->name += ql.at(j)->data(); + ppt->bodyLine = yyLineNr; + ppt->startLine = yyLineNr; + ppt->brief = brief; + ppt->doc = doc; + if (lastCompound) { - tt=tt.left(len-1); - len--; + lastCompound->addSubEntry(ppt); + } + else + { + current->addSubEntry(ppt); } } + current->type=ql.at(0)->data(); + ql.clear(); + } + } + if (lastCompound) + { + lastCompound->addSubEntry(current); + current = new Entry; + initEntry(current); + } + else + { + newEntry(); + } + isFunc=0; + bufferClear(); + BEGIN(Start); + } + } + else + { + BEGIN(ParseType); + } +} - // fprintf(stderr,"\n << %s >>",tt.data()); - strComment+=tt; - char c=yy_hold_char; - if (c =='/') - { - unput('*'); - BEGIN(EndVhdl2008Comment); - } - else - { - BEGIN(Vhdl2008Comment); - } - } +<ParseType>{BR}* { + lineCount(); + addText(yytext,yyleng); + BEGIN(ParseType); +} -<EndVhdl2008Comment>"*/" { - if (doxComment) - { - strComment.stripPrefix("/*!"); - strComment= strComment.left( strComment.length()-1); - handleCommentBlock( strComment,TRUE); - } - doxComment=FALSE; - strComment.resize(0); - BEGIN(INITIAL); +<FindEntityName>{NAME} { // found name of an entity/architecture/package + lineCount(); + QCString qcs(yytext); + qcs=qcs.stripWhiteSpace(); + qcs=qcs.lower(); + if (qcs=="body") // found package body + { + current->spec=VhdlDocGen::PACKAGE_BODY; + current->section=Entry::CLASS_SEC; + current->protection=Protected; + current->name+=QCString("_"); + isBody=1; + BEGIN(FindName); + } + else if (scantype==1) // found a component + { + QCString qq(yytext); + qq=qq.stripWhiteSpace(); + //qq=qq.lower(); + + current->name=qq; + qq=qq.lower(); + if (lastCompound) + { + if (lastCompound->spec==VhdlDocGen::PACKAGE) + { + if (!VhdlDocGen::foundInsertedComponent(qq,lastCompound)) + { + BaseInfo *bb=new BaseInfo(qq,Private,Normal); + lastCompound->extends->append(bb); } + } + lastCompound->addSubEntry(current); + current = new Entry; + initEntry(current); + } + else + { + newEntry(); + } + BEGIN(Start); + } + else + { + QCString qq(yytext); + qq=qq.stripWhiteSpace(); + current->name=qq; + newEntry(); + //QCString qreal=QCString(yytext); + BEGIN(Start); + } +} -%% +<Start>{B}*("generic"|"port"){BR}*[(]+ { // found generic|port in entity + QCString genp(yyleng+1); + deleteSpecChars(yytext,genp.data()); + VhdlDocGen::deleteCharRev(genp,'('); -static void parserInit() -{ - num_chars=0; - lineIndex=(int*)malloc(500*sizeof(int)); + if (qstricmp(genp.data(),"port" )==0) + { + genPort=1; + } + else + { + genPort=0; + } + + bropen=1; + bufferClear(); + lineCount(); + BEGIN(FindSigName); +} + +<FindSigName>{BRACECLOSE} { + lineCount(); + bropen--; + addText(yytext,yyleng); + if (bropen==0) + { + bufferClear(); + BEGIN(Start); + } + else + { + BEGIN(FindSigName); + } +} - if (!g_lexInit) +<FindSigName>{LABELID} { // found signals in entity + QCString line(yytext); + + // note that line can be something like: + // "var1, var2, var3 : in std_logic_vector(8 downto 0); --! Some comment" + + // but also + // "var4 --! Some comment + // );" + // which marks the end of a port + + // and also + // "-- Some comment + // var1 : in std_logic;" + + //printf("--> labelid='%s'\n",line.data()); + QStringList ql; + QCString comment; + int openCount=line.contains('('); + int closeCount=line.contains(')'); + int semi = line.find(';'); + int pos = line.find("--"); + int pos1 = line.find("--!"); + if (pos!=-1 && pos<pos1) // strip normal comment before special one { - VhdlDocGen::init(); - el_mc oop; - int p=0; - while ((oop=tab_mc[p++]).kval!=-1) + line = line.remove(pos,pos1-pos); + } + //printf("=> signal: line='%s'\n",line.data()); + if (semi!=-1 && pos!=-1) + { + int eol = line.findRev('\n'); + //printf("pos=%d eol=%d\n",pos,eol); + if (eol>=pos+2) { - QCString q(&oop.nom[0]); - keyMap.insert(q,oop.kval); + QRegExp re("\\n[\\s]*--!"); // comment continuation + comment=line.mid(pos+2,eol-pos-2); + //printf("Comment: '%s'\n",comment.data()); + int p,l; + while ((p=re.match(comment,0,&l))!=-1) + { + comment.remove(p,l); + } + line=line.left(pos)+line.right(line.length()-eol); + } + else + { + comment=line.mid(pos+2); + line=line.left(pos); + } + comment.stripWhiteSpace(); + // must subtract "(" and ")" in comments because they are used for determining the + // end of a port/generic construct + openCount-=comment.contains('('); + closeCount-=comment.contains(')'); + if (!comment.stripPrefix("!")) // not a special comment + { + comment.resize(0); } } -} + else + { + //printf("no ; or --: pos=%d semi=%d\n",pos,semi); + } + int diff=openCount-closeCount; + if (diff<0) + { + VhdlDocGen::deleteCharRev(line,')'); + } -void vhdlscanFreeScanner() -{ -#if defined(YY_FLEX_SUBMINOR_VERSION) - if (g_lexInit) + if (scantype!=1) // not a component { - vhdlscannerYYlex_destroy(); + addText(yytext,yyleng); + addSignals(line,yyLineNr,lastEntity,comment); + } + + lineCount(); + + if ((bropen+openCount-closeCount)==0) + { + bufferClear(); + BEGIN(Start); } -#endif } -void VHDLLanguageScanner::resetCodeParserState() -{ + +<FindSigName>{BRACEOPEN} { + lineCount(); + bropen++; + addText(yytext,yyleng); } -bool VHDLLanguageScanner::needsPreprocessing(const QCString & /*extension*/) -{ - return TRUE; + +<FindSigName>{CR} { + lineCount(); + addText(yytext,yyleng); + //BEGIN(FindSigName); } -void VHDLLanguageScanner::parsePrototype(const char *text) -{ - varName=text; - varr=TRUE; -} - -// do parsing -//int VhdlParser::doLex() -//{ -// int token=vhdlscannerYYlex(); -// //fprintf(stderr,"\ntoken: %d at line: %d",token,yyLineNr); -// return token; -//} - -void VHDLLanguageScanner::parseInput(const char *fileName, - const char *fileBuf, - Entry *root, - bool /*sameTranslationUnit*/, - QStrList & /*filesInSameTranslationUnit*/) -{ - yyFileName=QCString(fileName); - bool xilinx_ucf=isConstraintFile(yyFileName,".ucf"); - bool altera_qsf=isConstraintFile(yyFileName,".qsf"); +<*>^{B}*("for ")[^;]* { + //printf("\n found for[%s] [%d]",yytext,yyLineNr); + lineCount(); +} + +<*>{DIGITS} { // found digit + addText(yytext,yyleng); + lineCount(); +} - // support XILINX(ucf) and ALTERA (qsf) file +<*>{STRING_LITERAL} { + // Make sure string literals get transfered to the output + // We have to match these because the comment characters (--) + // can exist inside a string literal. + // We shouldn't have to call lineCount because newlines + // are not allowed inside string literals + addText(yytext,yyleng); +} - if (xilinx_ucf) - { - VhdlDocGen::parseUCF(fileBuf,root,yyFileName,FALSE); - return; + /* +<*>{BR}*"--!"{B}*"@}" { // end group + if (current) + { + Entry *pg=new Entry; + addSubEntry(current,pg); + pg->startLine=yyLineNr; + pg->name="endgroup"; } - if (altera_qsf) - { - VhdlDocGen::parseUCF(fileBuf,root,yyFileName,TRUE); - return; + lineCount(); +} + +<*>{BR}*"--!"{B}*"@{" { // start group + if (current) + { + Entry *pg=new Entry; + addSubEntry(current,pg); + pg->startLine=yyLineNr; + pg->name="startgroup"; } - printlex(yy_flex_debug, TRUE, __FILE__, fileName); + lineCount(); +} + */ - ::parserInit(); - yycont=getVhdlCont(); - yycont->root=root; - yycont->fileName=fileName; - initVhdlParser(); - QCString pPuffer(" "); - pPuffer+=fileBuf; +<*>{BR}*"--!"[^{}\n][^\n]*\n/{B}*"--!" { // multi line comment + if (iDocLine==-1) iDocLine=yyLineNr; + // signal clk :in std_logic; --!@brief global clock + // --!@brief global reset + // signal reset:in std_logic; + // these two comments are detected as a multi line comment + QCString qc(yytext); + int len=qc.contains('\n')+yyLineNr-1; - inputFile.setName(fileName); - if (g_lexInit) + if (YY_START!=Comment) // Start of the comment block { - vhdlscannerYYrestart( vhdlscannerYYin ); + bufferClear(); + iTextCounter=0; + startComment=yyLineNr; + g_lastCommentContext=YY_START; } - g_lexInit=TRUE; - g_thisParser=this; - inputPosition=0; - inputVhdlString=fileBuf; - yyLineNr=1; - current_root=root; - groupEnterFile(fileName,yyLineNr); - vhdlParse(); - Entry* curr=getCurrentVhdlEntry(); // delete last current - delete curr; - curr=0; - free(lineIndex); - inputFile.close(); - mapLibPackage(root); - printlex(yy_flex_debug, FALSE, __FILE__, fileName); + + Entry* pTemp=getEntryAtLine(current_root,len); + if (pTemp) + { // found one line comment, add it to the entry on this line + pTemp->briefLine=yyLineNr; + pTemp->brief+=yytext; + VhdlDocGen::prepareComment(pTemp->brief); + } + else + { + addText(yytext,yyleng); + } + lineCount(); + BEGIN(Comment); } -void VHDLLanguageScanner::parseCode(CodeOutputInterface &codeOutIntf, - const char *scopeName, - const QCString &input, - SrcLangExt /*lang*/, - bool isExampleBlock, - const char *exampleName, - FileDef *fileDef, - int startLine, - int endLine, - bool inlineFragment, - MemberDef *memberDef, - bool showLineNumbers, - Definition *searchCtx, - bool collectXRefs - ) -{ - ::parseVhdlCode(codeOutIntf,scopeName,input,isExampleBlock,exampleName, - fileDef,startLine,endLine,inlineFragment,memberDef, - showLineNumbers,searchCtx,collectXRefs); +<Comment>^{B}*"--!"[^\n]* { + if (iDocLine==-1) iDocLine=yyLineNr; + addText(yytext,yyleng); + lineCount(); } -/* - * adds the library|use statements to the next class (entity|package|architecture|package body - * library ieee - * entity xxx - * ..... - * library - * package - * enity zzz - * ..... - * and so on.. - */ -static void mapLibPackage( Entry* root) -{ - QList<Entry> epp=getLibUse(); - EntryListIterator eli(epp); - Entry *rt; - for (;(rt=eli.current());++eli) +<Comment>.|\n { + // found end of comment block + QCString qcs; + getBufText(qcs,iTextCounter); + VhdlDocGen::prepareComment(qcs); + int ii =qcs.find("\\code"); + if (ii>0) + { + iCodeLen=num_chars; + + gBlock.reset(); + int len=qcs.length(); + QCString name=qcs.right(len-ii); + name=VhdlDocGen::getIndexWord(name.data(),1); + if (!name) + gBlock.name="misc"+ VhdlDocGen::getRecordNumber(); + else + gBlock.name=name; + qcs=qcs.left(ii); + gBlock.startLine=yyLineNr+1; + gBlock.bodyLine=yyLineNr+1; + gBlock.brief+=qcs; + iTextCounter=0; + } + + if (ii==-1) { - if (addLibUseClause(rt->name)) + handleCommentBlock(qcs,FALSE); + } + bufferClear(); + unput(*yytext); + BEGIN(g_lastCommentContext); +} + +<*>"--!"[^\n]* { // one line comment + if (iDocLine==-1) iDocLine=yyLineNr; + QCString qcs(yytext); + int j=qcs.find("--!"); + qcs=qcs.right(qcs.length()-3-j); + bool isEndCode=qcs.contains("\\endcode"); + + if (isEndCode) + makeInline(); + //printf("--> handleCommentBlock line %d\n",yyLineNr); + Entry* pTemp=getEntryAtLine(current_root,yyLineNr); + + if (!isEndCode) + { + if (pTemp) { - Entry *current; - EntryListIterator eLib(*root->children()); - bool bFound=FALSE; - for (eLib.toFirst();(current=eLib.current());++eLib) - { - if (VhdlDocGen::isVhdlClass(current)) - if (current->startLine > rt->startLine) - { - bFound=TRUE; - current->addSubEntry(rt); - break; - } - }//for - if (!bFound) - { - root->addSubEntry(rt); - } - } //if - }// for + pTemp->briefLine=yyLineNr; + pTemp->brief+=qcs; + iDocLine=-1; + } + else + { + handleCommentBlock(qcs,TRUE); + } + } - epp.clear(); -}//MapLib + bufferClear(); +}// one line -static bool addLibUseClause(const QCString &type) -{ - static bool showIEEESTD=Config_getBool("FORCE_LOCAL_INCLUDES"); - if (showIEEESTD) // all standard packages and libraries will not be shown - { - if (type.lower().stripPrefix("ieee")) return FALSE; - if (type.lower().stripPrefix("std")) return FALSE; - } - return TRUE; +<*>{COMMENT} { } -static void handleCommentBlock(const QCString &doc,bool brief) -{ - int position=0; +<*>\n { + lineCount(); + addText(yytext,yyleng); + // printf("\n new-line [%d]",yyLineNr); + BEGIN(Start); +} + +<*>{NAME} { + addText(yytext,yyleng); + lineCount(); +} - // empty comment --! - if (doc.isEmpty()) return; +<*>{B}* { + addText(yytext,yyleng); + lineCount(); +} - bool needsEntry=FALSE; - Protection protection=Public; - int lineNr = iDocLine; +<*>. { + addText(yytext,yyleng); + lineCount(); +} - Entry* current=getCurrentVhdlEntry(); - if (oldEntry==current) - { - //printf("\n find pending message < %s > at line: %d \n ",doc.data(),iDocLine); - str_doc.doc=doc; - str_doc.iDocLine=iDocLine; - str_doc.brief=brief; - str_doc.pending=TRUE; - return; - } +%% - oldEntry=current; +static void initEntry(Entry *e) +{ + e->fileName = yyFileName; + e->lang = SrcLangExt_VHDL; + initGroupInfo(e); +} - if (brief) +static void newEntry() +{ + // Add only enties/architectures/packages to root + // and signals to classes where they were found + // ENTITY dlatch_93 IS -- VHDL'93-Syntax !!! + // PORT (d, clk : IN bit; + // q, qbar : OUT bit); + // GROUP path IS (SIGNAL, SIGNAL); + // GROUP d_to_q : path (d, q); + // ATTRIBUTE propagation : time; + // END dlatch_93; + + if (current->spec==VhdlDocGen::ENTITY || + current->spec==VhdlDocGen::PACKAGE || + current->spec==VhdlDocGen::ARCHITECTURE || + current->spec==VhdlDocGen::PACKAGE_BODY) { - current->briefLine = iDocLine; + current_root->addSubEntry(current); } - else + else { - current->docLine = iDocLine; + if (lastCompound) + { + lastCompound->addSubEntry(current); + } + else + { + if (lastEntity) + { + lastEntity->addSubEntry(current); + } + else + { + current_root->addSubEntry(current); // should not happen! + } + } } - -// printf("parseCommentBlock file<%s>\n [%s]\n",yyFileName.data(),doc.data()); + previous = current; + current = new Entry ; + initEntry(current); +} + +static void handleCommentBlock(const QCString &doc,bool brief) +{ + int position=0; + bool needsEntry=FALSE; + Protection protection=Public; + int lineNr = iDocLine; + if (brief) + current->briefLine = iDocLine; + else + current->docLine = iDocLine; + + //printf("parseCommentBlock %p [%s]\n",current,doc.data()); while (parseCommentBlock( g_thisParser, current, doc, // text yyFileName, // file lineNr, // line of block start - brief, - 0, + brief, + docBlockAutoBrief, FALSE, protection, position, needsEntry ) - ) + ) { - //printf("parseCommentBlock position=%d [%s]\n",position,doc.data()+position); - if (needsEntry) newVhdlEntry(); + //printf("parseCommentBlock position=%d [%s]\n",position,doc.data()+position); + if (needsEntry) newEntry(); } if (needsEntry) { - if (varr) - { - varr=FALSE; - current->name=varName; - current->section=Entry::VARIABLEDOC_SEC; - varName=""; - strComment.resize(0); - } - - newVhdlEntry(); + newEntry(); + } + + if (docBlockTerm) + { + unput(docBlockTerm); + docBlockTerm=0; } iDocLine=-1; - strComment.resize(0); } -// returns the vhdl parsed types at line xxx -QList<Entry>* getEntryAtLine(const Entry* ce,int line) +#if 0 +/*! + * adds grouping to the entries + */ +static void mergeGrouping(const Entry* ce,int) { EntryListIterator eli(*ce->children()); Entry *rt; for (;(rt=eli.current());++eli) { - if (rt->bodyLine==line) + if (rt->section==Entry::GROUPDOC_SEC) { - lineEntry.insert(0,rt); - } // if + if (openGroups) + { + QCString tt=(QCString)qrl.last(); + if (!tt.isEmpty()) + { + rt->groups->append(new Grouping(tt.data(),Grouping::GROUPING_LOWEST)); + } + } + qrl.append(rt->name); + } + + if ((strcmp(rt->name.data(),"endgroup")==0) && !qrl.isEmpty()) + { + qrl.remove((QCString)qrl.last()); + openGroups--; + } + + if ((strcmp(rt->name.data(),"startgroup")==0)) + { + openGroups++; + } + + if (rt->section!=Entry::GROUPDOC_SEC && openGroups && !qrl.isEmpty()) + { + rt->groups->append(new Grouping(qrl.last().data(),Grouping::GROUPING_LOWEST)); + } - getEntryAtLine(rt,line); + mergeGrouping(rt,openGroups); } - return &lineEntry; } +#endif -// token index in vhdlparser.hpp 258..416 -int getParsedLine(int object) +/* + * adds the library|use statements to the next class (entity|package|architecture|package body + * library ieee + * entity xxx + * ..... + * library + * package + * enity zzz + * ..... + * and so on.. + */ + +static void mapLibPackage(const Entry* ce) +{ + Entry *lastComp=0; + while (TRUE) + { + bool found = FALSE; + Entry *rt=0; + //const QList<Entry> *epp=ce->children(); + EntryListIterator eli(*ce->children()); + EntryListIterator eli1=eli; + for (;(rt=eli.current()),eli1=eli;++eli) + { + if (rt->spec==VhdlDocGen::LIBRARY || rt->spec==VhdlDocGen::USE) + // top level library or use statement + { + Entry *temp=0; + for (;(temp=eli1.current());++eli1) // find next entity + { + if (temp->spec==VhdlDocGen::ENTITY || temp->spec==VhdlDocGen::PACKAGE || temp->spec==VhdlDocGen::ARCHITECTURE || temp->spec==VhdlDocGen::PACKAGE_BODY) + { + Entry *ee=new Entry(*rt); //append a copy to entries sublist + temp->addSubEntry(ee); + found=TRUE; + rt->spec=-1; //nullify entry + rt->section=0; + lastComp=temp; + break; + } + }//for + if (lastComp && rt->spec) + { + Entry *ee=new Entry(*rt); //append a copy to entries sublist + lastComp->addSubEntry(ee); + found=TRUE; + rt->spec=-1; //nullify entry + rt->section=0; + } + }//if + }//for + if (!found) // nothing left to do + { + return; + } + }//while +}//MapLib + +#if 0 +/*! + * merges a brief descriptions to the next entry + */ +void mergeBrief(const Entry* ce) { - //assert(object>254 && object <416); - return lineIndex [object]; + EntryListIterator eli(*ce->children()); + Entry *rt; + for (;(rt=eli.current());++eli) + { + + if (found && (!eMerge.brief.isEmpty() || !eMerge.doc.isEmpty())) + { + rt->doc+=eMerge.doc.data(); + rt->docLine=eMerge.docLine; + rt->brief+=eMerge.brief.data(); + rt->briefLine=eMerge.briefLine; + found=FALSE; + } + + if ((strcmp(rt->name.data(),"string")==0)) + { + eMerge.reset(); + eMerge.doc+=rt->doc.data(); + eMerge.docLine=rt->docLine; + eMerge.brief+=rt->brief.data(); + eMerge.briefLine=rt->briefLine; + + found=TRUE; + } + MergeBrief(rt); + } } +#endif + -void isVhdlDocPending() + +void vhdlscanFreeScanner() { - if (!str_doc.pending) +#if defined(YY_FLEX_SUBMINOR_VERSION) + if (g_lexInit) { - return; + vhdlscannerYYlex_destroy(); } - str_doc.pending=FALSE; - oldEntry=0; // prevents endless recursion - iDocLine=str_doc.iDocLine; - handleCommentBlock(str_doc.doc,str_doc.brief); - iDocLine=-1; + + if (g_buf) + { + free(g_buf); + } + + g_buf=0; +#endif + } -static bool checkMultiComment(QCString& qcs,int line) +void VHDLLanguageScanner::parseInput(const char *fileName,const char *fileBuf,Entry *root, + bool,QStrList&) { - QList<Entry> *pTemp=getEntryAtLine(current_root,line); + inputFile.setName(fileName); + //uint jfile=inputFile.size(); + ::parserInit(); + yyFileName=QCString(fileName); + groupEnterFile(fileName,yyLineNr); + g_thisParser = this; + g_inputFromFile = FALSE; + inputPosition = 0; + assert(root!=0); + + inputString=fileBuf; + inputLen=strlen(fileBuf); + current_root = root; + global_root = root; + current=new Entry; + initEntry(current); + //current_root->name=QCString("XXX"); // dummy name for root + if (!inputFile.open(IO_ReadOnly)) + { + err("\n\n could not open file: %s !!\n\n",yyFileName.data()); + return ; + } - if (pTemp->isEmpty()) return false; + if (g_lexInit) + { + vhdlscannerYYrestart(vhdlscannerYYin); + unput(' '); + BEGIN(Start); + } + vhdlscannerYYlex(); + g_lexInit=TRUE; + + free(g_buf); + g_buf=0; + + delete current; + current=0; + + groupLeaveFile(yyFileName,yyLineNr); + inputFile.close(); + + //mergeBrief(current_root); + //mergeGrouping(current_root,0); + mapLibPackage(current_root); +} - //int ii=pTemp->count(); - qcs.stripPrefix("--!"); - while (!pTemp->isEmpty()) + +void VHDLLanguageScanner::parsePrototype(const char *text) +{ + // will be called when a \fn command is found in a comment block + + QCString ss,ret; + bool sem=FALSE; + bool func=FALSE; + QList<Argument> qs; + qs.setAutoDelete(TRUE); + VhdlDocGen::parseFuncProto(text,qs,ss,ret,TRUE); + int count=qs.count(); + if (qstricmp(ret.data(),"function")==0) { - Entry *e=(Entry*)pTemp->getFirst(); - e->briefLine=line; - e->brief+=qcs; - iDocLine=-1; - pTemp->removeFirst(); - //ii=pTemp->count(); + func=TRUE; } - return true; + if (count<1 && !func) + { + return; + } + Entry *pp = new Entry; + initEntry(pp); + pp->name=ss.stripWhiteSpace(); + pp->args+='('; + for (int j=0;j<count;j++) + { + if (sem) + { + pp->args+=','; + } + + Argument *ars=(Argument*)(qs.at(j)); + Argument *arg=new Argument; + arg->attrib = ars->attrib; + arg->name = ars->name; + arg->type = ars->type; + pp->args+=ars->name.data(); + pp->args+=" "; + pp->args+=ars->type.data(); + pp->argList->append(arg); + sem=TRUE; + } + pp->args+=')'; + + if (!ret.isEmpty()) + pp->spec=VhdlDocGen::FUNCTION; + else + pp->spec=VhdlDocGen::PROCEDURE; + + if (pp->section == Entry::MEMBERDOC_SEC && pp->args.isEmpty()) + pp->section = Entry::VARIABLEDOC_SEC; + + pp->type=ret; + current_root->addSubEntry(pp); +} + +void VHDLLanguageScanner::parseCode(CodeOutputInterface &codeOutIntf, + const char *scopeName, + const QCString &input, + SrcLangExt lang, + bool isExampleBlock, + const char *exampleName, + FileDef *fileDef, + int startLine, + int endLine, + bool inlineFragment, + MemberDef *memberDef, + bool showLineNumbers, + Definition *searchCtx, + bool collectXRefs + ) +{ + (void)lang; + ::parseVhdlCode(codeOutIntf,scopeName,input,isExampleBlock,exampleName, + fileDef,startLine,endLine,inlineFragment,memberDef, + showLineNumbers,searchCtx,collectXRefs); } - - + |