Binary compatibility of Symbian ARMv5 and ARMv6 builds

Use ARMv6 atomics where available
Use OS atomics otherwise

Integrate ARMV6 atomics to Symbian builds

Use compiler defined macros to detect if ARMv6 instructions are available
This defines the QT_HAVE_ARMV6 macro, replacing the way it was defined
by the Symbian build system previously in qpainting.pri.
qatomic_symbian now uses qatomic_arm or qatomic_armv6 automatically

Port armv6 atomics to implement generic atomics interface

The inline atomics are not inlined when we build for thumb using RVCT.
So there is no performance improvement of using the "inline" versions vs
a shared version called through a function call.
The generic atomics interface is good for binary compatibility, as the
same symbols are exported in all versions now.
Changed the fallback generic atomics implementation from the unix one
to a symbian specific one using RFastLock (identical code to the windows
generic atomics, except for RFastLock replaces Win32 CRITICAL_SECTION)

Note: GCCE atomics still need porting

Tell git to ignore .lst listing files (produced by sbs/abld listing)

ARMv6 support for GCCE compiler and fallback implementation using OS

When building corelib with GCCE and -march=armv6, QT_HAVE_ARMV6 will be
defined. This patch adds copies of the asm functions in GCC syntax.

When building for the Symbian emulator, or ARMv5, then Symbian OS atomic
functions are used as a fallback - these are more efficient than the unix
atomics, and don't require data import (which the ARMv5 atomics use, but
the OS loader doesn't support fully)

Symbian OS functions are always used for QBasicAtomicInt::ref / deref,
because these are faster than the generic function in all cases.
They are machine coded for ARMv6, and are used internally by RFastLock.

Reviewed-By: axis
Reviewed-By: Brad

1 files changed, 260 insertions, 0 deletions

diff --git a/src/corelib/arch/armv6/qatomic_generic_armv6.cpp b/src/corelib/arch/armv6/qatomic_generic_armv6.cpp
new file mode 100644
index 0000000..3078662
--- /dev/null
+++ b/src/corelib/arch/armv6/qatomic_generic_armv6.cpp
@@ -0,0 +1,260 @@
+/****************************************************************************
+**
+** Copyright (C) 2009 Nokia Corporation and/or its subsidiary(-ies).
+** All rights reserved.
+** Contact: Nokia Corporation (qt-info@nokia.com)
+**
+** This file is part of the QtCore module of the Qt Toolkit.
+**
+** $QT_BEGIN_LICENSE:LGPL$
+** No Commercial Usage
+** This file contains pre-release code and may not be distributed.
+** You may use this file in accordance with the terms and conditions
+** contained in the Technology Preview License Agreement accompanying
+** this package.
+**
+** GNU Lesser General Public License Usage
+** Alternatively, this file may be used under the terms of the GNU Lesser
+** General Public License version 2.1 as published by the Free Software
+** Foundation and appearing in the file LICENSE.LGPL included in the
+** packaging of this file.  Please review the following information to
+** ensure the GNU Lesser General Public License version 2.1 requirements
+** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
+**
+** In addition, as a special exception, Nokia gives you certain additional
+** rights.  These rights are described in the Nokia Qt LGPL Exception
+** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
+**
+** If you have questions regarding the use of this file, please contact
+** Nokia at qt-info@nokia.com.
+**
+**
+**
+**
+**
+**
+**
+**
+** $QT_END_LICENSE$
+**
+** This file implements the generic atomics interface using ARMv6 assembly
+** instructions. It is more efficent than the inline versions when Qt is
+** built for the THUMB instruction set, as the required instructions are
+** only available in ARM state.
+****************************************************************************/
+
+#include <QtCore/qglobal.h>
+
+#ifdef QT_HAVE_ARMV6
+
+QT_BEGIN_NAMESPACE
+
+QT_USE_NAMESPACE
+
+#ifdef Q_CC_RVCT
+#pragma push
+#pragma arm
+Q_CORE_EXPORT asm
+bool QBasicAtomicInt_testAndSetOrdered(volatile int *_q_value, int expectedValue, int newValue)
+{
+    CODE32
+    //R0 = _q_value
+    //R1 = expectedValue
+    //R2 = newValue
+retry_testAndSetOrdered
+    LDREX    r3,[r0]        //r3 = *_q_value
+    EORS     r3,r3,r1       //if (r3 == expectedValue) {
+    STREXEQ  r3,r2,[r0]     //*_q_value = newvalue, r3 = error
+    TEQEQ    r3,#1          //if error
+    BEQ      retry_testAndSetOrdered          //then goto retry }
+    RSBS     r0,r3,#1       //return (r3 == 0)
+    MOVCC    r0,#0
+    BX       r14
+}
+
+Q_CORE_EXPORT asm
+int QBasicAtomicInt_fetchAndStoreOrdered(volatile int *_q_value, int newValue)
+{
+    CODE32
+//R0 = _q_value
+//R1 = newValue
+retry_fetchAndStoreOrdered
+    LDREX    r3,[r0]        //r3 = *_q_value
+    STREX    r2,r1,[r0]     //*_q_value = newValue, r2 = error
+    TEQ      r2,#0          //if error
+    BNE      retry_fetchAndStoreOrdered          //then goto retry
+    MOV      r0,r3          //return r3
+    BX       r14
+}
+
+Q_CORE_EXPORT asm
+int QBasicAtomicInt_fetchAndAddOrdered(volatile int *_q_value, int valueToAdd)
+{
+    CODE32
+    //R0 = _q_value
+    //R1 = valueToAdd
+    STMDB    sp!,{r12,lr}
+retry_fetchAndAddOrdered
+    LDREX    r2,[r0]        //r2 = *_q_value
+    ADD      r3,r2,r1       //r3 = r2 + r1
+    STREX    r12,r3,[r0]    //*_q_value = r3, r12 = error
+    TEQ      r12,#0         //if error
+    BNE      retry_fetchAndAddOrdered          //then retry
+    MOV      r0,r2          //return r2
+    LDMIA    sp!,{r12,pc}
+}
+
+Q_CORE_EXPORT asm
+bool QBasicAtomicPointer_testAndSetOrdered(void * volatile *_q_value,
+                                           void *expectedValue,
+                                           void *newValue)
+{
+    CODE32
+    //R0 = _q_value
+    //R1 = expectedValue
+    //R2 = newValue
+retryPointer_testAndSetOrdered
+    LDREX    r3,[r0]        //r3 = *_q_value
+    EORS     r3,r3,r1       //if (r3 == expectedValue) {
+    STREXEQ  r3,r2,[r0]     //*_q_value = newvalue, r3 = error
+    TEQEQ    r3,#1          //if error
+    BEQ      retryPointer_testAndSetOrdered          //then goto retry }
+    RSBS     r0,r3,#1       //return (r3 == 0)
+    MOVCC    r0,#0
+    BX       r14
+}
+
+Q_CORE_EXPORT asm
+void *QBasicAtomicPointer_fetchAndStoreOrdered(void * volatile *_q_value, void *newValue)
+{
+    CODE32
+    //R0 = _q_value
+    //R1 = newValue
+retryPointer_fetchAndStoreOrdered
+    LDREX    r3,[r0]        //r3 = *_q_value
+    STREX    r2,r1,[r0]     //*_q_value = newValue, r2 = error
+    TEQ      r2,#0          //if error
+    BNE      retryPointer_fetchAndStoreOrdered          //then goto retry
+    MOV      r0,r3          //return r3
+    BX       r14
+}
+
+Q_CORE_EXPORT asm
+void *QBasicAtomicPointer_fetchAndAddOrdered(void * volatile *_q_value, qptrdiff valueToAdd)
+{
+    CODE32
+    //R0 = _q_value
+    //R1 = valueToAdd
+    STMDB    sp!,{r12,lr}
+retryPointer_fetchAndAddOrdered
+    LDREX    r2,[r0]        //r2 = *_q_value
+    ADD      r3,r2,r1       //r3 = r2 + r1
+    STREX    r12,r3,[r0]    //*_q_value = r3, r12 = error
+    TEQ      r12,#0         //if error
+    BNE      retryPointer_fetchAndAddOrdered          //then retry
+    MOV      r0,r2          //return r2
+    LDMIA    sp!,{r12,pc}
+}
+
+#pragma pop
+#elif defined (Q_CC_GCCE)
+Q_CORE_EXPORT __declspec( naked )
+bool QBasicAtomicInt_testAndSetOrdered(volatile int *_q_value, int expectedValue, int newValue)
+{
+    //R0 = _q_value
+    //R1 = expectedValue
+    //R2 = newValue
+    asm("retry_testAndSetOrdered:");
+    asm("    LDREX    r3,[r0]");        //r3 = *_q_value
+    asm("    EORS     r3,r3,r1");       //if (r3 == expectedValue) {
+    asm("    STREXEQ  r3,r2,[r0]");     //*_q_value = newvalue, r3 = error
+    asm("    TEQEQ    r3,#1");          //if error
+    asm("    BEQ      retry_testAndSetOrdered");          //then goto retry }
+    asm("    RSBS     r0,r3,#1");       //return (r3 == 0)
+    asm("    MOVCC    r0,#0");
+    asm("    BX       r14");
+}
+
+Q_CORE_EXPORT __declspec( naked )
+int QBasicAtomicInt_fetchAndStoreOrdered(volatile int *_q_value, int newValue)
+{
+//R0 = _q_value
+//R1 = newValue
+    asm("retry_fetchAndStoreOrdered:");
+    asm("    LDREX    r3,[r0]");        //r3 = *_q_value
+    asm("    STREX    r2,r1,[r0]");     //*_q_value = newValue, r2 = error
+    asm("    TEQ      r2,#0");          //if error
+    asm("    BNE      retry_fetchAndStoreOrdered");          //then goto retry
+    asm("    MOV      r0,r3");          //return r3
+    asm("    BX       r14");
+}
+
+Q_CORE_EXPORT __declspec( naked )
+int QBasicAtomicInt_fetchAndAddOrdered(volatile int *_q_value, int valueToAdd)
+{
+    //R0 = _q_value
+    //R1 = valueToAdd
+    asm("    STMDB    sp!,{r12,lr}");
+    asm("retry_fetchAndAddOrdered:");
+    asm("    LDREX    r2,[r0]");        //r2 = *_q_value
+    asm("    ADD      r3,r2,r1 ");      //r3 = r2 + r1
+    asm("    STREX    r12,r3,[r0]");    //*_q_value = r3, r12 = error
+    asm("    TEQ      r12,#0");         //if error
+    asm("    BNE      retry_fetchAndAddOrdered");          //then retry
+    asm("    MOV      r0,r2");          //return r2
+    asm("    LDMIA    sp!,{r12,pc}");
+}
+
+Q_CORE_EXPORT __declspec( naked )
+bool QBasicAtomicPointer_testAndSetOrdered(void * volatile *_q_value,
+                                           void *expectedValue,
+                                           void *newValue)
+{
+    //R0 = _q_value
+    //R1 = expectedValue
+    //R2 = newValue
+    asm("retryPointer_testAndSetOrdered:");
+    asm("    LDREX    r3,[r0]");        //r3 = *_q_value
+    asm("    EORS     r3,r3,r1");       //if (r3 == expectedValue) {
+    asm("    STREXEQ  r3,r2,[r0]");     //*_q_value = newvalue, r3 = error
+    asm("    TEQEQ    r3,#1");          //if error
+    asm("    BEQ      retryPointer_testAndSetOrdered");          //then goto retry }
+    asm("    RSBS     r0,r3,#1");       //return (r3 == 0)
+    asm("    MOVCC    r0,#0");
+    asm("    BX       r14");
+}
+
+Q_CORE_EXPORT __declspec( naked )
+void *QBasicAtomicPointer_fetchAndStoreOrdered(void * volatile *_q_value, void *newValue)
+{
+    //R0 = _q_value
+    //R1 = newValue
+    asm("retryPointer_fetchAndStoreOrdered:");
+    asm("    LDREX    r3,[r0]");        //r3 = *_q_value
+    asm("    STREX    r2,r1,[r0]");     //*_q_value = newValue, r2 = error
+    asm("    TEQ      r2,#0");          //if error
+    asm("    BNE      retryPointer_fetchAndStoreOrdered");          //then goto retry
+    asm("    MOV      r0,r3");          //return r3
+    asm("    BX       r14");
+}
+
+Q_CORE_EXPORT __declspec( naked )
+void *QBasicAtomicPointer_fetchAndAddOrdered(void * volatile *_q_value, qptrdiff valueToAdd)
+{
+    //R0 = _q_value
+    //R1 = valueToAdd
+    asm("    STMDB    sp!,{r12,lr}");
+    asm("retryPointer_fetchAndAddOrdered:");
+    asm("    LDREX    r2,[r0]");        //r2 = *_q_value
+    asm("    ADD      r3,r2,r1");       //r3 = r2 + r1
+    asm("    STREX    r12,r3,[r0]");    //*_q_value = r3, r12 = error
+    asm("    TEQ      r12,#0");         //if error
+    asm("    BNE      retryPointer_fetchAndAddOrdered");          //then retry
+    asm("    MOV      r0,r2");          //return r2
+    asm("    LDMIA    sp!,{r12,pc}");
+}
+#else
+#error unknown arm compiler
+#endif
+QT_END_NAMESPACE
+#endif