summaryrefslogtreecommitdiffstats
path: root/src/vhdldocgen.cpp
Commit message (Expand)AuthorAgeFilesLines
* Add const correctness for argument listsDimitri van Heesch2019-05-051-1/+1
* Improved const correctness and added support for inline namespacesDimitri van Heesch2019-04-211-55/+56
* Refactored Definition and derived classes such that they are abstract interfacesDimitri van Heesch2019-02-281-2/+2
* Merge branch 'run_java_once_3rd_trial' of https://github.com/cheoljoo/doxygen...Dimitri van Heesch2019-01-081-2/+2
* mergeCharles.Lee2018-12-241-6/+7
|\
| * XHTML problem with name attribute with VHDL name attributealbert-github2018-12-101-1/+1
| * Merge remote-tracking branch 'doxygen/master'Joe George2018-11-051-2/+2
| |\
| | * Merge pull request #6562 from albert-github/feature/bug_referencesDimitri van Heesch2018-11-041-2/+2
| | |\
| | | * Add commands to handle referenced by relation and references relationalbert-github2018-10-171-2/+2
| * | | Merge remote-tracking branch 'doxygen/master'Joe George2018-11-021-2/+2
| |\ \ \ | | |/ /
| | * | Correction of some coloring of code comments in VHDL, adding data type 'posit...albert-github2018-08-241-2/+2
| | |/
| * | Added *.ice files as a recognized file type.Mark Spruiell2018-10-221-1/+2
| |/
* | add format in writePlantUMLSource() and gathered in one pu file. But it is n...Charles.Lee2018-08-281-1/+1
|/
* Bug 691689 - Line numbers for examplesDimitri van Heesch2018-08-191-34/+34
* Merge branch 'master' into vhdl-localizationAndreas Regel2018-05-281-6/+8
|\
| * Better HTML output for VHDL Portsalbert-github2018-03-291-6/+8
* | Remove default assignment from Translator::trVhdlType() declarationAndreas Regel2018-01-091-3/+3
* | Add VHDL strings to Translator class and add german translations.Andreas Regel2018-01-081-126/+3
* | Replace calls to trTypeString with trVhdlType in single mode, which is the de...Andreas Regel2018-01-081-38/+2
|/
* Misc. typosluzpaz2017-12-231-5/+5
* Doxygen/VHDLdocgen:Guenther R. Wenninger2017-05-291-2/+2
* Fixed typos.orbitcowboy2016-04-141-3/+3
* Remove unused variablesChristoph Grüninger2016-01-231-1/+0
* Changed configuration mechanism to directly access options in order to improv...Dimitri van Heesch2016-01-171-10/+10
* Bug 758495 - Bug in VHDL parser + other fixesDimitri van Heesch2015-12-201-19/+120
* Fixed various issues found by PVS-Studio.Dimitri van Heesch2015-08-181-2/+0
* Various VHDL related fixesDimitri van Heesch2015-04-271-0/+13
* Bump copyright yearDimitri van Heesch2015-02-261-1/+1
* Support generating index-color PNG filesalbert-github2015-02-081-1/+2
* Merge pull request #272 from albert-github/feature/bug_unusedDimitri van Heesch2015-01-031-19/+2
|\
| * Remove unused local and static global variablesalbert-github2014-12-271-19/+2
* | Various VHDL related fixesDimitri van Heesch2015-01-021-8/+4
|/
* Fixed typos in comments.orbitcowboy2014-12-021-1/+1
* Various VHDL fixesDimitri van Heesch2014-11-061-15/+0
* Introduce new optimized string implementation (attempt 2)Dimitri van Heesch2014-10-231-2/+3
* Bug 736389 - [PATCH] Fix a potential null pointer dereference in src/vhdldocg...Dimitri van Heesch2014-09-231-2/+1
* Bug 736992 - Member functions omitted from tagfileDimitri van Heesch2014-09-221-44/+42
* Bug 735441 - [PATCH] Fix a resource leak in src/vhdldocgen.cppDimitri van Heesch2014-08-301-1/+5
* Vhdl fixesDimitri van Heesch2014-08-111-92/+105
* New VHDL parser implementationDimitri van Heesch2014-08-021-827/+2781
* Replaced the VHDL parser with the VHDL scanner from 1.7.5 to avoid potential ...Dimitri van Heesch2014-05-181-2699/+814
* add space between br and / for better compatibilityDimitri van Heesch2014-03-281-1/+1
* Merge pull request #114 from albert-github/feature/bug_vhdl_dotDimitri van Heesch2014-02-151-2/+4
|\
| * Place where dot executable is foundalbert-github2014-02-121-2/+4
* | Updated copyrightDimitri van Heesch2014-02-111-1/+1
|/
* Reduced and improved functionality of QListDimitri van Heesch2013-12-301-9/+13
* VHDL-2008 and arrays on unconstrained elementsDimitri van Heesch2013-09-031-2/+2
* Bug 701314 - URLs are not created on C# classes in some casesDimitri van Heesch2013-06-151-0/+1
* Bug 698998 - vhdldocgen fails to generate proper latex for VHDL record typeDimitri van Heesch2013-05-301-0/+2
* Release-1.8.3.1-20130512Dimitri van Heesch2013-05-121-17/+19
generated by cgit v0.12 at 2024-11-16 00:06:43 (GMT)